Memory Types

ROM :Readonlymemory RAM :ReadWritememory

Twobasictypes:

ROM Flash(EEPROM) StaticRAM(SRAM) DynamicRAM(DRAM)

Fourcommonlyusedmemories:

Genericpinconfiguration:

Memory Chips

Thenumberofaddresspinsisrelatedtothenumberofmemorylocations . o Commonsizestodayare1Kto256Mlocations. o Therefore,between10and28addresspinsarepresent. Thedatapinsaretypicallybidirectionalinreadwritememories. o Thenumberofdatapinsisrelatedtothesizeofthememorylocation . o Forexample,an8bitwide(bytewide)memorydevicehas 8datapins. o Cataloglistingof1KX8indicateabyteaddressable8Kmemory.

Eachmemorydevicehasatleastonechipselect (CS)orchipenable(CE)orselect(S)pinthat

enablesthememorydevice. o Thisenablesreadand/orwriteoperations. o Ifmorethanonearepresent,thenallmustbe0inordertoperformaread orwrite.

Memory Chips
Eachmemorydevicehasatleastonecontrolpin. o ForROMs,anoutputenable(OE)orgate(G)ispresent. TheOEpinenablesanddisablesasetof o ForRAMs,areadwrite(R/W)orwriteenable(WE)andreadenable

tristatebuffers.

(OE)arepresent.

Fordualcontrolpindevices,itmustbe

holdtruethatbotharenot0atthesame time.

ROM:

ROM :Factoryprogrammed,cannotbechanged.Olderstyle. PROM :ProgrammableReadOnlyMemory.

o Nonvolatilememory:Maintainsitsstatewhenpowereddown. o Thereareseveralforms:

EPROM :ErasableProgrammableReadOnlyMemory. Reprogrammingrequiresupto20minutesofhighintensityUVlight exposure. Memory Chips ROMs(cont): FlashEEPROM :ElectricallyErasableProgrammableROM. AlsocalledEAROM(ElectricallyAlterableROM)andNOVRAM (NOnVolatileRAM). WritingismuchslowerthananormalRAM. Usedtostoresetupinformation,e.g.videocard,oncomputer systems. CanbeusedtoreplaceEPROMforBIOSmemory. EPROMs Intel2716EPROM(2KX8):

Fieldprogrammablebutonlyonce.Olderstyle.

EPROMs
2716Timingdiagram:

Sampleofthedatasheetforthe2716A.C.Characteristics.

Symbol

Parameter

Limits

Unit

Test Condition

Min Typ. Max tACC1 Addr. to Output Delay tOH tDF ... SRAMs
TITMS4016SRAM(2KX8):

250 450 ns 0 ... ... ... ns 100 ns ...

PD/PGM= CS =VIL PD/PGM= CS =VIL PD/PGM=VIL ...

Addr. to Output Hold ...

Chip Deselect to Output Float 0

ThisEPROMrequiresawaitstateforusewiththe8086( 460nsconstraint).

VirtuallyidenticaltotheEPROMwithrespecttothepinout. However,accesstimeisfaster(250ns). o Seethetimingdiagramsanddatasheetsintext. SRAMsusedforcacheshaveaccesstimesaslowas10ns.

DRAMs
DRAM: o SRAMsarelimitedinsize(uptoabout128KX8). o DRAMsareavailableinmuchlargersizes,e.g.,64MX1. o DRAMsMUSTberefreshed(rewritten)every 2to4ms Sincetheystoretheirvalueonanintegrated

capacitorthatloseschargeovertime.

o ThisrefreshisperformedbyaspecialcircuitintheDRAMwhichrefreshesthe

entirememoryusing256reads. Refreshalsooccursonanormalread,writeor duringaspecialrefreshcycle. Moreonthislater.

o ThelargestoragecapacityofDRAMsmakeitimpracticaltoaddtherequired

numberofaddresspins.

Instead,theaddresspinsaremultiplexed.

DRAMs
TITMS4464DRAM(64KX4):

o TheTMS4464canstoreatotalof256Kbitsofdata.

o Ithas64Kaddressablelocationswhichmeansitneeds 16addressinputs,butithas

only8.

Therowaddress(A0throughA7)areplacedon

theaddresspinsandstrobedintoasetofinternal latches. Thecolumnaddres(A8throughA15)isthen strobedinusingCAS. DRAMs

TITMS4464DRAM(64KX4)TimingDiagram:

o CASalsoperformsthefunctionofthechipselectinput.

DRAMs
LargerDRAMsareavailablewhichareorganizedas1MX1 ,4MX1,16MX1,64MX1(with

256MX1availablesoon). DRAMsaretypicallyplacedonSIMM(SingleInlineMemoryModules)boards. o 30pinSIMMscomein1MX8,1MX9(parity),4MX8,4MX9. o 72pinSIMMscomein1/2/3/8/16MX32or1MX36(parity).

DRAMs
Pentiumshavea64bitwidedatabus. o The30pinand72pinSIMMsarenotusedonthesesystems. o Rather,64bitDIMMs(DualInlineMemoryModules)arethe

standard.

Theseorganizethememory64bitswide. TheboardhasDRAMsmountedonboth

sidesandis168pins.

o Sizesinclude2MX64(16M),4MX64(32M),8MX64(64M)and16MX

64(128M).

o TheDIMMmoduleisavailableinDRAM,EDOandSDRAM(andNVRAM)

withandwithoutanEPROM.

TheEPROMprovidesinformationabouthesizeandspeedofthe

memorydeviceforPNPapplications.