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Modified Harvard Architecture - Wikipedia, The Free Encyclopedia PDF
Modified Harvard Architecture - Wikipedia, The Free Encyclopedia PDF
The Modified Harvard architecture is a variation of the Harvard computer architecture that allows the contents of the instruction memory to be accessed as if it were data. Most modern computers that are documented as Harvard architecture are, in fact, Modified Harvard architecture.
Contents
1 Harvard architecture 2 Von Neumann architecture 3 Modified Harvard architecture 3.1 Split cache architecture 3.2 Access instruction memory as data 3.3 Read instructions from data memory 4 Comparisons 5 Modern uses of the Modified Harvard architecture 6 See also 7 Notes and references
Harvard architecture
Main article: Harvard architecture The original Harvard architecture computer, the Harvard Mark I, employed entirely separate memory systems to store instructions and data. The CPU fetched the next instruction and loaded or stored data simultaneously and independently. This is in contrast to a Von Neumann architecture computer, in which both instructions and data are stored in the same memory system and (without the complexity of a CPU cache) must be accessed in turn. The physical separation of instruction and data memory is sometimes held to be the distinguishing feature of modern Harvard architecture computers. With microcontrollers (entire computer systems integrated onto single chips), the use of different memory technologies for instructions (e.g. flash memory) and data (typically read/write memory) in von Neumann machines is becoming popular. The true distinction of a Harvard machine is that instruction and data memory occupy different address spaces. In other words, a memory address does not uniquely identify a storage location (as it does in a Von Neumann machine); you also need to know the memory space (instruction or data) to which the address belongs.
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modifying code, which allows a program to modify itself. A disadvantage of these methods are issues with executable space protection, which increase the risks from malware and software defects. In addition, in these systems it is notoriously difficult to document code flow, and also can make debugging much more difficult.
Comparisons
Three characteristics may be used to distinguish Modified Harvard machines from Harvard and Von Neumann machines:
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Instruction and data memories occupy different address spaces. For pure Harvard machines, there is an address 'zero' in instruction space that refers to an instruction storage location and a separate address 'zero' in data space that refers to a distinct data storage location. By contrast, Von Neumann and "split cache" modified Harvard machines store both instructions and data in a single address space, so address 'zero' refers to only one thing and whether the binary pattern in that location is interpreted as an instruction or data is defined by how the program is written. This characteristic unambiguously identifies a pure Harvard machine. By a strict interpretation of this distinction, for example, the Microchip PIC17 and PIC18 architectures, as well as the Atmel 8-bit AVR architecture, would be regarded as pure Harvard architecture machines because they do, in fact, maintain a distinct separation between code and data spaces, and address 'zero' of each does, in fact, refer to a physically different piece of memory. However, the distinction is made ambiguous by the colloquial use of the term "modified Harvard architecture" to refer to such machines' inclusion of special instructions to read and/or write the contents of code space as though it were data.[3] Instruction and data memories have separate hardware pathways to the central processing unit (CPU). This is the point of pure or modified Harvard machines, and why they co-exist with the more flexible and general von Neumann architecture: separate memory pathways to the CPU allow instructions to be fetched and data to be accessed at the same time, improving throughput. The pure Harvard machines have separate pathways with separate address spaces. Modified Harvard machines have such separate access paths for CPU caches or other tightly coupled memories, but a unified address space covers the rest of the memory hierarchy. A Von Neumann processor has only that unified address space. From a programmer's point-of-view, a modified Harvard processor in which instruction and data memories share an address space is usually treated as a Von Neumann machine until cache coherency becomes an issue, as with self-modifying code and program loading. This can be confusing, but such issues are usually visible only to systems programmers and integrators. Instruction and data memories may be accessed in different ways. The original Harvard machine, the Mark I, stored instructions on a punched paper tape and data in electro-mechanical counters. This, however, was entirely due to the limitations of technology available at the time. Today a Harvard machine such as the PIC microcontroller might use 12-bit wide flash memory for instructions, and 8-bit wide SRAM for data. In contrast, a Von Neumann microcontroller such as an ARM7TDMI, or a modified Harvard ARM9 core, necessarily provides uniform access to flash and SRAM (as 8 bit bytes, in those cases).
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Having separate address spaces creates certain difficulties in programming with high-level languages such as C, which do not directly support the notion that tables of read-only data might be in a different address space from normal writable data (and thus need to be read using different instructions).[3]
See also
Von Neumann architecture NX bit
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