A NEW LOW VOLTAGE, HIGH PSRR, CMOS BANDGAP VOLTAGE REFERENCE

S. F. Ashrafi(1), S. M. Atarodi(2) , M. Chahardori(2,3)

1 Niroo Research Institute of Iran (NRI) 2 Sharif University of Technology Iran 3 Microelectronic Research and Development Center of Iran (MERDCI) ABSTRACT A new low voltage bandgap reference (BGR) in CMOS technology, with high power supply rejection ratio (PSRR) is presented. The proposed circuit uses a regulated current mode structure and some feedback loops to reach a low voltage, low power and high PSRR voltage reference. The circuit was designed and simulated in 0.18um CMOS technology, with a power supply of 1.4 volt. The results show PSRR is 65dB at 1MHz and the output voltage variation versus temperature (-40 to 140) is less than 0.1%. This circuit shows robustness against process variation. Index Terms- CMOS analog circuit design, Bandgap reference, High PSRR, Low voltage. I. INTRODUCTION such as cellular phones, pagers, laptops and etc. Consequently, low voltage and low power are the demanding characteristics to increase battery efficiency and lifetime. The supply noise injected to the output of Bandgap reference circuit is the most significant noise, comparing to other sources [1]. Thus a high PSRR bandgap voltage reference is desired to achieve a high performance analog and digital system, particularly in wireless communications. In order to meet the goals of low voltage supply and low power dissipation, it is necessary to avoid using complex architecture and circuits. On the other hand, it is necessary to choose a structure to achieve high PSRR, over a broad frequency range to reject noise coupled from high-speed digital circuit on the chip The bandgap voltage reference presented here uses an innovative architecture to achieve a 0.8 volt (BGR) [4]. which can work with less than 1.4 volt supply voltage. In next section, the operation of this bandgap is described. II. REGULATED LOW VOLTAGE BANDGAP REFERENCE
M2

eference circuits are necessarily used in many applications, in analog, mixed-mode and digital circuits. Bandgap voltage references (BGR) have been the most popular solution since they have been first introduced in 70`s.
VDD M1

V BG
Low Voltage BG Core
Start up
Circuit

Supply indipendent Current Source

Fig.1. Top view on proposed BGR

Low-Voltage bandgap reference is quite challenging due to power consumption, noise of power supply, low voltage supply, temperature dependency and etc. In the BGR, the temperature dependence of the BG voltage obtained from a positive temperature coefficient (PTC) of a PTAT current and a negative temperature coefficient of a VBE. Fig.1 illustrates a low voltage, supply independent bandgap voltage reference, and to achieve high PSRR, bandgap core is supplied from a current source instead of voltage supply. The principle of the bandgap core is a widely used (BGR) [2]. The current source isolates the voltage supply from bandgap core to have less dependency on power supply [5]. III. IMPROVED BANDGAP CORE The basic operating principle of Bandgap voltage reference is presented in Fig.2 The feedback loop

The growing trend for low voltage circuit design is especially appeared in battery operated systems

978-1-4244-2596-9/08/$25.00 2008 IEEE

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amplifier (OP) sets the voltage of nodes X and Y to be equal and the PTAT current in resistor R1 is made. Supply independent current source (Ib), sources current to main branches of bandgap core by M6 and M7 transistors, and M5 transistor sinks the reminder current.
VDD

Loop Gain AV ( s )
Assuming:

gM 5 g g R1 M g M 5 + g Meq g q g R1 + g q

(4)

gM < gq ,

gM 5 g g R1 M <1 g M 5 + g Meq g q g R1 + g q

(5)

To guarantee the stability of this loop,

Fu ( LG ) < Fu (op )
M7

(6)

M6 Vb VBG M3 M1
OP

M2

M4 M5 Y

Where LG is loop gain and Fu is unity gain bandwidth. The above discussion shows that the loop is unconditionally stable if the amplifier in the loop (OP) has enough phase margins. It is noticeable that in the above equations the effect of resistors R2 and R3 are not considered because of their large values. V. HIGH PSRR MECHANISM Lets assume Vs to be the AC part of VDD, Vout to be the AC part of VBG and IS the AC part of reference current. Also A1 is the gain of OP, then

X R2 R3 R1 Q1

Ib

R2 Q2 R 3

vout vout is = vs is v s
R3 ( R1 + R2 ) vout vs A1 ( g M 5 ro 6 ) ( R1 ( R2 + R3 ) )

(7) (8)

Fig. 2. Proposed bandgap core

Fig.3 shows the complete proposed circuit. Also Fig.3 shows that Ib is created from bandgap core by M8, M9 and M10. Due to low voltage design, resistor division of output Bandgap voltage provides the bias voltage of M1, M2, M3 and M4. That is, R3 composed of two proper resistors to create this bias voltage (Vb) which is shown by a potentiometer in Fig.3. The most important point to be considered in the circuit is the stability of frequent loops [3]. IV. STABILITY OF THE LOOP From stability point of view, the worst loop is the loop consisting of OP and M5 whose stability will be discussed here. According to Fig.2, the Loop gain of this loop can be determined as,
Loop Gain = AV ( s ) gM 5 g M 5 + g Meq g gM1 M 2 g q 2 g R1 + g q 1

This equation shows what parameters are of high importance to increase PSRR. So high PSRR is obtained by applying these strategies: [5] 1) The bandgap core is supplied from regulated voltage made with a feedback loop including OP and M5. [1] 2) The current reference that supplies the bandgap core is designed wideband to have high PSRR, because the PSRR of this block is proportional to gain and bandwidth of OP. VI. LOW VOLTAGE STRUCTURE Fig.4 is depicted to explain the operation of proposed bandgap core. In this figure, resistors R2 and R3 create a voltage equal to a fraction of VBE. According to the Fig.4 the bandgap voltage (VBG) is:

(1)

While:

g Meq g M 1 + g M 2 + g M 3 + g M 4

(2)

VBG = I1 ( R2 R3 ) + VBEQ 2

R3 R2 + R3

(9)

Since M1 and M2 have the same gate voltage and transistor Q1 and Q2 have the same base voltage, then: (3) g M 1 g M 2 = g M , g q1 g q 2 = g q Hence, following expression can be written for Loop gain

In this equation current I1 is a current that consists of two parts which are proportional to VBE and VBE. In fact, I1 and I2 are the currents of transistors M3 and M1, respectively. These currents are equal since M1and M3 act as a current mirror in main bandgap core. (Fig 3) Writing the KCL in node X determines the value of I1 by:

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V DD M S1 M S2 Vb M3 M1 M2 M4 M9 M 13 X R1 Q1 Y R2 Q2 R3 M 10 M 11 M 12 M8 M 14 M 15 M 16 M 17
RC CC

M6

M7

V BG

M5

R2 M S3 R3

Fig. 3. Low voltage, High PSRR Bandgap voltage reference

I1 =

VBE VBE ( R2 + R3 ) + R1 ( R2 + 2 R3 ) ( R2 + 2 R3 )
R 2 R3 2 VBE + VBE ( R2 + 2 R3 ) 2 R1

(10)

According to Fig.3, equation (13) guarantees M1, M2, M3 and M4 to remain in saturation region: VBEQ 2 VThM 1 < Vb (13) So one of the limitations of VDD is:

Substituting (10) in (9), VBG can summarize as:

VDDMin = Vb + VGSM 1 + VDSAT M 6

(14)

VBG =

(11)

By choosing proper values for R1, R2 and R3, VBG can be reduced to about 0.8 volt or lower. This equation shows that this proposed bandgap voltage has a scaling factor with respect to conventional bandgap voltage which can reduce it by. 2 R3 (12) ( R2 + 2 R3 ) In spite of using an extra current mirror to provide the regulated voltage in proposed circuit, it can work with less than 1.4 volt power supply.

In this equation VDSAT is over drive voltage and VGS is gate source voltage of transistor. This limitation explains if value of Vb is considered 0.6 volt and VDSAT is considered 0.2 volt since VGS is about 0.6 volt in this circuit, with a 1.4 volt supply voltage all of the MOS transistors are in saturation region. It should be noted that there is another limitation for VDD as shown in (15) VDDMin = VBEq 2 + VDSAT M 1 + VDSAT 6 (15) Equation (15) also indicates that with a 1.4 volt supply voltage, circuit can operate properly. VII. START-UP CIRCUIT With the presence of multiple loops, the Bandgap reference needs a start up circuitry. A simple start up for proposed circuit has been designed which is shown in Fig.3. First, MS3 transistor that is biased through VDD is on and force MS2 transistor to source current to the Bandgap core. When circuit started, MS1 that its current is larger than MS3 current increases the gate voltage of MS2 to VDD and turns MS2 off. VIII. AMPLIFIER The input referred noise and offset of OP amplifier are inserted directly in the current of IPTAT. Thus, amplifier must be designed to be a low noise and low offset OP amplifier, besides a high frequency

I1 VBG R2 R3

I2

Fig 4 . New low voltage BandGap structure

The regulation technique which used in this circuit will be discussed here:

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bandwidth. According to what was mentioned above, a simple low voltage amplifier with NMOS input transistors was designed for OP amplifier. (Fig 5)
VDD

0.84

0.8398

0.8396

M15

M16

M17

VBE
0.8394

RC

CC
0.8392

0.839

M 13 VBias

M14
0.8388 -40 -20 0 20 40 60 80 100 120 140

M11

M12

Temperatur
a)

Fig. 5. Operational Amplifier [5]

X. CONCLUSION An ultra low voltage, low power, high PSRR bandgap voltage reference has been developed in a standard CMOS 0.18m technology. The circuit operated down to minimum power supply voltage 1.4 volt and it consumes only 0.35mw at minimum supply. The regulated structure, multiple feedback loops and additional circuitry required for high PSRR, were designed leading to the PSRR more than 100 dB at low frequencies and more than 65 dB at 1 MHz. IX. RESULTS Table I summarizes the bandgap voltage reference characteristics extracted from simulations. The curve of PSRR versus frequencies is shown in Fig.6.a and the temperature variation is plotted in Fig 6.b.
TABLE I BANDGAP REFERENCE CHARACTERISTICS

-10 -20 -30 -40 PSRR(dB) -50 -60 -70 -80 -90 -100 -110 10
2

10

10

10 Frequency(Hz)

10

10

b) Fig 6. (a) Temperature dependence of Bandgap output. (b) Variation of PSRR versus frequency in different cases.

REFERENCES
1. K-M Tham and K. Nagaraj, A Low Supply Voltage High PSRR Voltage Reference in CMOS process, IEEE J. Solid State Circuits, vol.30, pp.31-35, 1995. 2. B. Razavi, Design of Analog CMOS IntegratedCircuits, McGraw-Hill, 2001. 3. G. Giustolisi and G.Palumbo, Detailed Frequency Analysis of Power Supply Rejection in Brokaw Bandgap, Proc. IEEE Intl. Symp. Circ. and Syst.,pp.I731-I734, 2001. 4. M.S.J. Steyart and W.M.C. Sansen, Power supply rejection ratio in operational transconductance amplifiers, IEEE Trans. Circuits and Systems, vol. 37,pp.1077-1084, 1990. 5. S. Mehrmanesh, M. B. Vahidfar, S. M. Atarodi,A 1-Volt , High PSRR, CMOS BandGap Voltage Referenc, IEEE conference ISCAS, 2003.

Parameter Power supply Range (V) Power dissipation (W) @VDD=1.4V IDD (A) VBG (V) Standard deviation (mV) Temperature Coefficient (ppm) PSRR in : DC (dB) PSRR in : 1MHz (dB)

Value 1.4 to 2.3 350 250 0.83 10 5.7 100 65

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