DC-DC Buck-Boost Converter By Bill Pray Mike Perry Course Section Lab T.A. Inseop Lee 5-4Pro!

ect "u#ber 4$

ii

Abstract
%or t&e Senior Desi'n Pro!ect a buck-boost converter (ill be )esi'ne) to supply a loa) (it& a constant *+,- output an) at a ran'e o. /0 to /$0. T&e converter (ill &ave an input ran'e o. +$- to +5- an) a tolerance o. 12- +3 volta'e ripple. A 'ate )rive circuit is use) to control t&e %4T in t&e converter. T&e po(er consu#ption o. t&e 'ate )rive (ill 'ive an in)ication o. (&at t&e e..iciency o. t&e overall circuit (ill be. In t&e .inal sta'e o. t&e )esi'n5 t&e converter (ill be operate) over t&e ran'es o. t&e speci.ie) inputs (&ile tryin' to ac&ieve t&e speci.ie) outputs.

iii TABL4 6% C6"T4"TS

PA74
+. Intro)uction88888888888888888888888888 /. Desi'n Proce)ure88888888888888888888888... 9. Desi'n Details8888888888888888888888888 4. Desi'n -eri.ication88888888888888888888888 5. Conclusion.88888888888888888888888888 ,. Cost88...88888888888888888888888888. Appen)i< +. =e.erence888888888888888888888.. +-/ 9-4 5-: ;-++ +/ +9 +4

Intro)uction
DC-DC converters &ave a (i)e ran'e o. uses to)ay an) are beco#in' increasin'ly #ore i#portant in every )ay use. Dc po(er supplies are probably t&e lar'est use o. t&e converters an) are #uc& #ore co#pact an) e..icient t&an t&e ol) #et&o) o. conversion (it& trans.or#ers. T&ese converters can &ave an output o. any ran'e> .or instance5 one can run lo'ic 'ates or lar'e )c #otor )rives (it& a si#ple converter. T&e lar'est proble# (it& t&ese converters is still e..iciency alt&ou'& t&ere is also an interest to #ake t&ese converters as s#all as possible an) to control t&e &eat )issipation. 0e &ave c&osen to buil) t&e buck-boost converter because o. its versatility an) (i)e ran'e o. uses in to)ay?s #arket. T&ere are t(o circuit )ia'ra#s attac&e) one is t&e basic Buck-Boost circuit %i'ure + an) t&e ot&er is t&e 'ate )rive circuit %i'ure / (&ic& (ill )rive t&e %4T 'ate at a certain input volta'e .ro# a separate source. T&e )rain an) source o. t&e %4T (ill be connecte) to t&e Buck-Boost circuit (it& t&e source at t&e output si)e o. t&e converter t&e buck is ac&ieve) in part by placin' a polari@e) capacitor at t&e out put (it& t&e ne'ative si)e at t&e )io)e ter#inal. %or t&e converter t&at to be buil) (ill &ave a ran'e o. inputs o. +$v-+5v an) an out put ran'e o. *+,v. T&e output ripple is speci.ie) to be less t&an 12-+3. T&e output po(er reAuire#ents (ill ran'e .ro# /( to /$(. A $3 e..iciency ratin' (ill be atte#pte) an) a t&er#al )issipation in t&e %4T o. less t&an :5 )e'rees Celsius (&ic& is 5$3 o. t&e ratin'.

T&e converter (ill be teste) over t&e entire ran'e o. t&e input an) output volta'es. At eac& value o. input an) output t&e )ata (ill be )ocu#ente). T&e po(er-out5 po(er-in5 )uty ratio5 an) t&er#al rea)in's (ill also be recor)e). T&ese values (ill allo( .or t&e necessary calculations .or e..iciencies an) t&er#al ratin's.

Desi'n Proce)ure

A DC-DC converter is not&in' #ore t&an a DC trans.or#er or a )evice t&at provi)es a loss less trans.er o. ener'y bet(een )i..erent circuits at )i..erent volta'e levels. 0&en )c-)c conversion is nee)e) t&ere is also a nee) .or control an) a nee) .or &i'&er e..iciencies. I. t&e latter (ere not i#portant (e coul) !ust use a volta'e )ivi)er an) 'et t&e c&an'e in volta'e (e are lookin' .or. In #o)ern )c electronics (e nee) #ore t&an !ust volta'e re)uction. 0&at really are nee)e) are volta'e trans.ers5 polarity reversals5 an) increase) an) )ecrease) volta'es (it& control. 6ne #et&o) o. buil)in' a )c trans.or#er is to use s(itc&in' converters calle) c&oppers. T&e provi)e) s(itc&in' .unction reAuires a )uty ratio5 (&ic& (ill 'ive us t&e control t&at &as been nee)e). In t&e Buck-boost converter ac&ievin' outputs o. any #a'nitu)es are possible. T&e buck boost converter &as t(o #ain restrictions. T&ey are B-L an) BCL &as to be satis.ie). T&is #eans t&at only one s(itc& is on at a ti#e. 0&en s(itc& + C%4TD is on t&e volta'e -t C%i'ure +D is !ust -in an) (&en s(itc& / C)io)eD is on -t is !ust --out. T&en t&e

)uty ratio can be relate) to -out by sayin' -out E

D+ F Vin + D+

T&e input an) output currents

are )eter#ine) by t&e s(itc&in' action. Since Is EGioutH1GiinH t&en D+ FGioutHE D/ FGiinH an) because o. t&e casca)in' process t&is converter reAuires a ne'ative output (it& respect to t&e input. In t&eory i. D+ is $ t&en t&e output is @ero an) i. D+ is + t&en t&e
+ t&en t&e output is eAual in #a'nitu)e to t&e input. T&e /

output is in.inity an) i. D+ is

capacitor at t&e output is t&ere to 'ive t&e output volta'e source properties. T&e #et&o) o. )eter#inin' t&e ot&er ele#ents o. t&e circuit is )iscusse) in so#e )ept& in t&e results. Probably t&e #ost i#portant consi)eration o. all t&e ele#ents is t&e in)uctor. T&e in)uctor value is i#portant to not be belo( t&e critical value so t&at t&e converter (ill not &ave a )iscontinuous #o)e. T&is &appens (&en t&e in)uctor is too s#all to #aintain current .lo( at all ti#es. 0&en t&e converter is in )iscontinuous #o)e its output beco#es loa) )epen)ent.

Figure 1

Desi'n Details
Since t&e ob!ective o. buil)in' a converter t&at (ill supply a constant *+, volts t&e )ecision to use a buck boost )esi'n (as c&osen )ue to t&e polarity reversal Csee .i'ure +D. T&e .irst t&in' to )o (as to .in) t&e value o. t&e s(itc&in' .reAuency .or (&ic& LHLcrit. To )o t&is t&e values o. t&e loa) current5 t&e ti#e perio) an) t&e )uty ratio #ust be kno(n since t&e value o. Lcrit is )epen)ant upon t&e#. To obtain t&e loa) current (e use t&e .ollo(in' eAuations to obtain t&e )ata in table 4. Is E GiinH 1 GioutH PE-I t(o cases / 0atts /$ 0atts GI-outH $.+/5 +./5 GI-inH +$v $./ / GI-inH+5v $.+99 +.99 Is +$v $.+/: +./: Is +5v $.+95 9.5; Table-+ C+D C/D

T&e relations&ip bet(een s(itc& + an) s(itc& / is calle) t&e Duty =atio an) can be represente) by t&e .ollo(in' eAuation5>:+ -out E CD+2+-D+D F -in C9D

"o( to consi)er t&e )uty ratio an) since a polarity s&i.t nee)s to occur5 t&en t&ese ter#s (ill nee) to consi)ere) in ter#s o. absolute values. %or t&e +$ volt caseD+ E ,/3 an) D/ E 9;3. %or t&e +5 volt case D+ E 5/3 an) D/ E 4;3. "o( to solve .or t&e value o. t .ro# t&e relations&ip belo(

tED+FT -in E Lcrit F i2t

C4D C5D

7iven i E .+/5A C.ro# Table +D an) since tED+FT (&ere T is t&e perio) an) is eAual to +2. (e can solve .or T an) substitute values o. Lcrit an) solve .or t&e perio) an) t&en .or t&e .reAuency. Typically (e (oul) like a .reAuency bet(een /$kI@ an) +$$kI@. I. (e be'in (it& a /$$& in)uctor (e 'et .reAuencies o. ;/.,kI@ at t&e +5 volt ran'e an) +$kI@ .or t&e +$ volt ran'e so t&e s(itc&in' .reAuency is .#a<H;/.,:kI@. T&e ne<t step is to c&oose a loa) an) lookin' at t&e po(er reAuire#ents an) t&e volta'e output usin' t&e .ollo(in' relations&ip can )o t&is. PE-/2= %or t&e /-(att case (e 'et a loa) o. +/;.; an) .or t&e /$-(att loa) (e 'et +/.;. In c&oosin' t&e capacitor t&e tolerance speci.ication o. 12- +3 (ill &elp )eter#ine t&e capacitor value t&at (ill allo( us to ac&ieve t&is ran'e. To )o t&is t&e c&an'e in output volta'e (ill be )eter#ine) by t&e speci.ications 'iven in t&e proposal an) )eter#ine) by t&e .ollo(in' relations&ip. -ripple G v F -out C:D C,D

A.ter obtainin' t&e -ripple E .9,v (e can use t&is value to )eter#ine t&e value o. t&e capacitance usin' t&e .ollo(in' eAuation. C>t2v F icHD+FT#a<FIout2v C;D

T&en in t&e +$ volt case yiel)s CH+.5. an) .or t&e +5 volt case (e 'et CH+;. . in t&is converter a 4:. capacitor (ill be use). "o( t&at all o. t&e co#ponents &ave been selecte) .or t&e converter it is ti#e to c&oose t&e co#ponents o. t&e 'ate )rive. An)

.inally t&e in)uctor use) (ill be a 9$$& because it is lar'er t&an t&e /$$& t&at (as use) in t&e calculations. In c&oosin' t&e co#ponents nee)e) .or t&e 'ate )rive circuit it is consi)ere) t&at t&e 'reatest control o. t&e 'ate is nee)e) to obtain t&e output ran'e speci.ie). %or t&e Pulse 0i)t& Mo)ulation c&ip t&e JC9;49 (as c&osen because it allo(s control o. t&e )uty ratio .ro# $ to +$$3 an) it also allo(s t&e .reAuency to be controlle) over a ran'e o. +$kI@ to 5$$kI@. T&is P0M c&ip also &as a (i)e ran'e o. inputs available an) t&e output is capable o. )rivin' t&e %4T into saturation (&ere t&e s(itc&in' losses are #ini#i@e). T&e Ir.5/$ (as c&osen .or t&e %4T an) t&e MB= +$45 .or t&e )io)e. T&e Ir.5/$ &as a current ratin' o. ;A continuous an) a 9/A-peak value an) a volta'e ratin' o. +$$ volts an) a =)son value o. .9 o&#s. Since t&e value o. =)son is so i#portant to t&e t&er#al )issipation .actor t&e Motorola MTD 99$/ 0ave %4T (ill also be use) an) co#pare) (it& t&e Ir.5/$. T&e MB= +$45 &as a current ratin' o. +$A an) a volta'e ratin' o. 45 volts. T&ere (ill be t(o variable resistors use) in t&e 'ate )rive. T&e .irst one (ill be a /5ko&# +5-turn pot to be use) .or .reAuency a)!ust#ent an) t&e ot&er one (ill be a 5$$ o&# +5 turn pot use) to a)!ust t&e )uty ratio. T&e .inal 'ate )rive )esi'n is s&o(n belo( in %i'ure /

Design Verification
T&e ne<t step is to buil) t&e converter an) to be'in testin' as speci.ie) by t&e proposal. T&e testin' be'an (it& t&e /-(att loa) an) (as ran at +-volt intervals over t&e ran'e o. inputs an) continue) on (it& t&e /$-(att loa). 0&ile )oin' t&is )ata (as collecte) to co#pare t&e )uty ratio5 e..iciency an) t&e output. Data taken in t&e /-(att ran'e is 'iven belo(
Test Data Frequency 85khz Low output Vin !"!8 "!' $"!' '"! & 5"! Vout 5"#8 (" 5"#& (" (" (" With Wave Fet Pin Pout $"% $ '"( $"% '" $"& '" $"' '"$ $"' ' $"$ Efficiency Duty Ratio %&"!% $! %5"!! 8 %%"&$ ( %&" # & % "88 $ %'"'' #

Table / T&e )ata in Table / is )ata taken (it& t&e 0ave %4T. As s&o(n in t&e )ata t&e *+,v at /(atts output (as ac&ieve) an) t&e e..iciency ac&ieve) is in t&e #i) :$3 ran'e5 not as &i'& as (e &a) anticipate) but it is better t&an t&e e..iciencies t&at (ere taken (it& t&e stan)ar) %4T as s&o(n in Table 9
Vin ! "! $"!' '"!$ & 5"!' Vout ( ("! (" ( 5"#8 5"## With )tan*ar* FET Pin Pout '"' $" '"5 $"' '"( $"5 '"( $"& '"$ $" '"& $"$ Efficiency Duty Ratio ('"(& $ (5"% # (#"&& % (("(% ( (5"(' & (&"% !

Table 9 In Table 9 one can e<plicitly see t&e relations&ip bet(een t&e value o. =)son an) t&e e..iciency o. t&e converter (it& t&e 0ave %4T t&e e..iciency is appro<i#ately +$3

&i'&er t&an t&e e..iciency (it& t&e stan)ar) Ir.5/$ %4T. T&is is )irectly relate) to t&e s(itc&in' losses in t&e %4T )ue to t&e value o. = )son . T&e )ata taken .or t&e &i'& po(er output looks si#ilar to t&e )ata taken above e<cept t&at t&e e..iciencies are lo(er an) t&e )uty ratios are &i'&er. T&is is co##on .or t&e .act t&at t&ere is #ore t&er#al )issipation in t&e %4T an) t&e T&e .act t&at at t&e &i'& po(er ran'e t&e currents bein' pus&e) t&rou'& t&e converter is #uc& &i'&er t&an t&e current t&at (as pus&e) into t&e converter at t&e lo( po(er ran'e. T&is is (&ere t&e lo(er value o. = )son beco#es very i#portant to lo(er t&e s(itc&in' losses in t&e %4T an) at t&e sa#e ti#e lo(erin' t&e t&er#al )issipation re)ucin' t&e nee) .or a &eat sink. T&is can be seen in t&e )ata in t&e .ollo(in' tables.
Vin ! " $" ' &"!' 5" Vout ( 5"#8 5"## ("!$ ("!' 5"## Pin '&" '&" '& ''"5 ''"& ''" Pout $!" #"#8 #"#8 $!" $ $!" & #"## Efficiency 58"#& 58"5# 58"%( (!"!( (!"'! (!"'# Duty Ratio &8 &% &5 && & &!

Table 4 In table 4 t&is is t&e )ata taken (it& t&e (ave %4T an) t&e )ata in table 5 is (it& t&e stan)ar) Ir.5/$ %4T.
Vin !" " $"!' '"$ & 5" Vout 5"# ("!$ 5"#8 5"## (" ("! Pin & "! '#"( '#"$ '#" '8"( '8"$ Pout $!" #"8 #"#8 $!"!8 #"## $!"! Efficiency &#"! 5!"!! 5!"#% 5 "'( 5 "%# 5$"'8 Duty Ratio &8 &8 &% &5 && &$

Table 5 A.ter analy@in' t&e )ata it beco#es very clear t&at t&ere is a )e.inite relations&ip bet(een t&e )uty ratio an) t&e input volta'e an) t&e e..iciency.

T&e t&er#al )issipation )ata is as .ollo(s

Ther+a, Dissipation )tan*ar* FET W - no heat sink . of FET $ Watts $! Watts $ /para,,e,0 && 1 $5 Wave FET W - no heat sink . of FET $ Watts $! Watts $ /para,,e,0 ' !

5' 11 $5

'# 1 $5

W - 2eat sink . of FET $ Watts $! Watts $ /para,,e,0 '& 8%

W - 2eat sink . of FET $ Watts $! Watts $ /para,,e,0 $# (#

&( !

' 8(

Table , As s&o(n in t&e )ata to operate in t&e &i'& po(er ran'e t&e use o. &eatsinks (ere reAuire) but t&e ob!ective (as #et (it& t(o 0ave %4Ts in parallel. T&e s(itc&in' tra!ectories looke) like t&e .ollo(in'K

%i'ure 9 An i)eal s(itc&in' tra!ectory (oul) &ave a #ore linear slope in t&e turn on an) turn o.. ti#e t&ere .or t&is one is not to .ar o... Alterin' t&e s(itc&in' tra!ectory is t&e sole !ob o. t&e snubber circuit. T&e capacitor an) resistor in t&e snubber s&oul) be su..icient enou'& to avoi) t&e volta'e over s&oot an) to provi)e an =C ti#e constant

lar'e enou'& to totally )issipate t&e store) ener'y )urin' t&e turn on ti#e. T&e snubber nee)e) to be incorporate) to operate t&e converter at t&e &i'& po(er en) o. t&e output )ue to t&e .act t&at t&e %4T (as not turnin' on soon enou'& to allo( t&e converter to operate at t&e speci.ie) .reAuency.

Conclusion
T&e e..iciencies (ere not (&ere t&ey (ere e<pecte) to be an) t&is is because t&e inputs o. t&e converter (ere very s#all co#pare) to t&e output reAuire#ents. T&e e..iciencies rise as t&e input volta'e rises an) t&e )uty ratio )ecreases. T&is is because as t&e input volta'e rises an) t&e )uty ratio )ecreases t&e s(itc&in' losses in t&e %4T are re)uce) an) t&e current )rivin' t&e converter is re)uce). T&ere coul) &ave been so#e c&an'es in t&e )esi'n o. t&e converter in t&e early sta'es to possibly increase t&e e..iciencies but t&is (oul) &ave &a) to be set .ort& in t&e be'innin'. Suc& as5 i. (e &a) c&ose to buil) t&e converter .or a speci.ie) loa) (e coul) &ave c&osen t&e input to be #ore &elp.ul to t&e 'ate )rive an) t&ere.ore increasin' t&e e..iciency. As it stan)s t&e e..iciency o. t&e converter ran'es .ro# t&e lo( 5$3 to t&e #i) :$3 t&is is not terrible 'iven t&e .act t&at t&e converter (as built .or a 'eneral ran'e o. inputs an) outputs. T&e 0ave %4T )i) &elp t&e t&er#al )issipation an) t&e value o. less t&an :5 )e'rees Celsius (as ac&ieve) (it& #ini#al use o. &eat sinks. 6ver all t&e circuit coul) &ave been built in a relatively s#all packa'e o. t(o inc&es by t&ree inc&es (it& t&e %4T #ounte) to t&e back o. t&e &eat sink. T&is is close to in)ustry stan)ar)s5 an avera'e )c-)c converter (ill be about 9inc&es by 9inc&es an) lar'er as t&e po(er reAuire#ents increase.

Cost
Parts List
Line 3uantity $ ' & 5 ( % 8 # ! $ ' & 5 ( % Discription $5k 5h+ Resistor 5!! 5h+ Pot Resistor k 5h+ Resistor $k Resistor /$0 (8k Resistor !"!!&%+F 4apacitor /$0 !"! +F 4apacitor /$0 R7(!D Dio*es &%k Resistor +F 4apacitor 89R !&5 Dio*e &#+F 4apacitor $8 5h+ Power Resistor $"8k 5h+ Power Resistor !"$$!+F 4apacitor :RF5$! Fet ;4'8&' PW8 :4 4ost Tota, 6!" % 6!" % 6!"#' 6!"#' 6!"!( 6!"!( 6!"!# 6!"!# 6!"' 6!"($ 6!"'& 6!"'& 6!"$% 6!"5& 6!"&' 6!"8( 6!"$# 6!"$# 6!"$' 6!"$' 6!"5' 6!"5' 6!"%8 6!"%8 6!" 8 6!" 8 6!" # 6!" # 6!"&& 6!"&& 6!"5( 6!"5( 6 "(% 6 "(%

$ $ $

Tota, 4ost

68"&8

Total labor is pro!ecte) at about 9/ &ours o. lab ti#e an) +$ &ours o. )esi'n an) revie( .or a total o. 4/ &ours per person an) at a salary o. L9$ an &our. Total price o. L,59$$.$$ .or labor an) parts are L;.4; .or a 'ran) total o. L,59$;.4;.

Appendix 1

Books
P. T. Brein5 Elements of Power Electronics. "e( MorkK 6<.or)5 + pp.++ -/$55 594-54; ;