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RADHARAMANA MOHANTY M.Tech (Microelectronics & VLSI Design) Department of Electrical engineering, Indian Institute of Technology, Hyderabad.

Date of Birth: 25.02.1988 Email ID: ee11m11@iith.ac.in rinku25021988@gmail.com, Phone Number: 07382365766 Objective: To work productively in a creative and competitive environment that results in value addition to the organisation, self- satisfaction and enhancement of my skills. Educational details & Academic Performance: Course M.Tech. Specialization Microelectronics & VLSI Design Electronics & Communication Engg. Institution studied Indian Institute of Technology, Hyderabad CGPA/Percentage Year of passing 2014

9.61

B.Tech.

Intermediate (10+2) HSC(10th) Areas of Interest

Gandhi Institute of Technological Advancement, Bhubaneswar Maharishi College of Natural Law, Bhubaneswar Govt. Boys high school, Unit-1,Bhubaneswar

8.73

2010

53% 76%

2005 2003

Digital IC Design Complete digital design flow specifically backend/Physical Design as a part of EDA tool Design. Analog IC Design. MEMS Design and fabrication. VLSI Technology. Semiconductor Devices and Modelling. Technical Skills: TOOLS: Circuit Simulator CADENCE virtuoso. Synopsys tools CERTIFY, SYNPLIFY. Device Simulator Silvaco. MEMS Design simulator CoventorWare. Xilinx ISE. Tanner layout editor.

LANGUAGES KNOWN: Programming C. Object oriented programming C++. Verilog HDL and VHDL. Assembly Programming (8085, 8086, 8051). Academic Achievements: Got Certificate of Academic Excellence for outstanding academic performance from Dr. C.N.R Rao, Chairman Scientific advisory board to the prime minister, during his visit to IIT Hyderabad on occasion of foundation day celebration. Consistent topper of the batch in IIT Hyderabad. Major Courses VLSI Technology. Semiconductor Device Modelling. Digital Signal Processing Digital IC Design & Verification. Analog IC Design. Embedded Systems. Biomedical IC Design. More than Moore Elctronics .

Projects: M.Tech. projects: Title: ROIC Design and 3D integration of Image Sensor Microbolometer (a MEMS Device). Project Details: The device is capable of producing image of any object by sensing the IR radiation generated from it, which is used in much application like Military, Biomedical, Astrology etc. Role Description: Taken challenge and added innovation to build the device for high efficiency, low cost and with simple process which can be integrated with its ASIC as a complete system. Skills/tools used: CADENCE VIRTUOSO, COVENTORWARE, L-EDIT MASK LAYOUT MAKER. Title :FIELD ASSYMETRIC ION MOBILITY SPECTROSCOPY(FAIMS) Project Details: FAIMS is new technology for ion separation, which is used in military as an early warning system to detect chemical warfare agents. Role Description: Was involved in the project to miniaturise the device with complete process flow. Skills/tools used: Lithography (MA6/BA6 mask aligner), sputtering and Wafer Bonder. Title :Prototyping a basic Communication Chip Project Details: Prototyping a basic Communication Chip, by partitioning the Design using CERTIFY Tool and carried Impact analysis, logic Replication, Estimate I/O and Area Utilization. Role Description: Prototype the basic Communication Chip, by partitioning the Design using CERTIFY Tool and carried Impact analysis, logic Replication,Estimate I/O and Area Utilization.

Skills used: SYNOPSYS, CERTIFY AND SYNPLIFY TOOLS. Title :2D Fast ICA Algorithm and Hardware Architecture Project Details: 2D Fast ICA Algorithm is implemented by using a unique concept called COORDINATE ROTATION BASED DIGITAL COMPUTER (CORDIC) based algorithm which is implementable for EMG/motor signals generated from human body. Role Description: Involved in generating the CORDIC implementation and trying to implement in Hardware. Skills/tools used: Algorithms and VHDL. Title :3D IC TECHNOLOGY: Project Details :An emerging technology which is an alternative for scaling of semiconductor chips and gives a lot of advantages e.g. low footprint, lower cost, reduce power consumption and most importantly significant increase in bandwidth. Role Description: Was involved in metal-metal and dielectric-dielectric bonding at room temperature which is one of the major challenges in 3D IC technology. Skills/tools used: Clean room experience with Hand on experience on MA6/BA6 mask aligner, sputtering and wafer bonder. Title :Partition and Refinement algorithm Project Details: This algorithm is used to reduce the number of extra states present in a finite state machine (FSM). Role Description: Have written the code in C to reduce the no. of states and have verified it through examples of 6 states. Skills/tools used: FSM concept, Partition Refinement algorithm and Programming C. B.Tech project: Title :RAILWAY TRACK CRACK DETECTION VEHICLE Project Details: Used for early detection of crack in the railway track. Role Description: Build the detection vehicle by using the sensor technology which detects crack and convey information to the nearby station. Skills/tools used: Used IR Sensors, OPAMPS etc.

Non-academic Activities: Student coordinator for placement in IIT Hyderabad. Organized and coordinated teachers day two times in IIT Hyderabad. Organized VLSI Design workshop in IIT Hyderabad. Hobbies and interests: Listening to music, playing Badminton and carom. I hereby declare that the information furnished above is true to the best of my knowledge. Radharamana Mohanty

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