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EE-545 Computer Communication Networks Topic: Manchester Encoding with XOR Gate Date: 11/18/2013 Submitted To: Dr. David Taggart Submitted by: Neeru Singh (011656383)

Manchester Encoding
In data transmission, Manchester encoding is a form of digital encoding in which data bits are represented by transitions from one logical state to the other. This is different from the more common method of encoding, in which a bit is represented by either a high state such as +5 volts or a low state such as 0 volts. When the Manchester code is used, the length of each data bit is set by default. This makes the signal self-clocking. The state of a bit is determined according to the direction of the transition. In some systems, the transition from low to high represents logic 1, and the transition from high to low represents logic 0. In other systems, the transition from low to high represents logic 0, and the transition from high to low represents logic 1. As shown in Figure 1 Original Data Logic 0 Logic 1 Value Sent 0 to 1 (upward transition at bit centre) 1 to 0 (downward transition at bit centre)

Figure: 1 The chief advantage of Manchester encoding is the fact that the signal synchronizes itself. This minimizes the error rate and optimizes reliability. The main disadvantage is the fact that a Manchester-encoded signal requires that more bits be transmitted than those in the original signal.

Figure: 2

Manchester Encoding with XOR Gate

1. Manchester Encoder: There are several ways of designing a Manchester Encoder. But doing it The PSoC Way requires just an SPI (Serial Peripheral Interface) Master and an XOR Gate. When the SPI Master is configured to operate in Mode 0 where the data is setup on falling edge of the clock and data is latched on the rising edge. The idle state of the clock output is low. The MISO pin of SPI Master is set to low so that the idle state of the MOSI is low. The MOSI of SPI Master is XORed with the clock to obtain Manchester Encoded data. When the MOSI is low, the XORed output follows the clock. Hence there is a transition from low to high (rising edge = 0).When the MOSI is high, the XORed output is an inverted version of clock. Hence there is a transition from high to low (falling edge = 1). The output thus obtained is in Manchester encoded format. The waveform shown in Figure 3 demonstrates the same.

Figure: 3

The schematic shown in Figure 4 represents the implementation in PSoC 3.

Figure: 4 The encoded output is to be fed to the Manchester Decoder unit. 2. Manchester Decoder: The decoder implementation used here is not based on the direction of the mid bit edge (rising or falling edge), but it is based on the fact that the bit value is present during the first half of bit time, prior to the transition edge. If a delay of 3/4th bit is triggered by the incoming mid bit transition, the value captured at the end of the delay represents the next bit value.

Figure: 5 The clock has to be recovered from the incoming Manchester encoded data signal. As mentioned before, a delay unit is used to obtain the actual data signal. This signal when XORed with the Manchester encoded data gives the Clock. The waveform is shown in Figure 6.

Figure: 6 A Manchester Decoder block diagram is as shown below:

Figure:7 From the block diagram, it can be seen that the main functional units are: An XOR Gate Used to derive the Clock which in turn triggers the Delay unit. A Delay Unit Produces a delay of 3/4th bit period. A D Flip-Flop Used to hold the Serial data out.

Reference: http://www.cypress.com/?rID=55345