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Packet over SONET Interface

A Design Strategy
W H I T E P A P E R - December 2001 Ravishankar K Jinu Koshy

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Packet over SONET Interface

Table of Content
Introduction ....................................................................................................01 Packet over SONET Technology Evolution .........................................................01 Packet over SONET architecture ......................................................................02 Wipro s Packet Over SONET Porfolio ................................................................03 Designing Packet over SONET Interfaces ..........................................................06 Design Approaches for Packet over SONET Interface ..........................................07 Wipro is best suited to provide a POS solution ...................................................08 Conclusion ......................................................................................................09 About the Authors ............................................................................................09 About Wipro ....................................................................................................10 Wipro in Telecommunication Technologies .........................................................10

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Introduction
Synchronous Optical Network / Synchronous Digital Hierarchy (SONET/SDH) and optical fiber have dominated the technology-scenario for building large-scale, high-speed, Internet Protocol (IP)-based networks. The high-bandwidth capacity available for transporting data is the major reason for its explosive use in the Internet and large enterprise data networks. The problem with conventional networks, when conversion happens to ATM (IP-over-ATM) is the overhead imposed by ATM cell headers (5-bytes out of every 53-bytes), sometimes referred to as the cell tax. Additional overhead is added by AAL5 (padding, 8-byte trailer). IP achieves only about 80 percent of the available line rate when operating over ATM. This paper describes the Packet Over SONET/SDH (POS) technology and Wipro's FPGA core implementing a SONET/SDH to POS mapper. It is addressed to engineering managers who wish to add the Packet Over SONET/SDH Interface to their product range. Wipro's FPGA core and engineering skills could be leveraged for arriving at a costeffective, early-to-market solution for POS.

1. Packet over SONET Technology Evolution


RFC 1662 describes a point-to-point protocol (PPP), HDLC-like framing method to encapsulate data for transmission in SONET/SDH payload. IP-over-SONET as opposed to IP-over-ATM eliminates the overhead imposed by the cell tax. IP achieves 95 percent of the line rate when running over SONET. The added capacity when running IP-over-SONET is very compelling when expensive wide-area or otherwise bandwidth-constrained links are used for interconnecting backbone routers. Packet over SONET (PoS) technology, thus allows efficient transport of data over SONET/ SDH The advantage of PoS is its flexibility that allows it to be used in a variety of transport applications. For example, it finds use in network backbone infrastructures and data aggregation or distribution on the network edge and in the metropolitan area. Router PoS interfaces are frequently connected to Add Drop Multiplexers (ADMs), terminating point-topoint SONET/SDH links.

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2. Packet over SONET architecture


Packet Over SONET details
The Packet over SONET sequence is depicted below in a diagram. The blocks are explained below in the following sections:

PPP Over SONET/ SDH RFC 2615

Mapping Scrambling

RFC 1662 PPP in HDLC-like framing

PPP RFC 1661

IP Pack

Figure 1: Packet over SONET Blocks ................................................................................................................................

Point to Point Protocol


The Point-to-Point Protocol is designed for simple links, which transport packets between two peers. These links provide full-duplex simultaneous bi-directional operation, and are assumed to deliver packets in order. It is intended that PPP provide a common solution for easy connection of a wide variety of hosts, bridges and routers. PPP is comprised of three main components:
n n

A method for encapsulating multi-protocol datagrams. A Link Control Protocol (LCP) for establishing, configuring, and testing the datalink connection. A family of Network Control Protocols (NCPs) for establishing and configuring different network layer protocols.

Encapsulation
The PPP encapsulation provides for multiplexing of different network-layer protocols simultaneously over the same link. RFC 2615 specifies the use of PPP encapsulation over SONET/SDH links. PoS frames are mapped into SONET/SDH frames and they sit in the payload envelop as octet streams aligned on octet boundaries.

Link Control Protocol


In order to be sufficiently versatile to be portable to a wide variety of environments, PPP provides a Link Control Protocol (LCP). The LCP is used to automatically agree upon the encapsulation format options, handle varying limits on sizes of

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packets, detect a looped-back link and other common mis-configuration errors, and terminate the link.

Network Control Protocols


Point-to-Point links tend to exacerbate many problems with the current family of network protocols. For instance, assignment and management of IP addresses, which is a problem even in LAN environments, is especially difficult over circuitswitched point-to-point links (such as dial-up modem servers). A family of Network Control Protocols handles these problems (NCPs). There are many Network Control Protocols available. One of these is IPCP, a network control protocol for IP which assigns the IP addresses through negotiations and brings up the interface.

HDLC Framing
PoS uses PPP in High-Level Data Link Control (HDLC)-like framing (as specified in RFC 1662) for data encapsulation at Layer 2(data link) of the Open System Interconnection (OSI) stack.

PoS Security through scrambling


RFC 2615 recommends payload scrambling and a safeguard against bit sequences, which may disrupt timing. In addition to high-bandwidth efficiency, PoS offers secure and reliable transmission for data. Reliable data transfer depends on timing integrity. SONET/SDH timing information is obtained by filtering state transitions through a phased-locked loop (PLL). A severe drift of the receiving clock will cause signal or data loss. Although this is highly unlikely in normal conditions, it is prudent to guard against incorrect payload bit sequences that could cause such problems.

3. Wipro s Packet Over SONET portfolio


Wipro has developed FPGA and software that caters to the needs of a Packet over SONET design. These are the FPGA implementation for the Packet over SONET and the software implementation of the PPP module.

Wipro Packet Over SONET Controller


Wipro has designed and implemented a Packet over SONET Controller. The details of this design are described in the following sections.

Packet over SONET Controller Features


The following are the features of the Wipro Packet over SONET Controller Core:
n n n

Implements RFC 2615 POS and RFC 1662 HDLC like framing specifications Supports STM-4 (OC-12) framers Supports 16- or 32-bit FCS verification

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(Optional) Provides statistics for the number of received packets and error packets received (Optional) Provides signals for packets received with abort, CRC error, short, long, address and control error, protocol error, and dropped packets.

Block Diagram
The following section provides the details of the Wipro Packet over SONET SONET/ SDH Controller. The shaded blocks are the ones for which development is already complete in FPGA. Based on the needs of the customer, the SONET/SDH Interface as well as the POS PHY Interface can be implemented.

HDLC DE-FRAMER
DeScrambler

PPP De-encapsulation MPLS Logic Protocol Field Filtering

Frame Delineator Destuffer Logic

LEGEND
Block Ready with Wipro

FCS Validation HDLC Statistcs

IP Layer Statisticstics

PPP/IP Bypass POS-PHY PL3/4 interface PPP Encapsulation MPLS Logic

Generic SDH Interface

Scrambler

HDLC FRAMER IDLE Pattern Insertion logic Packet Abort Sequence Insertion logic Byte Suffing FCS Computation

Protocol Field insertion

Datagram Generation (Optional) IP Header insertion TCP/UDP Header TCP/UDP Data Generation
(eg. PRBS)

Figure 2: SONET/SDH Maper to POS Details ................................................................................................................................ Wipro Technologies Page : 04 of 10

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Description
The Wipro Packet over SONET controller implements RFC 2615 POS (Packet Over SONET) and RFC 1662 HDLC like framing which allows an 8-bit data stream to be encapsulated into packets. The transmitter takes data and performs flag, address, control, and protocol field insertion, escape character stuffing, and FCS insertion. The receiver extracts data, checks address, control, and protocol fields, performs escape character de-stuffing and verifies the FCS.

FCS computation
The transmit data will be passed through a FCS computation block. The FCS will be computed over the entire incoming packet including padding. (Without the flag sequences and the stuffed bytes). This module does computation of FCS using the CRC-CCITT or CRC-32 method. The default method used is CRC-32.

Packet abort sequence


During Transmission, this module ensures the insertion of the Packet Abort Sequence in case of under run of packet data.

MPLS label insertion


Following the protocol, the MPLS field will be inserted if the MPLS is enabled. The length of the MPLS field is specified as 1,2 or 3 labels.

Frame delineation
The receiver will receive a parallel data with respect to the receiver clock. The start of frame will be indicated by the start flag sequence 7E . The data will be received only if the DATA_ENABLE is asserted. The assertion of this DATA_ENABLE indicates that the data is being received. No data will be available when this signal is de-asserted. A continuous reception of 7E will indicate an idle frame and will be ignored by the receiver. The flag sequence followed by a non-7E data will indicate the beginning of a frame and will be received. The start flag will be dropped/ ignored and the following data will be passed for further processing.

MPLS validation
The user defined MPLS values will be stored in the buffer against which the received MPLS labels will be validated.

FCS Validation
The receive data will be passed through a FCS validation block. The FCS will be computed over the entire incoming packet including padding. (Without the flag sequences and the stuffed bytes). This module does validation of FCS using the CRC-CCITT or CRC-32 method. The default method used is CRC-32. The FCS received from incoming stream will be validated against computed FCS.

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Destuffer
The descrambled data will be fed to the destuffer. Here the bytes stuffed for adding transparency during transmission, i.e. to prevent false interpretation of 7Ein the data as flag sequence, will be removed.

4. PPP Module
As part of WIPTCP, a TCP/IP stack for Embedded systems, Wipro has developed a module that conforms to the RFC-1661. This module defines the PPP encapsulation, option negotiation mechanism that is able to negotiate a rich assortment of configuration parameters. Wipro has implemented LCP and IPCP, a network control protocol for IP (NCP for IP) that assigns the IP addresses through negotiations and brings up the interface. This PPP module is available on x86 and MPC8xx platform on VxWorks Operating System. Designers could use this module to implement the PPP Finite State Machine.

5. Designing Packet over SONET Interfaces


This section explains the design considerations for Packet over SONET interface to a SONET/SDH line card.

SONET/SDH LINE CARD with POS Interface

Optical Transceiver

Clock Extraction PLLs

SERDES

SONET/ SDH Framer

SONET/ SDH/ Mapper to POS

System Interface

PROCESSOR

SD RAM

FLASH

Figure 3: SONET/SDH Line Card with POS Interface ................................................................................................................................

The above diagram depicts a SONET/SDH Line card with POS Interface.

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The Optical Transceiver performs Optical to Electrical conversion as well as Electrical to Optical conversion. The Clock Extraction module extracts the clock in the receive side from the receive traffic. The SERDES module is a serializer / deserializer for parallel to serial conversion and vice-versa. The SONET/SDH Framer performs framing as per standards. The POS Mapper performs SONET/ SDH mapping to POS. The System Interface module is the interface to the switch. The Processor Interface allows software control of the devices on board.

Design Approaches for Packet over SONET interface


There are two approaches that could be adopted to design a Packet over SONET interface. These approaches are discussed below:

FPGA based approach


The Packet over SONET standard could be implemented in an FPGA such as the one described in Section 5 of this document. The advantage of the FPGA based approach is the flexibility it provides in terms of future feature enhancements. If the existing SONET/SDH line card has an FPGA in the system interface side, Wipro could study the existing board design and recommend changes. The FPGA could be upgraded with an image that includes the POS implementation as well. The issues that need to be considered here is the co-existence of the POS logic with the existing logic and the overall logic code fitting in the FPGA- if need be, larger-sized FPGA with the same footprint needs to be included. If the existing SONET/SDH line card does not have an FPGA in the system interface side, the board could be respun to include an FPGA. This FPGA then could implement the POS standard.

Framer based approach


In case a new line card with POS interface needs to be designed, the POS interface could be achieved by using an Off-the-shelf framer that supports POS framing as well. Wipro could design and implement this card.

Testing Packet over SONET/SDH


There are a couple of key issues to be addressed when testing Packet over SONET/SDH implementation:

a. Byte stuffing/destuffing logic


A IP packet containing all 7D/7E results in doubling of packet size after insertion into HDLC frame. This causes maximum stress on byte stuffing and destuffing logic. This tests the flow control mechanism between the line card and the routers egress/ingress buffer.

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b. Send minimum size packets at full rate


This tests the maximum rate of FCS calculation and also is a good test of overall line card s frame handling capacity. The above two aspects test the handling of data at Layer 2 at wire speed rates.

6. Wipro is best suited to provide a POS solution


Engineering shift
There is a definite shift in product engineering today, away from developing everything in house . Network equipment vendors are increasingly looking out for components, so that they could concentrate on fine-tuning system architecture. Engineering relationships across company-boundaries are taking birth so as to leverage the competencies available. With product development cycles crashing significantly, faster time-to-market assumes high emphasis. By contracting relevant portions of development to companies like Wipro, engineering departments could focus on development of newer modules. In this context, Wipro s building blocks in the form of the Packet Over SONET/SDH Controller Core could be used to add POS interfaces to existing communication equipment.

The Wipro Advantage


Optical Networking is a complex technology that requires several years of experience for developing high quality solutions. WIPRO has a great deal of expertise and practical system know-how with Optical Networking technology. Wipro has undertaken key projects in the Optical-Networking arena that include turnkey product development from market analysis through production. Wipro possesses two decades of experience in VLSI and system software design. This technological strength is supported by world-class procedures, which ensure our customers that the product they receive is fully operating, and fully tested, thus saving several weeks in time-to-market. Wipro s building blocks and expertise on POS can help bring customers significant time-to-market advantage to custom configure communication equipment with a POS interface.

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7. Conclusion
Clearly, Packet over SONET/SDH is finding favor with network managers in their quest to optimize their networks for the dominant applications. POS takes advantage of the existing SONET/SDH infrastructure to better support IP Wipro s Packet Over SONET building blocks and expertise should be useful for costconscious engineering managers who are planning to add POS Interface to the existing range of Internet infrastructure equipment. 7.1 Acronyms ADM ATM FPGA HDLC IPCP LCP NCP OSI POS PPP RTOS SDH SERDES SONET Add Drop Multiplexer Asynchronous Transfer Mode Field Programmable Gate Array High Level Data Link Control Internet Protocol Control Protocol Link Control Protocol Network Control Protocol Open System Interconnection Packet Over SONET / SDH Point-to-Point Protocol Real Time Operating System Synchronous Digital Hierarchy Serializer - Deserializer Synchronous Optical Network

About the Authors


Ravishankar K is a specialist in VLSI and System Design at Wipro technologies and has been working for 6 years in the area of FPGA, ASIC and board designs in Networking and Multimedia systems. Jinu Koshy is a Software specialist at Wipro Technologies and has been working for 9 years in the area of Telecom Software. His current area of work includes Optical Networking.

Contact Us
if you need to contact us regarding any clarification of feedback, mail us at info@wipro.com Wipro Technologies Page : 09 of 10

About Wipro
Wipro Technologies is a part of Wipro Limited (NYSE:WIT) and is a leading global provider of high-end IT solutions. The IT solutions provided include application development services to corporate enterprises and product engineering services to technology companies. The company's top clients include Nortel, Cisco, Canon, Fujitsu, Microsoft and Alcatel, to name a few. With over 10000 consultants Wipro integrates people processes and technologies to deliver innovative solutions that enable implementation of product development strategies efficiently and cost-effectively. Wipro is also the first IT services company in the world to achieve the highest level of quality certification, the SEI-CMM Level 5. Wipro currently runs large development facilities for industry leaders and start-ups alike, and has more than 4000 consultants focused on communication hardware and software alone.

Wipro in Telecommunication Technologies


Wipro solutions for the technology sector are in areas of Optical networking, Data networking, Wireless networking, Voice switching, and Network Management systems. These solutions span across a vast spectrum of technologies in the hardware (VLSI, FPGA, Board design, DSP, RF), embedded software (VxWorks, EPOC, pSOS) and Network Management software (CORBA, UML, SNMP, TL1) and many more. With over 10 years of experience in the telecom space, Wipro offers engineering services like architecting, design, development, verification, validation and maintenance.

Copyright 2001. Wipro Technologies. All rights reserved. No part of this document may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise, without express written permission from Wipro Technologies. Specifications subject to change without notice. All other trademarks mentioned herein are the property of their respective owners. Specifications subject to change without notice.

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