Lab 1: Getting Started with XCircuit and IRSIM Simulation

Developed by: Basawaraj Last Modified Apr., 2011

Requirements:
Before starting this lab please read the following documents from the tutorial section of Xcircuit & IRSIM: http://opencircuitdesign.com/xcircuit/usage.html http://opencircuitdesign.com/xcircuit/tutorial/tutorial.html http://opencircuitdesign.com/irsim/tutorial/tutorial.html These pages will provide you with a understanding of the capabilities of the tool, and will help you in completion of this lab.

INTRODUCTION:
This lab intends to illustrate the traditional front-end logic design procedure for VLSI, by developing a very simple inverter into your own logic parts library. You will learn to use XCircuit to create and simulate circuits. This lab will cover: 1. Schematic capture 2. Symbol creation 3. IRSIM simulation

Schematic capture:
After logging into a workstation, start running XCircuit using the command: % xcircuit Xcircuit's main drawing window has a menu button for "Netlist" and two buttons at the bottom lefthand corner, one of which (normally, on startup) is colored gray and labeled "Symbol", and the other which is colored red and labeled "Schematic." The bottom buttons can be interpreted to mean that the current page is a schematic drawing, and this schematic has no corresponding symbol (more about this later). To the right of the Schematic button it says " Page 1", indicating that the name of the current schematic is "Page 1". This happens to be an invalid name, since most netlist formats and PostScript don't allow names with spaces in them, and XCircuit will tend to complain if you try to write a netlist or save the schematic before changing its name.

2. This section outlines some of the features of xcircuit used to make a simple circuit. In this and the following section, you will create an NAND gate and make it into a symbol to be used later as a subcircuit. First we will draw a circuit using simple (default) devices. a. Drag the elements which you need from the "Generic" library page to (a clean) Page 1. Namely, the nMOS, pMOS, Vdd, and GND symbols. b. Duplicate elements (copy (c), flip (f)) as necessary and connect with lines to produce the following transconductance amplifier schematic:

Image 1 c. Either drag the "dot" object from the library page or use the period key (".") to place

connections between the wires at junctions. This is not strictly necessary, as xcircuit will deduce connectivity from the T-connections of wires, not from the "dot" symbols; it is merely a matter of preference depending on the style with which you like to draw circuits. In the case of wires crossing at a junction, the dot is necessary since crossing wires generally do not indicate a connection in schematic diagrams. You may also use a "jumper" object to indicate that two crossing wires do not connect although this, like the use of dots at T-junctions, is a matter of style and personal preference. d. Add "circle" connections at the inputs and outputs. Once again, this is a matter of style; the actual inputs and outputs from the netlist's point of view will be indicated by pin labels (see next step). The resulting diagram looks like the following:

Image 2 e. Because the NAND gate will be a SPICE subcircuit, it is necessary to tell the netlist generator where the input and output ports are. For this, you need pin labels. Pin labels differ from ordinary labels in several ways: By default, they are colored red (though this can be changed), and are placed with a slight offset from their marked positions, so the position marker can be used as a tag to indicate what wire the label is attached to. Additionally, the marked position is visible on the drawing, since its exact location with respect to wires is critical to the resultant netlist. Finally, pin labels appear (that is, you will see them) only on the top level of the hierarchy. To generate the pin label, type key macro (capital) T, or choose menu item "Netlist->Make Pin". Set justification as desired and place the "x" marking the pin position over the "o" of the circle objects, or on top of a wire. The pins in this NAND will be labeled "a", "b", and "outl".

Image 3

Symbol Creation:
f. Now it's time to turn this schematic into a symbol, that is, to make a symbol which can be be used to create larger circuits. First we have to save this design. Name the schematic "NAND2" (so we know it is a 2 input NAND gate) by going to: File -> Write All.. to get the following dialog box:

Image 4 click on the button 1 under Pages to get PostScript Output Properties dialog box. Enter NAND2 into the Filename: box, and clicking "Apply" (you don't have to write the file yet). Note that Page label: box is also changed to NAND2. Close the dialog box.

Image 5 g. Now, we want to make a symbol corresponding to the schematic. XCircuit version 3.6 has a useful tool for doing all the hard work. Select the menu item "Netlist->Make Matching Symbol". You will get a dialog box that looks like the following:

Image 6 The default symbol generated by "Make Matching Symbol" will be a box (you can change this later if you wish), and the placement of pins around the symbol's bounding box is shown in the columns in the middle. The "Move" buttons at the bottom allow you to rearrange the pins. Put "a", and b on the left, and "outl" on the right by clicking on each pin name and then clicking the appropriate button at the bottom (note that the initial placement of pins is only a convenience; pins in the symbol drawing can be modified at any time after the symbol is created).

When you are done with the initial pin placement, select "Okay" to create the symbol. The first thing you should notice is that some info labels have been added to the schematic. These define the subcircuit definition for the schematic "NAND2" and define the ordering of pins. Several things to note about these info labels:
spice1:.subckt %n a b outl spice-1:.ends

The first line defines the format of the SPICE line. The "%n" gets substituted with the name of the schematic when written to the SPICE output file; in this case, the word "NAND2". The line tag "spice1:" indicates that the line will be the first line output for this subcircuit (before any components internal to the subcircuit), and the line tag "spice-1:" indicates that the line will be the first line output after all components have been written (since there are no lines "spice2", "spice-3", etc., this will therefore also be the last line written for this subcircuit. Another change is that the button in the lower left-hand corner of the XCircuit window with the text "Symbol" is now highlighted black and white. Click on it to see the new symbol for "NAND2" Note: Another option is to use an existing symbol from the library. You can use the symbol "nand" from the Generic Library as the symbol for the schematic you just drew. Choose menu item "Netlist->Associate with Symbol" (note that this is the same button that used to be "Disassociate"). You are transported to the library directory, with the instructions in the message window to "click on the library page, then the object to associate". Click on the generic library page (the one containing the nand symbol). Click on the symbol "nand". You will be returned to the original schematic page, and once again, the buttons in the window's lower-left-hand corner are red and white, indicating that you are on the schematic page (red) but can move to the symbol page (white). h. To save the schematic and its symbol: File -> Write All... Click Write in the dialog box that appears. i. Now we have to create the netlist file for simulation using IRSIM. For this go to the schematic page (Page 1, or "NAND2"). From the menu, select "Netlist->Write sim". The message label will read "flatsim netlist saved as NAND2.sim". (You can also create a Spice netlist using Netlist -> Write Spice, to create a NAND2.spc file that you can use to do a Spcie simulation using Spice3, hspice, pspice, etc.)

IRSIM Simulation:

Image 7

Create a command file, NAND2.txt, to store commands that you would like to run. This file can be used to automate the simulation using IRSIM. Any text editor can be used for this. You can create a file with the commands shown in Image 7. The commands mean the following: Line 1: stepsize 50: The basic idea of IRSIM is that you tell it which nodes to pull high, which nodes to pull low, which nodes to tristate, and then you tell IRSIM to run the simulation for a certain period of time. This period of time is the stepsize. The above command tells IRSIM that the stepsize is 50ns. Line 2: analyzer a b outl: This specifies the pins/ports that you would like to observe on the logic analyzer display, i.e., in the analyzer, and their order. Line 3: vector in a b: To set inputs to high or low, the following commands are required. 1) h vdd, 2) l gnd 3) l names of input pins to be driven low 4) h names of input pins to be driven high 5) repeat steps 3 & 4 for all possible combinations. If you have a long list of inputs, it can be tiresome to keep using the l and h commands to set the logic values. The 'vector' command lets you group inputs together so that you can set them all quickly. The above command tells IRSIM to group the nodes a and b into a vector called 'in'. Line 4: setvector in 00: This command tells IRSIM to set the vector in to (binary) 00. Therefore, node a = 0, and node b = 0. Line 5: s: s tells IRSIM to simulate for a certain period of time previously defined by the stepsize command of line 1. Lines 6, 8, and 10 give the different input combinations that are possible; and lines 7, 9, and 11 tell IRSIM to simulate for each of those individual values. Start running IRSIM using the command j. irsim scmos100.prm NAND2.sim NAND2.txt Where NAND2.sim is the simulation file, scmos100.prm is a standard parameter file for a 2.0 micron process technology and NAND2.txt is the command file. In addition, you can mix command files and the interactive interpreter by running irsim with irsim scmos100.prm NAND2 and then executing the (Tcl) command source NAND2.txt Image 8, below, shows the output. If the output matches your truth table you have successfully created the schematic for your circuit and also simulated it.

Image 8 Note: The above lab page is based on / created from the following webpages: 1. http://opencircuitdesign.com/xcircuit/tutorial/tutorial2.html 2. http://opencircuitdesign.com/xcircuit/tutorial/tutorial3.html 3. http://opencircuitdesign.com/irsim/tutorial/tutorial.html