Download as pdf or txt
Download as pdf or txt
You are on page 1of 7

22.

VLSI in Communications

Institute of Microelectronic Systems

State-of-the-art
RF Design, Communications and DSP Algorithms Design Isolated goals results in: - higher implementation costs - long transition time between system level design and final implementation VLSI Design

Performance Improvement

Power-Area-Speed optimization Flexibility Risk minimization

22: VLSIinCOMMS

Institute of Microelectronic Systems

Trends
RF Design, Communications and DSP Algorithms Design Trade-off during the development
(Interdisciplinary Issue)

VLSI Design

Performance vs. VLSI-relevant design aspects

Algorithmic transformation techniques Architectural transformation techniques Low-power design of baseband processing Low-power RF design Analog-digital co-design methodologies High-speed low power AD/DA converters
22: VLSIinCOMMS Institute of Microelectronic Systems 3

Challenge
Towards complex on-chip wireless system design The increasing communication and multimedia processing can cope with the high integration density of microelectronic circuits 1. Key ingredients - maximize digital components - minimize analog, passive elements (i.e. Simplification of design requirements of analog components, moving to digital processing as early as possible) - Low power design techniques 2. Analog portions continue to dominate power consumption Example: DS-CDMA RX (32 MHz chip) realized in 2 chips using 0.8 CMOS Analog front-end (amp, sampling, demod, AD/DA) Digital baseband signal processing
Institute of Microelectronic Systems

107 mW 27 mW

22: VLSIinCOMMS

Design Flow: Overview


Digital Baseband Processing

System Design
System Description
Modeling Language
e.g. Matlab, C, C++, SDL, ...

SOFTWARE
Code Generation Compiler

Simulation and Analysis


Frequency Spectrum

Digital
Hardware Description (VHDL, Verilog)

Optimization

HARDWARE
Synthesis (RTL, High Level) Placement & Routing

Graphical Environment
Dataflow-oriented
(e.g. Signal Processing)

Eye Pattern

Bit Error Rate Tools:Cossap, Simulink, SPW, ...


10 10 10
0

AWGN 6Mbps 9Mbps 12Mbps 18Mbps 27Mbps 36Mbps 54Mbps

Analog & RF Design


35

Bit Error rate

10 10 10 10 10

10

15 C / N [dB]

20

25

30

Analog

Controlflow -oriented
(e.g. Protocols) Tools: Statemate

Description (VHDL AMS, Spice, ...)

Simulation (SPECTRE, ...) Layout Generation

State Diagramm

ADC DAC

Data Path Control Logic

RAM

Goal

Analog RF

ROM

Cores (DSP, RISC)

22: VLSIinCOMMS

Institute of Microelectronic Systems

Overview: Generic Transceiver Architecture


ADC
I

D u p le x e r

LNA M ix e r VCO

IF M ix e r Dem od. IF P L L Q -

D ig ita l B a s e b a n d P ro c e s s in g
D iv e rs ity R e c e p tio n E q u a liz a tio n (R L S , V ite rb i) C h a n n e l C o d in g /D e c o d in g V o ic e C o d in g /D e c o d in g In te rle a v in g /D e in te rle a v in g E n c ry p tio n /D e c ry p tio n

ADC

DAC

Pow er A m p lifie r

M o d u la to r T ra n s m it P L L VCO

ANALOG

DAC

DIGITAL

22: VLSIinCOMMS

Institute of Microelectronic Systems

IC Technologies

22: VLSIinCOMMS

Institute of Microelectronic Systems

IC Technologies for Communication Applications


Which technology is the most suitable for future communication systems ? Criteria: Support of high frequencies Analog/digital integration capabilties High integration density Low RF and IF noise Low power consumption High gain

Portfolio of technologies: Silicon CMOS, SOI, BiCMOS and BJT Silicon-Germanium(SiGe) HEMT and HBT Gallium-Arsenide (GaAs) MESFET, HEMT and HBT HBT: Hetero Bipolar Transistor; HEMT: High Electronic MobilityTransistor; SOI: Silicon-On-Insulator; BJT: Bipolar Junction Transistor
Institute of Microelectronic Systems

22: VLSIinCOMMS

IC Technologies (contd)
SILICON CMOS fT up to 30 GHz fMAX up to 40 GHz (0.15 m) BiCMOS BJT

Features

fT up to 30 GHz fT up to 80 GHz fMAX up to 40 GHz fMAX up to 75 GHz

Application

Digital baseband Intermediate fre IF and RF mo Trends:RF, IF and quency (IF) modules analog baseband dules (1999)

CMOS is currently the best IC technology for single chip solutions (analog + digital) for communication applications CMOS technologies Advantages: Mature technology, high integration density, cost-effective Drawbacks: Bad noise figure, bad linearity, substrate parasitics
Institute of Microelectronic Systems

22: VLSIinCOMMS

IC Technologies (contd)
CMOS RF Design: Example

RF-frontend components (LNA, mixer and VCO) developed using standard CMOS processes Realization with separated dies LNA = Low Noise Amplifier VCO = Voltage-Controlled Oscillator
Source: Fraunhofer-Gesellschaft

22: VLSIinCOMMS

Institute of Microelectronic Systems

10

IC Technologies (contd)
SILICON GERMANIUM (SiGe) Features

HBT

HEMT

fT up to 130 GHz fT up to 30 GHz fMAX up to 160 GHz fMAX up to 120 GHz - LNA, PA, mixers, VCO, PLL - High speed DA and AD converters

Application

Advantages: - Easy integration into standard silicon processes (BJT, BiCMOS, CMOS) - Improved frequency response - Better cost/performance trade-off Disadvantage: - Technology process not mature
Institute of Microelectronic Systems

22: VLSIinCOMMS

11

IC Technologies (contd)
HBT SiGe RF Design: Example

(Source: Temic Semiconductors) (Source: Temic Semiconductors)

DECT LNA & PA Noise figure: 1.6 dB Gain: 26 dB @ 5.8 GHz Amplification: 27 dBm

GSM PA Amplification: 32 - 36.5 dBm Vop = 2 - 5.5 V

22: VLSIinCOMMS

Institute of Microelectronic Systems

12

IC Technologies (contd)
GALLIUM ARSENIDE (GaAs)

MESFET

HEMT

HBT

Features

fT up to 100 GHz fT up to 180 GHz fT up to 90 GHz fMAX up to 115 GHz fMAX up to 220 GHz fMAX up to 110 GHz - Amplifiers (PA, LNA), mixers - Ultrafast DA and AD converters (Gigahertz sampling rates)

Application

Advantages: - Good analog capabilities, high linearity, high-speed operations Disadvantages: - Expensive process, technology process not mature (in comparison to other processes such as CMOS)

22: VLSIinCOMMS

Institute of Microelectronic Systems

13

You might also like