Pinaki Mazumder

PODEM Algorithm

PODEM
PODEM: Path-Oriented DEcision Making (Goel 1981) Like D Algorithm, PODEM is circuit-based, fault-oriented ATPG algorithm Signal values are explicitly assigned at the primary inputs only; other values are computed by implication Justification is not needed Backtracking means reassigning primary inputs when a contradiction occurs; implicit enumeration technique A simple backtrace heuristic is used to select the next primary input line and the value to assign to it New concepts introduced: G Expand binary decision tree only around primary inputs G Use X-PATH-CHECK to test whether D-frontier still there
G G

IBM introduced semiconductor DRAM memory into its mainframes late 1970s Memory had error correction and translation circuits improved reliability G D-ALG unable to test these circuits
! ! !
G

Search too undirected Large XOR-gate trees Must set all external inputs to define output

Needed a better ATPG tool

Objectives -- bring ATPG closer to propagating D (D) to PO Backtracing

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PODEM Flow Chart

Start Assign a binary values to an unassigned PI

Step 1. Assign binary value to unassigned PI Step 2: Determine implications of all assigned PIs Test Generated? If so, done.

J K L M

1 1 1 1

G1

D SA1

G2
1 2

G3 D G4
1 3 2

G7
1 2 3 4

Determing implications of all assigned PIs

YES

EXIT DONE

Test generated?
NO Test possible with additional PIs? NO MAYBE

Test possible with more assigned PIs? If maybe, go to Step 1 Is there untried combination of values on assigned PIs? If not, exit: untestable fault Set untried combination of values on assigned PIs using objectives and backtrace. Then, go to Step 2
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N 1

G5
1 2

G6
1 2 3

EXIT Untestable Fault

NO

Is there an untried combination of values on assigned values YES

1 Find the Test vector that tests SA1 fault at G1. D-Drive: G2 && {G3 || G5} && G7.
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Set untried combination of value on assigned PIs

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PODEM Example
J K L M 1 1 1 1 G1 D SA1 1 2 G2 D G3 D G4 1 3 2 G5 1 2 G6 1 3 2 G7 1 2 3 4 D

How PODEM Works

B acktrace 2. (c, 1) a b 1. Initial objective (f = 1) 2. B acktrace 1 (b, 1) 3. PI assignment (b =1) c e d f B acktrace 1 (b , 1)

1 D

N 1

Iteration Objective Backtrace Implication J=1 1 G2.1 = 0 K=1 G6.3 = 1 2 G2.1 = 0 M=1 G2.3 = D 3 G2.2 = 1 N=1 G5.3 = D' 4 G5.1=1 5a G7.1=1 L=0 G7.5 = 1 5b Retry L=1 G7.5 = D

D-Front {G2} {G3, G5} {G3, G7} {G3, G7} None

4. Imply 5. B acktrace 2 (c, 1) Test: (JKMNL)=(11111) M=1 M=0 N=0

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J=1 J=0
Test Generation

K=1 K=0

N=1 L=0

L=1

6. PI assignment (a = 0) 7. Imply (d = 0)
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Comparison Between DD-ALG & PODEM

Start
All PIs are set to X

b a c A H B C B/1 E F G Z

PI1= 1 Initial assignment PI2 = 1 unused alternative assignment PI3 =1 Node removed PI4 = 1 PI4 = 0 PI4 = 0

PI1=0 unused alternative assignment PI1= 1 Initial assignment

e b

D-Algorithm
Decision 1 B=D' b=1 F=0 H=0 c=0 Implication E=D', A=0, a=0 C=D' Z=D' e=0 Comment Activate fault Propagate via G End of D-Drive Jusitify F

PODEM
Decision Implication Comment
Initial objective (B, 0)

No remaining alternative

2 3

1 2 3

a=0 c=0 b=1 A=0, B=D', E=D b'=0, C=D' H=0, F=0, Z=D'

Backtrace, Imply Backtrace, Imply Objective (b,1), Imply Objective (F,0); Imply; Success

PI4 = 1

4 5

Backtrack No test

PI5 = 1 Backtrack No test

PI5 = 1

Test = (a, b, c, e)= (0100) Order of PI assignment: a, b, e, c.

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e=0

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D-ALG v.s. PODEM

D-Algorithm
Emphasis on D-propagation Too much backtracking (undoing a previous decision and making a different choice) in some circuits. All possible choices may have to be tried in the worst case Some faults require multiple path sensitization

Example Fault s sa1

Primitive D-cube of Failure

PODEM
Less backtracking Sets a subset of inputs one by one Propagates D after initial objective is reached

1 D

sa1
Run Time Fault Coverage PODEM 100.0 100.0 99.5 97.4 96.6 D-ALG 99.7 93.1 99.5 97.4 96.6
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Comparison of speed between PODEM & D-Algorithm

# of Cells ckt #1 ckt #2 ckt #3 ckt #4 ckt #5
Test Generation

PODEM 1 1 1 1 1

D-ALG 34.5 12.8 2.2 3.1 3.2

828 935 951 1,566 1042

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Example 7.3 Backtrack

Need alternate propagation D-cube for v

Example 7.3 -- Step 2 s sa1

Initial objective: Set r to 1 to sensitize fault

0 sa1 D

sa1

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Example 7.3 -- Step 3 s sa1

Backtrace from r

FAN: FanFan-out Oriented ATPG Algorithm

FAN: Fan-out Oriented ATPG Algorithm (Fujiwara & Shimono, 1983) Representative of PODEM-based ATPG algorithms that add various heuristic speed-up features FAN drops or alters some of basic features of PODEM: G it halts backtracking at certain internal lines G it tries to satisfy multiple objectives at once (multiple backtrace) G it allows backward as well as forward implications G it makes quick and easy assignments directly

sa1

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PODEM Fails to Determine Unique Signals FAN -- Fujiwara and Shimono (1983)
New concepts: G Immediate assignment of uniquely-determined signals G Unique sensitization G Stop Backtrace at head lines G Multiple Backtrace Backtracing operation fails to set all 3 inputs of gate L to 1 G Causes unnecessary search

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FAN -- Early Determination of Unique Signals

PODEM Makes Unwise Signal Assignments

Blocks fault propagation due to assignment J = 0 Determine all unique signals implied by current decisions immediately G Avoids unnecessary search

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Unique Sensitization of FAN with No Search

Headlines

Path over which fault is uniquely sensitized

FAN immediately sets necessary signals to propagate fault Headlines H and J separate circuit into 3 parts, for which test generation can be done independently

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Contrasting Decision Trees

Multiple Backtrace
FAN breadth-first passes 1 time

FAN decision tree PODEM depth-first depth passes 6 times

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PODEM decision tree

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Comparison Between PODEM & FAN

computing time
SPS PODEM FAN

Random Test Generation

L = length of random test 2 log(1 / QD ) n : # of PIs 1 QD : Detection quality # fi t t ll i th d t ti f h df lt
n

circuit characteristic
# of gates 718 1003 1456 2002 2982 # of fanout/# of faults 381/1871 454/2748 579/3428 806/5350

avarage # of backtracks
SPS PODEM FAN

ckt #

# of I/O

ECC ALU1 ALU2 ALU3 ALU4

33/25 233/140 50/22 178/123

5.2 4.5 14.5 3.1 3.4

1.3 3.6 5.6 1.9 4.8

1.0 1.0 1.0 1.0 1.0

31.2 51.7 189.7 1.5 38.1

4.9 42.3 61.9 5.0 53.0

1.2 15.2 0.6 0.2 23.2

70% 60% Fault Coverage Random Phase

Apply deterministic

207/108 1300/7550

HTDF: Hard-to-detect-fault MDTDF: most difficult to detect fault

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History of Algorithm Speedups

Algorithm D-ALG PODEM FAN TOPS SOCRATES Waicukauski et al. EST TRAN Recursive learning Tafertshofer et al. Est. speedup over D-ALG (normalized to D-ALG time) 1 7 23 292 1574 ATPG System 2189 ATPG System 8765 ATPG System 3005 ATPG System 485 25057 Year 1966 1981 1983 1987 1988 1990 1991 1993 1995 1997

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