LN004 / JohnStone / 2013-02-20

V1
Page 2 of 26

Exzerpt
This document describes a fast switching FET driver circuit dedicated to asymmetric motors.



List of Contents
Scope of this document: ............................................................................................. 4
Basic Knowedge ........................................................................................................ 4
!verview ..................................................................................................................... "
#ircuit ......................................................................................................................... $
!pto %Section #& ...................................................................................................... $
Signa #onditioning ' Power on (isabe %Section (& .............................................. )
FET driver %Section E& ........................................................................................... *+
FET Stage %Section F& ........................................................................................... *,
#ircuit Board ............................................................................................................. *-
Bread board .............................................................................................................. *$
.ssemby .................................................................................................................. *$
/iring Procedure ...................................................................................................... *)
Precautions at (ifferent #ircuit .reas ....................................................................... *0
Basic Testing of the #ircuit ....................................................................................... ,1
Some 2ints out of the Forum .................................................................................... ,1
Testing and Tuning ................................................................................................... ,-
Further 3nowedge .................................................................................................... ,-
.PPE4(56 ............................................................................................................... ,"



Page 3 of 26
Author
4ame: 7ohn Stone
Profession: Engineer in eectronics and humbe apprentice in radiant science
8ocation: Somewhere in a rura area in the goba viage

The author performs this research in order to bring honor to the creator and hep protect his creation.
Disclaimer
The contents described herein are for education ony. 9ou are not encouraged to repicate items
described herein. The author ta3es no responsibiity for any damage: in;ury or other disadvantage
occurring.
Policies:
.nybody is encouraged to copy and forward this document at wi as ong as the content is not
modified.
<uotations are aowed unmodified ony with added reference %tite and version& and internet in3 if
possibe.
Intellectual Properties
.s far as the author is aware there are no facts described herein pending to any inteectua property
being protected.
. contents are open source and =>ST 4!T be patented or caimed to be private in any way.
Glossary
FET fied effect transistor


Page 4 of 26
Scope of this document:
(ue to the fact that many members of energetic forum are not educated in eectronic
matters this document sha hep anybody to buid a high ?uaity driver dor own
e@periments.
Basic Knowledge
The notions beow were pubished in Energetic Forum by the author in !ct. ,+*,.
Everybody sha understand that the matter is far compicated but these notions may
suffice in order to get the basic understanding for buiding drivers i3e presented
herein.
1. FETs are modern electric valves with some very superior properties compared to
transistors. This makes them a primary choice in order to switch high currents along low
loss.
But FETs will perform well only if they are kept within their area of wellness.
Unfortunately many of you do not now these conditions and therefore you torture them
without any malicious intention.

2. ny valve performs well only if you switch it fast. ny intermediate state will perform
e!cessive losses. "ou e!perienced it #efore if a switch $valve% in your home does not
perform well and the contacts get hot & and possi#ly ignite your home. 'o the (uestion
is) *ow do we get FETs hurry up in their switching time.

+. FETs are e!tremely fast electric valves. They can perform $#ut not easily% within ps
$picoseconds , 1- power &12 seconds% & But they show up some draw#acks we need to
take in account.

.. For #etter understanding let/s recall the connections of a FET $e!actly a 0&FET%. This is
the type we usually use. The leg #eing connected to electrical minus or 102 or ground is
called the 3source3. The leg where you connect your load is called 3drain3. 4here you
control the FET is the 3gate3.

5. The a##reviation FET stands for Field Effect Transistor. This term tells you that you
can change the state of 60 76ff #y controlling an electric field within the structure of the
FE&Transistor & see additionally This might give you the notion that a FET will not draw
current #ut the field will #e sufficient. This notion is true and false at same time & sorry &
given at what time you look at your FET.

8. 1ate capacitance) There is no FET $or transistor% without it $app. 1nF , 1 nanaofarad%.
s you possi#ly know a capacitance is a #in for electrons where you can put them in and
e!tract them later on $in reality it is not & #ut let/s take it as thinking model%. 4e charge
a capacitor and discharge it. 9n this respect it #ehaves like a rechargea#le #attery. 9f you
have lots of current you can charge it within short time and if you have a weak power
supply you need to wait long time in order to use the charged o#:ect.
0ow please understand that you can have no natural feeling of what is slow or fast for a
FET and what currents will flow. ll this matter defies your daily e!perience and therefore
we need to talk a#out it.

;. <harging a capacitance is no linear :o# #ut the more charge you have gathered in the
Page 5 of 26
cap the slower it will increase its voltage. 'o please understand that it will #e no good
idea to supply your FET driver with 12= while your FET needs 1-= for full 60 state.
dditionally your driver will eat up some voltage and supply somewhat less than your
#attery supplies.
nd #eware of long thin wires & they will kill the rest of your switching (uality.
For discharge you unfortunately have no negative voltage in order to speed up the cycle.
Then the low driver stage needs to #e strong enough.

>. 6scillations are another enemy of your FETs. s you learned a#ove every transition
generates losses and you can imagine that some additional oscillations $wires are
inductance? capacitance and act along FET capacitance% will add losses and eat up
performance of your @4A circuit. These oscillations may go up to A*BC But there is a
drug for this & an additional resistor $1-....+- 6hm% & look forward to schematic coming
soon.

D. 0ow let/s recall some usual nominal properties of a FET.
Threshold voltage for 60 state ) higher than ca. 1-=
Threshold voltage for 6FF state) lower than ca. .=
This tells you that you need to travel as fast as possi#le through the lossy Bone #etween
.= and 1-= and vice versa and additionally e!ceed the thresholds #y some volts in order
to stay in a secure Bone.
The #ad news is that you do not have a certain amount of loss once only #ut at every
transition 6076FF and 6FF760. The fre(uency of 1- E*B tells you i.e. that a FET will
e!perience 2---- times pulses of heat every second #ecause of switching only. 9magine
these facts like driving your car without oil in the engine 7gear &F friction G heat G
damage.
9 do not want to derange you with math. 9f you want to know more see this calculator.
ny way you can understand that if we have a weak? slow current source as driver and
possi#ly no good conductors it will take longer time to switch a FET 6076FF.
s you own no oscilloscope it is of no value for you to enter into calculations and figures.
Het/s focus on what we can do in order to enhance your FET driving.

1-. There are some other facts to #e considered #ut stay with this knowledge for now.



Page 6 of 26
Overview
The FET driver described herein incorporates an opto couper at input in order to
separate the P/= generator from the noisy driver circuit. . simpe opto wi not
transfer cean signas with steep edges. Therefore the opto output feeds aome gates
for signa conditioning aong power on disabe. Both measures are necessary in order
to prevent stress and damage of the FET stage itsef.
.n essentia part of this circuit is the FET driver itsef being abe to charge and
discharge the gate capacitance very fast. This action re?uires high current fow and
buiders sha provide conductors with corresponding diameter in this section.
The fina FET stage contains some protection means from high votage.
.n overcurrent protection is not designed in this version of circuit but can be added
ater on.

Page 7 of 26
Circuit
This circuit was tuned in order to serve as safe unit for research purpose at
asymmetric motors. Some simpifications can be performed before using it in rea
use. .nybody untrained person is warned to modify it. 8ow performance might resut.
Pease consut the corresponding forum for further 3nowedge.
Opto (Section C)

The input connector at eft hand side provides aresistor and opto with separated
eads on a post each in order to be easiy adapted to the P=/ generator. 5f this
circuit is not connected the FETs are A for safety controed to switched off.
.ctivating the opto at input wi draw pin 1 at output to -B performing as 25C2 signa
to the signa conditioning stage.
Pin " at connector is not connected to the circuit. 5t sits there ;ust in case you need to
connect PS> from generator.


Page 8 of 26
Signal Conditioning & Power on Disable (Section D)

The gates are of Schmitt trigger type. They prevent randomy switching at output if
noisy signas are fed at input.
The circuit serves as power on disabe in order to protect the setup from unsoicited
switching. .fter switch on #*): D4: (1 disabe the gate pin *+ up to the time when
the capacitor is being charged above the switching eve of the gate. 5n case of power
off procedure the diode enabes fast discharge of the capacitor in order to be
prepared soon for ne@t switch on procedure.
Cate 5#4d performs as simpe inverter. There are two gates eft in 5#4.They can be
used for ater additions. . inputs are tied to E-B in order to prevent unsoicited
switching and noise.

Page 9 of 26
4ote: The votage for this circuit is -B fed by a separated votage reguator 8=$)+-.
This measure was chosen in order to prevent any crossta3 of the noisy circuitry
originating from FET switching.

Buiders are advised to not omit capacitors shown in the diagram. They are essentia
in order to provide smooth (# votage. Every type of capacitor performs in a certain
proprietary fre?uency range. Thus a custer of capacitors covers a wider range of
fre?uencies. They get charged F discharged at spi3es and crossta3 and oad
changes as we.

Page 10 of 26
!" driver (Section E)

FET drivers are designed for sudden source F sin3 of severa amps. This specia type
performs *,. within -+ns. Specia precautions were ta3en by the manufacturer in
order to prevent crossta3 form output to input. 5nput section was separated from
output section.
#*$ F #, guarantee smooth (# votage for input circuitry. This custer is being fed
from *,B reguator and this is the ony connection to the output custer.
Same procedure at C4( connections. input separated from output A one singe ead
inGbetween.
9ou are advised to soder this 5# to P#B directy %no soc3et& in order to guarantee
ma@imum current fow.
The 8E( (* performs as monitor for switching actions.
Page 11 of 26

The circuit gets *,B from a separated votage reguator 8=$)*,. 5t is advised to feed
this reguator by a gavanicay separated PS> i.e. a simpe soc3et charger.

This reguator feeds the -B reguator as we %see baove&.
Page 12 of 26
!" Stage (Section F)

D): D0 sha prevent spurious osciations at FET side. They grow up aong gate
capacitance and inductivity of the eads between driver and FET. Therefore it is
essential to have them as short as possibe. The resistor vaues need to be
determined at the setup itsef. 9ou are advised to chec3 before with wire ;umpers
ony.
The drawbac3 of these resistors is GH they prevent high currents to fow and thus
reduce the switching speed. The resistors shoud be of meta fim type or S=(.
4orma carbon resistors contain a heica structure and thus add inductance to the
gate %danger of osciations&

#0 F (, and #*-F($ perform as overvotage protection for the gate. 5n order to
separate the capacitance and its infuence to switching speed: overvotage is being
fed through ow capacitance diodes *44*4) %(*: ("&. !nce #0 or #*- is charged
Page 13 of 26
there is no further interaction with the gate: e@cept in case of overvotage. Then (,
wi conduct and prevent damage to the gate.
(4: (-: (): (0 perform as overvotage protection for the (S ;unction. They conduct
in case of overvotage and feed charge to the gate. Thus the FET wi open again for
short time and conduct the overvotage to C4(. The doube diode design is intended
in order to reduce capacitance by series connection of the diode capacitance.
4!TE: This protection was designed for these specific FETs in diagram %"++B&. The
vaues for these diodes need to be adapted to about )+I of ma@imum votage drain F
source.

K,: K1 are contacts for connecting meters.

This circuit shows no high current contacts because buiders wi have very different
arrangements for FETs aong heat sin3s. The FETs were prepared to be assembed
on bottom side in order to give space for e@tensive heat sin3s if re?uested.
=ounting FETS off P#B is not recommended because the wiring from driver to gates
and source pins needs to be .S S2!DT .S P!SS5B8E.

4!TE:
5t is essentia to perform the connections from driver to FETS e@acty i3e shown
beow. Ese ow switching performance wi be observed.

Pease note this current path mar3ed in red and bue wi perform up to *,. for short
time. 5t needs to be performed E6.#T89 i3e in ayout beow. /ires need to be
covered with massive soder.

Page 14 of 26

Page 15 of 26
Circuit Board

.s component pacing and wiring are in some e@tent essentia: this setup sha serve
as tempate for easy buiding and proper function.
The circuit board beow was setup primary for repicating the circuit on a breadboard
%instruction beow& but may be buit as true P#B.

Page 16 of 26


Pease note the FETs are positioned mirrored in order to get gate pins as cose
together as possibe. Thus heat sin3s sha be appied on both sides.
Page 17 of 26
Bread board

The board was deveoped in *F*+J %,.-4mm& pitch. Thus any commercia breadboard
%Kpad per hoeJ& board may be used.
The dimensions are about 04mm @ "4mm


#ssembl$

Step *:
Print the assemby print in scae *:* on paper. %tempate in correct siLeGH see
appendi@&
#hec3 if dimensions ore !K: ese correct your printer setup.
.d;ust the printout on the breadboard: hoes in board sha fit to fiducia mar3s.
Fi@ paper with pins on corners through hoes first and then with gue.
Puncture the assemby hoes.
.ssembe a custer of components at a time %not a at once& i.e. *,B votage
reguator aong reated components.
#eramic *++nF capacitors were used of different pitch. 9ou may use a the
same and bend wires conforming the corresponding hoe distance.
Proceed with wiring %see ne@t paragraph&.
.fter wiring finished proceed with ne@t custer.


Page 18 of 26

%iring Procedure
The wiring was performed i3e a singe sided circuit board. The position of
components was guided by having short and weGarranged wiring. The ayout may be
used as printed tempate for mar3ing wires sodered. %see pic beow A bottom view&

Perform short wires first. Ban3 wires may be used there.
For some onger wires insuated ones may be advised.

/iring: bottom view

Page 19 of 26
Precautions at Different Circuit #reas
Some circuit areas need to be wired with massive wire in order to aow high
amperage to fow in time.

GROUNDs
The C4( wires reated to gate drive are mar3ed in pin3 coor. Be advised to perform
those wires at eft hand side from driver as massive wires in order to et up to *,.
fow.

The gate resistors sha be accompanied by ground ines in order to prevent
osciations and spurious nose.
2int: Soder thin ban3 wires and cover them with soder ater on in order to get
massive meta connections. Pause inGbetween in order to not 3i components by
heat.
Demember the ;umper %grey ine above&

Page 20 of 26
GATE DRIVE

Same procedure i3e above

Page 21 of 26
DIGITAL GROUND

This part may be wired without covering with soder i3e above.

Page 22 of 26
FET !OUR"E # DARIN$
Source and drain pins are prepared for high curents up to 1++. pea3. #onducting
such current can not be performed by simpe P#B or wiring. Thus the wiring for
source and drain wi be done differenty A off P#B surfce at top side.
4ote: Sodering needs to be done hot and fast in order to prevent damage inside the
FETS ba heat.

5t is essentia to perform this KtriangeJ for drain wires %connected to oad ater on&
symmetricay in order to oad both FETs e?uay.

Same procedure for wires to source pins at FET. Keep both trianges we insuated.
The circuit might be oaded up to "-+B.
Page 23 of 26
Basic "esting of the Circuit
.fter assemby and wiring thorough testing sha be performed. 5t is advised to do
testing step by step. The input needs to be controed either by a fre?uency generator
or by a simpe togge switch. . sections sha be tested.
*,B reguator %note: reguators of type $)@@ need minimum , vots higher at
input than their output rating&
-B reguator
!pto part
Signa conditioning F power on disabe
FET driver
FET stage %add a resistive oad %i.e. ,+/ bub F *,B& and do not e@ceed *,B
votage at oad for safety of the circuit in case of mafunction& #hec3 for steep
edges and missing osciations at switching time. 5n case of osciations gate
resistors need to be added and increases up to smooth switching.
Some &ints out of the orum
8in3
*. A%ti&n: (o not use cois in the very first switch on but a 'esist&' or car amp or
simiar ohmic oad. #acuate the ma@. current at permanenty switched on stat to not
be grater than )+ I of the ma@. current out of data sheet. =ount your FETs on a
heatsin3.
"(e%)* .t every test chec3 temperature.

,. A%ti&n: .ttatch the overvotage protection to FETs

1. A%ti&n: Start with 12V first.

4. A%ti&n: !perate the FET stage manuay first G disconnect from generator. Thus
you can measure with simpe (B= and thoroughy.

-. A%ti&n: #onnect input ead to C4(.
#hec3: =easure if your FETs have ess than * B on gate. 8ight at output !FFM 5f not:
measure where the the votage originates.

". A%ti&n: #onnect input ead to *,B
#hec3: =easure if FETs have *+B minimum at gate. 8ight at output !4M 5f not:
search for the oss of votage.

$. A%ti&n: #onnect generator with ow fre?uency ca. *2L
#hec3: /atch function: on F off F on ......

). A%ti&n: .dd in series to bub at output a coi. Depace the output oad by a
moderate coi. .ttach a neon %overvotage protection& across S( of the FET.

0. A%ti&n: !perate generator faster i.e. *++2L. #onnect a home brew pea3 detector:
Page 24 of 26
connect (B=.
"(e%): 5f neon ights at this step you have too big coi or too ow fre?uency.
/ait (B= reading being stabe. 4ow you have the e@act pea3 votge ess +."B
beacuse of the diode.
A%ti&n: (ischarge the cap from pea3 detector after every chec3.

*+. A%ti&n: Demove the bub at output. and connect coi between Battery and FET
directy. Depeat N0.


**. A%ti&n: 5ncrease battery votage or use bigger coi %or motor&.
Depeat N)
"(e%). 4eon onO procede with N*,. 5f you have now not your fina oad increse oad
step by step unti neon gets on dimmy.

*,. A%ti&n: 4eon is now on dimmy whie FET stage running. 4ote the pea3 votage.

*1. A%ti&n: #hec3 the data sheet for ma@. votage (S. Ta3e )+I of this votage and
devide it by the neon votage E *B noted before. The integer number is the number of
S.=E neons you can connect in series between (S of FET in order to get a reiabe
protection from overvotage.
"(e%). 4eons sha not ight up at a whie norma operation. =easure the pea3
votage to be beow )+I of FET votage and note the votage red.

*4. A%ti&n* (iscionnect overvotge protection %capFresistor&
"(e%): Dechec3 i3e N*1.

*-: 5ncrease fre?euncy step by step.
#hec3: Temperature: neons to be off: votge at pea3 detector....

2int:
G /hen operating assymetric motors high votage spi3es are intended. Therefore
neones sha ight for e@ceptiona protection ony. 5f the ihgt up you shoud repace
FETs by higher rated components. #acuate the cont of neons again %N*1&
G Dechec3 overvotage protection if you ma3e your FETs switch faster as we. The
cacuation for votage spi3es depends on switching speed as we. They are buid up
by oad votge: amps being switched off and switching speed.
Sma *,B motors can deveop spi3es up to *-+B and more. .n ignition coi being fed
with *,B F 1. wi produce up to 1++B spi3es.
G 9our setup wi not be protected whie you read this te@t. 9!> =>ST (! 5T
9!>DSE8FM
Page 25 of 26


"esting and "uning
!nce the driver board proved to perform basic functions it needs to be tested at
dedicated oad. Demember the advice to start tuning with removed gate resistors and
added wire ;umpers.
5t is essentia to test the driver board with resistive oad ony because any inductivity
osciates at switching time and wi override deady sefGosciations at gates.
Desistive oad: Cet a bub from car head amp 24 %or two 2$&: parae fiaments and
connect as oad with short wires. 9ou can puse it at 1"B with 4+I duty and get
penty of amps for testing whie not overoading the bub.
#hec3 for smooth switching i3e above.
Dechec3 if the overvotage diodes fit to ma@. votage of the FETs used.
urther 'nowledge
This driver is being discussed in Energetic Forum KmyGmotorsGgotGmeGtapGintoG
radiantGenergyJ starting with post N *$4-.
~o0o~

Page 26 of 26

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MD5.1 - BOM prerelease
Pos Cont Name Value Case DATASHEET
1 5 R2,R5,R6,R7,R8 1K 0207
2 1 D10 1N4007 D_R12,7_D!
! ! D1,D!,D6 1N4148 D"!5 #tt$%&&'atas#eet(o)to$a*t()om&1N4148+,a-*)#-l'+'atas#eet+521777($'.
4 2 R!,R/ 1R 0204_ET .o* tun-n1 onl2
5 6 C5,C10,C11,C14,C17,C18 13, C_E4K"_R5,08_D6 $-t)# 5(08 mm & '-amete* 6mm & 5olta1e 6 20V
6 1 R4 10K 0207
7 2 C!,C6 103, D6R2,54_E4K" $-t)# 2(54 mm & '-amete* 6mm & 5olta1e 6 20V
8 1 7C4 74HC1!2N D7414 #tt$%&&.o)us(t-()om&l-t&ml&m$'-002)&m$'-002)($'.
/ 2 C2,C7 100n, !81!R7,62 same l-9e ne:t l-ne; <ut <ent .o* $-t)# 7(62 mm .o* use at 7C4452=N
10 7 C1,C4,C8,C/,C12,C1!,C15 100n, 68!R5,08 $-t)# 5(08 mm & '-amete* 6mm & 5olta1e 6 20V
11 1 R1 470 0207
12 1 7C5 7805 T"220 #tt$%&&'atas#eet(o)to$a*t()om&47812CV+ST-)*oele)t*on-)s+'atas#eet+108!5/!!($'.
1! 1 7C6 7812 T"220 #tt$%&&'atas#eet(o)to$a*t()om&47812CV+ST-)*oele)t*on-)s+'atas#eet+108!5/!!($'.
14 2 T1,T2 7P>60R041C6 T"247 #tt$%&&'atas#eet(o)to$a*t()om&7P>60R041C6+7n.-neon+'atas#eet+100268/6($'.
15 2 K2,K! K1802 1802
16 1 K8 K1804 1804
17 1 K1 K1806 1806
18 1 D11 4ED *e' !mm 4ED_!_RED
1/ 1 7C7 7C4452=N D748 #tt$%&&'atas#eet(o)to$a*t()om&7C4452=N+-)*el+'atas#eet+12!!5($'.
20 2 D2,D7 P6KE15 D"15 #tt$%&&'atas#eet(o)to$a*t()om&P6KE15A+ST-)*oele)t*on-)s+'atas#eet+14475($'.
21 4 D4,D5,D8,D/ P6KE250CA D"15 #tt$%&&'atas#eet(o)to$a*t()om&P6KE250CA+,a-*)#-l'+'atas#eet+!040($'.
Please <u2 '-o'es a<o5e .-tt-n1 to t#e V's o. 2ou* ,ETs( T#ese ones *e.e* to T1&T2 ( ?ot# '-o'es -n se*-es s#all <e @ell <elo@ t#e ma:( Volta1e o. 2ou* ,ETs;
22 1 7C! S,H617A+! D744 #tt$%&&'atas#eet(o)to$a*t()om&S,H617A+!+V-s#a2+'atas#eet+8!//721($'.
6 3 , 5 m m
9
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6
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93,98 mm