A 1.

8-V 73-dB Dynamic-Range

CMOS Variable Gain Amplifier
Ryutaro SAITO',Kinya HOSODA', Akira HYOGO', Takaya MARUYAMA',
Hiroshi KOMURAKI, Hisayasu SATO', Keitaro SEKZNE'

'Tokyo University of Science

Department of Electrical Engineering,
Tokyo University of Science, Noda-shi, Chiba, Japan
Email: ryutaro@sekheOO.ee.noda.tus.ac.jp
'Renesas Technology Corporation

Abstract
A linear-in-dB VGA is fabricated in 0.18-pm CMOS technology. It is composed of three cascaded VGAs.
Each of them is based on a conventional VGA and a proposed gain control circuit. To avoid devices parameters
and temperature behavior on gain characteristics of VGA, a bias circuit is adapted to a proposed gain control
circuit. The gain range of 73dB, the gain error of within rt2dB, the NF of 5dB are obtained at 380MHz by
measurement, and the maximum current consumption is 6 mA under a single 1.8V power supply.

1.Introduction
Variable gain amplifiers (VGA) are required for radio communicated systems, and the VGA with exponential
gain control characteristics is preferred for its large dynamic control range and control loop is settling time
independent of the absolute gain. With the increasing demand for lower dissipation, downsizing to mobile
communication systems, the VGA consisted of only CMOS process is needed for a system-on-a-chip LSI that
has various ability on a single chip. There are two main approaches for realizing an exponential function circuit
using MOSFETs. One approach is the use of an exponential characteristic of a MOSFET in the weak inversion
[l]. The other is that the square-law characteristics of MOSFET in the saturation region approximate an
exponential function [2]-[7]. Latter approach is suitable for high-speed applications. In this paper, latter approach
is adapted.
This paper describes the VGA with independence of device parameter and temperature behavior, which is
integrated on a 0.18-pm CMOS IC. This VGA operated at 1 .SV, total standby current of 4mA, and the linear-in-
dB range is 73 dB under low power dissipation. This VGA achieved good performance for the NF (=5 dB)from
experimental results.

2.Ciacuit description
2-1.Conventional Circuit
Fig. 1 shows the conventional VGA [2] used in this paper, which consists of three brocks named gain cell, gain
control and common mode feed back. The gain cell is composed of an input source-coupled pair (M3, M4) and
diode connected loads (M5, M6). The differential gain can be expressed as

.
gain 3 -.
gm-input

gm-load
1

rds-p gm-load
+1
=/=.(W I L)i I i

'ds-p l/pn 'ox

1
1

(w L, I .' 1
+I
(1)

where g,,,+,ut is the transconductance of the input transistor, and gm-lood is the transconductasnce of the diode
connected transistor. t-&p is a drain-source resistance of PMOS transistors(M7,M8).ljis the current through the
input pair, and 1, is the current through the diode-connected loads. ,U, is carrier mobility, Coxis gate oxide
capacitance per unit area, W is channel width, and L is channel length. When (W/L) is the same as (W/L)1, the
differential gain is given by

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 1 -
gain z :J . 1
-F 1
(2)

rds-p dpn c o x (w1 L )I ' 1 1

The gain can be controlled by the ratio IJIl. In the conventional VGA, the gain control circuit is formed by a
PMOS source-coupled pair (MI 1-M14), and Ii/I,can be expressed as
-_
I i - 'bias 'Ieontrol
E exp(2.-
Iconrot

'I 'bias -Icontrol Ibias

1 (3)
where Ibiasis DC bias current, and Icontrol is an additional current that is proportional to the control voltage V,.
2-2.Proposed Approach
Fig.2 shows the gain control cell. The transistor M1 and M2 in the gain cell are biased in saturation at VB,and
applied input voltages Vc differentially. This proposed approach is different from one in Ref. [2] (Fig. l), since
I i + I , is not constant. The currents through Mland M% are given by

where PflCOX
Kn =--- w (6)
2 L

The ratio of the currents Ii and I,can be expressed as

2

fi=[l- ' B
I1
1+ VC
- "Tn
vc =(KT nexp(4x) (7) where x=
vB
VC
- vTn
(8)

'B - 'Tn
The proposed gain control circuit is shown in Fig.3, which includes three level shifiers. The two of them
composed of Msl through Ms4 generate VB+Vc.The drain-source voltage of Ms4 is the sum of the gate-source
voltage of Ms3 and the difference in the gate voltages between Msl and Ms2, and given by
VI = v, +vc (9)

V2is generated by the other level shifter composed of Edc 7 and &8, and given by
v, = VB-vc (10)
2-3.Bias Circuit
When the gain control circuit in Fig.3 is adapted to the VGA, the ratio Ii/Il in eq. (7) is affected by the MOS
process and temperature behavior. In other word, x' in eq. (8) is the function of the threshold voltage and
temperature as well as the control voltage VC. To reduce the effects of the MOS process and temperature
behavior on the gain characteristic of VGA, x should be the only function of the control voltage VC.In the gain
control circuit, eq. (8) can be expressed as

If the bias current I B is proportional to K,, x will be the only function of the control voltage Vc. Therefore, the
current I, is generated by the bias circuit shown in Fig.3, which generate the current given as
1, = 2Knv, ( v b - vu) (1 2)
where V,, V, and Vb are constant, and can be implemented by four resisters and a current source connected in
series. Substituting (12) into (1 1) gives
V C

x= -/, (13)
Therefore, x (i.e. IiL I,) is determined by only voltages.
2-AComplete VGA
Fin.4 shows the block diaaam of the complete VGA. The VGA has three cascaded conventional gain cells with
cokmon mode feedback circuits. The sizes of the transistor M1 through M8 in Gain Cell 1 are twice as large as

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 their Gain Cell 2 and 3, because of improving its noise figure (NF). The voltages VI and V, are supplied from the
proposed gain control circuit in Fig.3.
3.Experimental Result
This VGA is fabricated in a 0.18 pm CMOS process. The total current is 4 to 6mA under 1.8-V supply. The two
output buffers consume 10mA. Fig.5 shows the layout of this VGA.
Power-splitter with anti-phase outputs creates balanced signal-ended source, which is applied to input ports. The
balanced output port is converted by power-combiner into a single-ended signal for measurements.
Measurements are made at 380MHz,andthe CMOS VGA with output buffers, when linearity (IPldB) is
measured, is used. The output buffers are used to gain the drive-ability, but they are no influence to the linearity
of the VGA, which is revealed by the measurements. Fig.6 shows the measurement gain control characteristicsat
temperature of -30, 25 and 85 degree Celsius. The 73dB linearity controlled gain range within *2dB error is
achieved at 25 degree Celsius. The gain deviation within k3dB achieve 32dB in the temperature range. From the
measurement, the temperature stable gain isn’t achieved with the original ability of this VGA with the
temperature stable technique. Because it’s the cause of pairing mismatches in the gain control circuit. Fig.7
shows the NF and IPl-dB, which indicates the linearity of this VGA. The NF is obtained 5dB at maximum gain.
Fig.7 indicates that this CMOS VGA obtained a good performance for the NF. And the best IPldB is -1 8.6dBm
at the gain of 10dB, while the lowest is -45.6dBm.The measurement results are summarized in Table 1.

4.Conclusion
All-CMOS VGA with independence of device parameter and temperature behavior, which is operating at
380MHz under low power dissipation, is proposed. This VGA is fabricated in 0.18-pm CMOS technology. This
VGA has abilities that the linear-in-dB controlled range is 73dB at 25 degree Celsius, the NF is 5dB at maximum
gain, and the best IPldB is -18.6dBm at the gain of lOdB,while the lowest is -45.6dBm. From measurement
results, this VGA is realizable for a highly integrated CMOS radio receiver.

5.Reference
[11 T. Yamaji, N. Kanou, T. Itakura: “A Temperature Stable CMOS Variable Gain Amplifier with 80-dB Linearly
Controlled Gain Range”, 2001 symposium on VLSI Circuit Design of Technical Papers, pp.77-80,2001
[2] P-C.Huang, L-Y. Chiou, C-K. Wang: “A 3.3-V Wideband Exponential Control Variable-Gain-Amplifier,”
IEEE International Symposium on Circuits and Systems, 1, pp. 285-288, 1998.
[3] Kinya Hosoda, Akira Hyogo, Keitaro Sekine: “A Three MOSFET Pseudo-Exponential Function Circuit,”
ICFS 2002 pp. S1-29-32, March 27-28,2002.
[4] Yasuhide Kuramoti, Akira Hyogo, Keitaro Sekine: “Current-Mode Pseudo-Exponential Function
Generators,” IEEJ 2000 International Analog VLSI Work-shop, pp. 1318-1321,47,2000.
[5] C. -C. Chang, and.-I. Liu: “Pseudo-Exponential Function MOSFETs in Saturation,” IEEE Trans. Circuit Syst.
I1 Analog Digit. Signal Process, pp.1318-1321,47,2000.
[6] C.-H. Lin, T .Pimenta and M. Ismail: “Universal Exponential Function Implementation using Highly-CMOS
V-I Converters for dB-Linear (AGC)Applications,”Mid-west Symposium on Circuits and Systems, pp.360-
363,1998.
[7] R. Harjani: “A Low -Power CMOS VGA for 50 Mb/s Disk Drive Read Channel,” IEEE Trans. on Circuits
and System, pt 11, vol. 42, no. 6, pp.370-376, June 1995.

Table 1: Performance summary

Power Supply Voltage 1.8 V
Current Consumption 4 to 6 mA
Gain range 73 dB
WDSB at GMAX 5 dB
Input PldB at G- -18.6dBm@Gain=lOdB
Input PldB at Gm -45.6dBm

Gain Control Gain Cell

Fig.1 Conventional VGA

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 Bias Circuit Gain Control
Fig.2 Gain control cell
Fig3 Proposed gain control circuit and bias circuit

F]Fl Fl
Feedback Feedback Feedback

1 I
v.1 tv,
prgrdlq
Control
Bias
Circuit
1
Fig.4 Block diagram of the complete
Fig.5 Layout of the CMOS VGA

-15 ; I , 20

18
40 -20
16

20 -E -25
14

-@ -30 12 -s&
10
-35
8
-20
-40
6
I
-40 - - ' -45 ' 1 I I . 14
-0.1 -0.05 0 0.05 0.1 -20 -10 0 10 20 30 40
VcontlVI AV ldBl

Fig.6 Gain control characteristics at -30°C, 20 "C Fig.7 IPldB and NF, dependence of gain
,and 80°C at 380MHz

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