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2-DSP C67X Arch
2-DSP C67X Arch
2-DSP C67X Arch
TMS320C6000 Architecture
Ismail MAJDOUB
3 cores &'(x)
.- to %(000 MI/$
/rice1 %'*2
TM$3%0&'7*3
* core &'7x
.- to *500 MI/$
TM$3%0&'(7(6&'7*3 features
&'000 $7stem 8lock Diagram
Memor7
/eri-herals
Digital Signal Processor TMS320C6000 5
&'000 $7stem 8lock Diagram
? The arithmetic o-erations, such as su9tract or a:: ;$.8 or
ADD>, can 9e -erforme: 97 all the units, exce-t the #M units
&'7x core architecture
Functional Unit Use
.M: Multiplication unit
Used or !ultiplication operation:
@1 !ultiplication 32 " 32 #it$
@2 !ultiplications 16 " 16 #it$
@% !ultiplications & " & #it$
.L: 'ogical unit
Used or logical and arit(!etic operations
)*nd+ ,r+-.$
.S: S(it unit
used or #ranc(+ #it
!anipulation and arit(!etic operations
.D: Data unit
used or loading+ storing and arit(!etic
operations
%3'H8
&onfigura9le as cache
?? &ache1
JAM
J"M
Glash
/rogram Data 9us is %3' 9its => &/. can rea: 5 simultaneous
instructions co:e: on 3% 9its
Data Data 9us is '( 9its => &/. can rea:6Arite tAo o-eran:s
of 3% 9its at the same time#
Internal 9uses
Digital Signal Processor TMS320C6000 11
%'er D'n unit is use: to save -oAer for :urations Ahen the
&/. is inactive#
/eri-herals on a t7-ical &'x -rocessor
Digital Signal Processor TMS320C6000 12
&ross &om-iler
Develo-ment Tool @ IDB