_______________General Desc ription

The M A X1771 step-up sw itching controller provides

90% efficiency over a 30m A to 2A load. A unique cur-
rent-lim ited pulse-frequency-m odulation (PFM ) control
schem e gives this device the benefits of pulse-w idth-
m odulation (PW M ) converters (high efficiency at heavy
loads), w hile using less than 110A of supply current (vs.
2m A to 10m A for PW M converters).
This controller uses m iniature external com ponents. Its
high sw itching frequency (up to 300kH z) allow s sur-
face-m ount m agnetics of 5m m height and 9m m diam e-
ter. It accepts input voltages from 2V to 16.5V. The
output voltage is preset at 12V, or can be adjusted
using tw o resistors.
The M A X1771 optim izes efficiency at low input voltages
and reduces noise by using a single 100m V current-lim it
threshold under all load conditions. A fam ily of sim ilar
devices, the M A X770M A X773, trades som e full-load
efficiency for greater current-lim it accuracy; they provide
a 200m V current lim it at full load, and sw itch to 100m V
for light loads.
The M A X1771 drives an external N -channel M O SFET
sw itch, allow ing it to pow er loads up to 24W . If less pow er
is required, use the M AX756/M AX757 or M AX761/M AX762
step-up sw itching regulators w ith on-board M O SFETs.
An evaluation kit is available. O rder the M AX1771EVKIT-SO .
________________________Applic ations
Positive LC D -B ias G enerators
Flash M em ory Program m ers
H igh-Pow er R F Pow er-A m plifier Supply
Palm tops/H and-H eld Term inals
B attery-Pow ered A pplications
Portable C om m unicators
____________________________Features
o 90% Efficiency for 30mA to 2A Load Currents
o Up to 24W Output Power
o 110A Max Supply Current
o 5A Max Shutdown Current
o 2V to 16.5V Input Range
o Preset 12V or Adjustable Output Voltage
o Current-Limited PFM Control Scheme
o Up to 300kHz Switching Frequency
o Evaluation Kit Available
______________Ordering Information
M
A
X
1
7
7
1
12V or Adjustable, High-Effic ienc y,
Low I
Q
, Step-Up DC-DC Controller
________________________________________________________________ Maxim Integrated Products 1
1
2
3
4
8
7
6
5
CS
GND
AGND
REF SHDN
FB
V+
EXT
TOP VIEW
MAX1771
DI P/ SO
__________________Pin Configuration
FB AGND GND
V+
CS
EXT
N
REF
SHDN ON/ OFF
OUTPUT
12V
INPUT
2V TO VOUT
MAX1771
__________Typic al Operating Circ uit
Call toll free 1-800-998-8800 for free samples or literature.
PART TEMP. RANGE PIN-PACKAGE
M A X1771C PA 0C to + 70C 8 Plastic D IP
M A X1771C SA 0C to + 70C 8 SO
M A X1771C /D 0C to + 70C D ice*
M A X1771EPA -40C to + 85C 8 Plastic D IP
M A X1771ESA -40C to + 85C 8 SO
M A X1771M JA -55C to + 125C 8 C ER D IP**
19-0263; R ev 1; 7/95
EVALUATION KIT MANUAL
FOLLOWS DATA SHEET
* C ontact factory for dice specifications.
** C ontact factory for availability and processing to M IL-STD -883B.
M
A
X
1
7
7
1
12V or Adjustable, High-Effic ienc y,
Low IQ, Step-Up DC-DC Controller
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
V+ to G N D ...............................................................-0.3V, 17V
EXT, C S, R EF, SH D N , FB to G N D ...................-0.3V, (V+ + 0.3V)
G N D to A G N D .............................................................0.1V, -0.1V
C ontinuous Pow er D issipation (TA = + 70C )
Plastic D IP (derate 9.09m W /C above + 70C )............727m W
SO (derate 5.88m W /C above + 70C ).........................471m W
C ER D IP (derate 8.00m W /C above + 70C ).................640m W
O perating Tem perature R anges
M A X1771C _A .....................................................0C to + 70C
M A X1771E_A ..................................................-40C to + 85C
M A X1771M JA ................................................-55C to + 125C
Junction Tem peratures
M A X1771C _A /E_A .......................................................+ 150C
M A X1771M JA ..............................................................+ 175C
Storage Tem perature R ange .............................-65C to + 160C
Lead Tem perature (soldering, 10sec).............................+ 300C
Stresses beyond those listed under A bsolute M axim um R atingsm ay cause perm anent dam age to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not im plied. Exposure to
absolute m axim um rating conditions for extended periods m ay affect device reliability.
ELECTRICAL CHARACTERISTICS
(V+ = 5V, ILO A D = 0m A , TA = TM IN to TM A X, unless otherw ise noted. Typical values are at TA = + 25C .)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply C urrent 85 110 A
Standby C urrent
2 5
A
4
O utput Voltage (N ote 1) V
V+ = 2.0V to 12.0V, over full load range,
C ircuit of Figure 2a
11.52 12.0 12.48
V+ = 5V to 7V, VO U T = 12V
ILO A D = 700m A , C ircuit of Figure 2a
5 m V/V
V+ = 6V, VO U T = 12V, ILO A D = 0m A to
500m A , C ircuit of Figure 2a
20 m V/A
M axim um Sw itch O n-Tim e tO N (m ax) 12 16 20 s
M inim um Sw itch O ff-Tim e tO FF(m in) 1.8 2.3 2.8 s
%
R eference Voltage VR EF
IR EF = 0A
M A X1771C 1.4700 1.5 1.5300
V M A X1771E 1.4625 1.5 1.5375
M A X1771M 1.4550 1.5 1.5450
O utput Voltage Line R egulation
(N ote 2)
O utput Voltage Load R egulation
(N ote 2)
V+ = 5V, VO U T = 12V, ILO A D = 500m A ,
C ircuit of Figure 2a
V+ = 10.0V, SH D N 1.6V (shutdow n)
V+ = 16.5V, SH D N 1.6V (shutdow n)
V+ = 16.5V, SH D N = 0V (norm al operation)
M inim um Start-U p Voltage 1.8 2.0 V
M A X1771 (internal feedback resistors) 2.0 12.5
M A X1771C /E (external resistors) 3.0 16.5
M A X1771M JA (external resistors) 3.1 16.5
Input Voltage R ange V
Efficiency 92
R EF Load R egulation 0A IR EF 100A
M A X1771C /E 4 10
m V
M A X1771M 4 15
3V V+ 16.5V 40 100
FB Trip Point Voltage VFB
M A X1771C 1.4700 1.5 1.5300
V M A X1771E 1.4625 1.5 1.5375
M A X1771M 1.4550 1.5 1.5450
V/V R EF Line R egulation
M
A
X
1
7
7
1
12V or Adjustable, High-Effic ienc y,
Low IQ, Step-Up DC-DC Controller
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(V+ = 5V, ILO A D = 0m A , TA = TM IN to TM A X, unless otherw ise noted. Typical values are at TA = + 25C .)
PARAMETERS SYMBOL CONDITIONS MIN TYP MAX UNITS
FB Input C urrent IFB
M A X1771C 20
nA M A X1771E 40
M A X1771M 60
SH D N Input H igh Voltage VIH V+ = 2.0V to 16.5V 1.6 V
SH D N Input Low Voltage VIL V+ = 2.0V to 16.5V 0.4 V
SH D N Input C urrent 1 A V+ = 16.5V, SH D N = 0V or V+
C urrent-Lim it Trip Level VC S V+ = 5V to 16V
85 100 115
m V
C S Input C urrent 0.01 1 A
EXT R ise Tim e V+ = 5V, 1nF from EXT to ground 55 ns
EXT Fall Tim e V+ = 5V, 1nF from EXT to ground 55 ns
Note 1: O utput voltage guaranteed using preset voltages. See Figures 4a4d for output current capability versus input voltage.
Note 2: O utput voltage line and load regulation depend on external circuit com ponents.
75 100 125
__________________________________________Typic al Operating Charac teristic s
(TA = + 25C , unless otherw ise noted.)
60
65
75
70
80
85
90
95
100
1 10 100 10,000 1000

EFFICIENCY vs. LOAD CURRENT

(BOOTSTRAPED MODE)
LOAD CURRENT (mA)
E
F
F
I
C
I
E
N
C
Y

(
%
)
VIN =5V
VIN =3V
VIN =8V
VIN =10V
VOUT =12V
CIRCUIT OF
FIGURE 2a
M
A
X
1
7
7
1

0
1
60
65
75
70
80
85
90
95
100
1 10 100 10,000 1000

EFFICIENCY vs. LOAD CURRENT

(NON-BOOTSTRAPED MODE)
LOAD CURRENT (mA)
E
F
F
I
C
I
E
N
C
Y

(
%
)
VIN =5V
VIN =10V
VIN =8V
VOUT =12V
CIRCUIT OF
FIGURE 2b
M
A
X
1
7
7
1

0
2
0
2.00
LOAD CURRENT vs.
MINIMUM START-UP INPUT VOLTAGE
M
A
X
1
7
7
1
-T
O
C
3
MINIMUM START-UP INPUT VOLTAGE (V)
L
O
A
D

C
U
R
R
E
N
T

(
m
A
)
100
200
300
400
500
600
700
2.25 2.50 2.75 3.00 3.25 3.50
EXTERNAL FET THRESHOLD
LIMITS FULL-LOAD START-UP
BELOW 3.5V
VOUT =12V, CIRCUIT OF FIGURE 2a
M A X1771C /E
M A X1771M
250
0
-60 -20 60 140
REFERENCE OUTPUT RESISTANCE vs.
TEMPERATURE
50
M
A
X
1
7
7
1
-
0
7
TEMPERATURE (C)
R
E
F
E
R
E
N
C
E

O
U
T
P
U
T

R
E
S
I
S
T
A
N
C
E

(

)
20 100
150
-40 0 80 40 120
100
200
100A
50A
10A
1.502
-60 -20 60 140

REFERENCE vs. TEMPERATURE

M
A
X
1
7
7
1
-
0
8
TEMPERATURE (C)
R
E
F
E
R
E
N
C
E

(
V
)
20 100 -40 0 80 40 120
1.500
1.498
1.496
1.494
1.492
1.504
1.506
15.5

16.0

16.5
-60 -30 0 30 60 90 120 150
MAXIMUM SWITCH ON-TIME vs.
TEMPERATURE
TEMPERATURE (C)
t
O
N
(
M
A
X
)

(

s
)

M
A
X
1
7
7
1
-
0
9
M
A
X
1
7
7
1
12V or Adjustable, High-Effic ienc y,
Low IQ, Step-Up DC-DC Controller
4
_______________________________________________________________________________________
4.0
-60 -20 60 140
SHUTDOWN CURRENT vs. TEMPERATURE
M
A
X
1
7
7
1
-
1
0
TEMPERATURE (C)
S
H
U
T
D
O
W
N

C
U
R
R
E
N
T


(

A
)
20 100 -40 0 80 40 120
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V+ = 15V
V+ = 4V
V+ = 8V
2.20

2.25

2.30
-60 -30 0 30 60 90 120 150
MINIMUM SWITCH OFF-TIME vs.
TEMPERATURE
TEMPERATURE (C)
t
O
F
F
(
M
I
N
)

(

s
)

M
A
X
1
7
7
1
-
1
1
6.0

7.0

8.0
-60 -30 0 30 60 90 120 150
MAXIMUM SWITCH ON-TIME/
MINIMUM SWITCH OFF-TIME RATIO
vs. TEMPERATURE
TEMPERATURE (C)
t
O
N
(
M
A
X
)
/
t
O
F
F
(
M
I
N
)

R
A
T
I
O

M
A
X
1
7
7
1
-
1
2
7.5
6.5
____________________________Typic al Operating Charac teristic s (c ontinued)
(TA = + 25C , unless otherw ise noted.)
0
1
2
3
4
-75 -50 -25 0 25 50 75 100 125
SUPPLY CURRENT vs. TEMPERATURE
TEMPERATURE (C)
S
U
P
P
L
Y

C
U
R
R
E
N
T

(
m
A
)
VOUT =12V, VIN =5V
CIRCUIT OF FIGURE 2a
BOOTSTRAPPED MODE
ENTIRE
CIRCUIT
SCHOTTKY DIODE
LEAKAGE EXCLUDED
M
A
X
1
7
7
1
-
0
4
0
0.2
0.4
0.6
0.8
2 4 6 8 10 12
SUPPLY CURRENT vs. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
S
U
P
P
L
Y

C
U
R
R
E
N
T

(
m
A
)
VOUT =12V

NON-BOOTSTRAPPED
CIRCUIT OF FIGURE 2b
BOOTSTRAPPED
CIRCUIT OF
FIGURE 2a
M
A
X
1
7
7
1
-
0
5
0
100
150
200
250
50
2 4 6 8 10 12
EXT RISE/FALL TIME vs. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
E
X
T

R
I
S
E
/
F
A
L
L

T
I
M
E

(
n
s
)
CEXT =2200pF
CEXT =1000pF
CEXT =446pF
CEXT =100pF
M
A
X
1
7
7
1
-
0
6
M
A
X
1
7
7
1
12V or Adjustable, High-Effic ienc y,
Low IQ, Step-Up DC-DC Controller
_______________________________________________________________________________________ 5
2s/ di v
VIN = 5V, IOUT = 900mA, VOUT = 12V
A: EXT VOLTAGE, 10V/ di v
B: INDUCTOR CURRENT, 1A/ di v
C: VOUT RIPPLE, 50mV/ di v, AC- COUPLED
A

B
C
VOUT
0V
I
LIM
0A
HEAVY-LOAD SWITCHING WAVEFORMS
____________________________Typic al Operating Charac teristic s (c ontinued)
(C ircuit of Figure 2a, TA = + 25C , unless otherw ise noted.)
10s/ di v
VIN = 5V, IOUT = 500mA, VOUT = 12V
A: EXT VOLTAGE, 10V/ di v
B: INDUCTOR CURRENT, 1A/ di v
C: VOUT RIPPLE, 50mV/ di v, AC- COUPLED
A

B
C
V
OUT
0V
ILIM
0A
MEDIUM-LOAD SWITCHING WAVEFORMS
5ms/ di v
IOUT = 700mA, VOUT = 12V
A: VIN, 5V to 7V, 2V/ di v
B: VOUT RIPPLE, 100mV/ di v, AC- COUPLED
A

B
5V
7V

0V
LINE-TRANSIENT RESPONSE
5ms/ di v
VIN = 6V, VOUT = 12V
A: LOAD CURRENT, 0mA to 500mA, 500mA/ di v
B: VOUT RIPPLE, 100mV/ di v, AC- COUPLED
A

B
500mA

0A
LOAD-TRANSIENT RESPONSE
M
A
X
1
7
7
1
12V or Adjustable, High-Effic ienc y,
Low IQ, Step-Up DC-DC Controller
6
_______________________________________________________________________________________
2ms/ di v
IOUT = 500mA, VIN = 5V
A: SHDN, 5V/ di v
B: VOUT, 5V/ di v
A
B
0V

0V
ENTERING/EXITING SHUTDOWN
5V
______________________________________________________________Pin Desc ription
____________________________Typic al Operating Charac teristic s (c ontinued)
(C ircuit of Figure 2a, TA = + 25C , unless otherw ise noted.)
PIN NAME FUNCTION
1 EXT G ate D rive for External N -C hannel Pow er Transistor
2 V+
3 FB
4 SH D N
5 R EF
6 A G N D A nalog G round
7 G N D H igh-C urrent G round R eturn for the O utput D river
8 C S
Pow er-Supply Input. A lso acts as a voltage-sense point w hen in bootstrapped m ode.
Feedback Input for A djustable-O utput O peration. C onnect to ground for fixed-output operation.
U se a resistor divider netw ork to adjust the output voltage. See Setting the O utput Voltage section.
A ctive-H igh TTL/C M O S Logic-Level Shutdow n Input. In shutdow n m ode, VO U T is a diode drop
below V+ (due to the D C path from V+ to the output) and the supply current drops to 5A
m axim um . C onnect to ground for norm al operation.
1.5V R eference O utput that can source 100A for external loads. B ypass to G N D w ith 0.1F.
The reference is disabled in shutdow n.
Positive Input to the C urrent-Sense A m plifier. C onnect the current-sense resistor betw een C S
and G N D .
M
A
X
1
7
7
1
12V or Adjustable, High-Effic ienc y,
Low IQ, Step-Up DC-DC Controller
_______________________________________________________________________________________
7
_______________Detailed Desc ription
The M A X1771 is a B iC M O S, step-up, sw itch-m ode pow -
er-supply controller that provides a preset 12V output,
in addition to adjustable-output operation. Its unique
control schem e com bines the advantages of pulse-fre-
quency m odulation (low supply current) and pulse-
w idth m odulation (high efficiency w ith heavy loads),
providing high efficiency over a w ide output current
range, as w ell as increased output current capability
over previous PFM devices. In addition, the external
sense resistor and pow er transistor allow the user to tai-
lor the output current capability for each application.
Figure 1 show s the M A X1771 functional diagram .
The M A X1771 offers three m ain im provem ents over
prior pulse-skipping control solutions: 1) the converter
operates w ith m iniature (5m m height and less than
9m m d iam eter) surface-m ount ind uctors d ue to its
300kH z sw itching frequency; 2) the current-lim ited PFM
control schem e allow s 90% efficiencies over a w ide
range of load currents; and 3) the m axim um supply
current is only 110A .
The device has a shutdow n m ode that reduces the
supply current to 5A m ax.
Bootstrapped/Non-Bootstrapped Modes
Figure 2 show s the standard application circuits for
bootstrapped and non-bootstrapped m odes. In boot-
strapped m ode, the IC is pow ered from the output
(VO U T, w hich is connected to V+ ) and the input voltage
range is 2V to VO U T. The voltage applied to the gate of
the external pow er transistor is sw itched from VO U T to
ground, providing m ore sw itch gate drive and thus
reducing the transistors on-resistance.
In non-bootstrapped m ode, the IC is pow ered from the
input voltage (V+ ) and operates w ith m inim um supply
current. In this m ode, FB is the output voltage sense
point. Since the voltage sw ing applied to the gate of the
external pow er transistor is reduced (the gate sw ings
from V+ to ground), the pow er transistors on-resistance
1.5V
REFERENCE
Q TRIG
Q S
F/ F
R
Q TRIG
LOW- VOLTAGE
OSCILLATOR
2.5V
0.1V
MAX ON- TIME
ONE- SHOT
MIN OFF- TIME
ONE- SHOT
CURRENT- SENSE
AMPLIFIER
DUAL- MODE
COMPARATOR
FB REF
50mV
ERROR
COMPARATOR
SHDN
V+
EXT
CS
BIAS
CIRCUITRY
N
MAX1771
2.3s
16s
Figure 1. Functional D iagram
M
A
X
1
7
7
1
12V or Adjustable, High-Effic ienc y,
Low IQ, Step-Up DC-DC Controller
8
_______________________________________________________________________________________
increases at low input voltages. H ow ever, the supply
current is also reduced because V+ is at a low er volt-
ag e, and b ecause less energ y is consum ed w hile
charging and discharging the external M O SFETs gate
capacitance. The m inim um input voltage is 3V w hen
using external feedback resistors. W ith supply voltages
below 5V, bootstrapped m ode is recom m ended.
Note: When using the MAX1771 in non-boot-
strapped mode, there is no preset output operation
because V+ is also the output voltage sense point
for fixed-output operation. External resistors must
be used to set the output voltage. U se 1% external
feedback resistors w hen operating in adjustable-output
m ode (Figures 2b, 2c) to achieve an overall output volt-
age accuracy of 5% . To achieve highest efficiency,
operate in bootstrapped m ode w henever possible.
External Power-Transistor
Control Circ uitry
PFM Control Scheme
The M A X1771 uses a proprietary current-lim ited PFM
control schem e to provide high efficiency over a w ide
range of load currents. This control schem e com bines the
ultra-low supply current of PFM converters (or pulse skip-
pers) w ith the high full-load efficiency of PW M converters.
U nlike traditional PFM converters, the M A X1771 uses a
sense resistor to control the peak inductor current. The
device also operates w ith high sw itching frequencies
(up to 300kH z), allow ing the use of m iniature external
com ponents.
A s w ith traditional PFM converters, the pow er transistor
is not turned on until the voltage com parator senses
the output is out of regulation. H ow ever, unlike tradition-
al PFM converters, the M A X1771 sw itch uses the com -
bination of a peak current lim it and a pair of one-shots
that set the m axim um on-tim e (16s) and m inim um off-
tim e (2.3s); there is no oscillator. O nce off, the m ini-
m um off-tim e one-shot holds the sw itch off for 2.3s.
A fter this m inim um tim e, the sw itch either 1) stays off if
the output is in regulation, or 2) turns on again if the
output is out of regulation.
Figure 2a. 12V Preset O utput, B ootstrapped Figure 2b. 12V O utput, N on-B ootstrapped
Figure 2c. 9V O utput, B ootstrapped
MAX1771
VIN = 5V
REF
SHDN
AGND
GND
N
MTD20N03HDL
7

EXT
CS
FB
L1
22H
D1
1N5817- 22
R1
18k
C4
300F
C5
100pF
C3
0.1F
5
4
6

1
8
3
2
V+
C1
68F
VOUT = 12V
@ 0. 5A
R2
127k
RSENSE
40m
C2
0.1F
VOUT
VREF
R2 = (R1) ( - 1)
V
REF = 1.5V
MAX1771
REF
SHDN
AGND
GND
N
7

EXT
CS
FB
C1
47F L1
22H
D1
1N5817- 22
R1
28k
C4
200F
C5
100pF
C3
0.1F
5
4
6

1
8
3
2
V+
VOUT = 9V
R2
140k
R
SENSE
40m
C2
0.1F
VOUT
VREF
R2 = (R1) ( - 1)
V
REF = 1.5V
Si 9410DY/
MTD20N03HDL
VIN = 4V
MAX1771
VIN = 5V
REF
SHDN
FB
AGND
GND
N
7

EXT
CS
C2
0.1F
C1
68F
L1
22H
D1
1N5817- 22
Si 9410DY/
MTD20N03HDL
RSENSE
40m
C4
300F
C3
0.1F
5
4
3
6

1
8
2
V+
VOUT = 12V
@ 0. 5A
The control circuitry allow s the IC to operate in continu-
ous-conduction m ode (C C M ) w hile m aintaining high
efficiency w ith heavy loads. W hen the pow er sw itch is
turned on, it stays on until either 1) the m axim um on-
tim e one-shot turns it off (typically 16s later), or 2) the
sw itch current reaches the peak current lim it set by the
current-sense resistor.
The M A X1771 sw itching frequency is variable (depend-
ing on load current and input voltage), causing variable
sw itching noise. H ow ever, the subharm onic noise gen-
erated does not exceed the peak current lim it tim es the
filter capacitor equivalent series resistance (ESR ). For
exam ple, w hen generating a 12V output at 500m A from
a 5V input, only 100m V of output ripple occurs using
the circuit of Figure 2a.
Low-Voltage Start-Up Oscillator
The M A X1771 features a low input voltage start-up oscil-
lator that guarantees start-up w ith no load dow n to 2V
w hen operating in bootstrapped m ode and using inter-
nal feedback resistors. A t these low voltages, the supply
voltage is not large enough for proper error-com parator
operation and internal biasing. The start-up oscillator
has a fixed 50% duty cycle and the M A X1771 disre-
gards the error-com parator output w hen the supply volt-
age is less than 2.5V. A bove 2.5V, the error-com parator
and norm al one-shot tim ing circuitry are used. The low -
voltage start-up circuitry is disabled if non-bootstrapped
m ode is selected (FB is not tied to ground).
Shutdown Mode
W hen SH D N is high, the M A X1771 enters shutdow n
m od e. In this m od e, the internal b iasing circuitry is
turned off (including the reference) and VO U T falls to a
d iod e d rop b elow V IN (d ue to the D C p ath from the
inp ut to the outp ut). In shutd ow n m od e, the sup p ly
current drops to less than 5A . SH D N is a TTL/C M O S
log ic-level inp ut. C onnect S H D N to G N D for norm al
operation.
__________________Design Proc edure
Setting the Output Voltage
To set the output voltage, first determ ine the m ode of
operation, either bootstrapped or non-bootstrapped.
B ootstrap p ed m od e p rovid es m ore outp ut current
capability, w hile non-bootstrapped m ode reduces the
supply current (see Typical O perating C haracteristics).
If a decaying voltage source (such as a battery) is
used, see the additional notes in the Low Input Voltage
O peration section.
The M A X1771s output voltage can be adjusted from
very high voltages dow n to 3V, using external resistors
R 1 and R 2 config ured as show n in Fig ure 3. For
adjustable-output operation, select feedback resistor
R 1 in the 10k to 500k range. R 2 is given by:
VO U T
R 2 = (R 1)
(
-1
)
VR EF
w here VR EF equals 1.5V.
For p reset-outp ut op eration, tie FB to G N D (this
forces bootstrapped-m ode operation.
Figure 2 show s various circuit configurations for boot-
strapped/non-bootstrapped, preset/adjustable operation.
Determining RSENSE
U se the theoretical output current curves show n in
Figures 4a4d to select R SEN SE. They w ere derived
using the m inim um (w orst-case) current-lim it com para-
tor threshold value over the extend ed tem p erature
range (-40C to + 85C ). N o tolerance w as included for
R S E N S E . The voltag e d rop across the d iod e w as
assum ed to be 0.5V, and the drop across the pow er
sw itch rD S(O N ) and coil resistance w as assum ed to be
0.3V.
Determining the Induc tor (L)
Practical inductor values range from 10H to 300H .
22H is a good choice for m ost applications. In appli-
cations w ith large input/output differentials, the IC s
output current capability w ill be m uch less w hen the
inductance value is too low , because the IC w ill alw ays
operate in discontinuous m ode. If the inductor value
is too low , the current w ill ram p up to a high level before
the current-lim it com parator can turn off the sw itch.
The m inim um on-tim e for the sw itch (tO N (m in)) is
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12V or Adjustable, High-Effic ienc y,
Low IQ, Step-Up DC-DC Controller
_______________________________________________________________________________________
9
MAX1771
R1
R2
C5*
GND
FB V
OUT
R1 = 10k TO 500k
* SEE TEXT FOR VALUE
VOUT
VREF
R2 = R1 ( - 1)
VREF = 1.5V
Figure 3. A djustable O utput C ircuit
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approxim ately 2s; select an inductor that allow s the cur-
rent to ram p up to ILIM .
The standard operating circuits use a 22H inductor.
If a different inductance value is desired, select L such
that:
V
IN (m ax) x 2s
L ------
I
LIM
Larger inductance values tend to increase the start-up
tim e slightly, w hile sm aller inductance values allow the
coil current to ram p up to hig her levels b efore the
sw itch turns off, increasing the ripple at light loads.
Inductors w ith a ferrite core or equivalent are recom -
m ended; pow der iron cores are not recom m ended for
use w ith high sw itching frequencies. M ake sure the
inductors saturation current rating (the current at w hich
the core begins to saturate and the inductance starts to
fall) exceeds the peak current rating set by R SEN SE.
H ow ever, it is generally acceptable to bias the inductor
into saturation by approxim ately 20% (the point w here
the inductance is 20% below the nom inal value). For
highest efficiency, use a coil w ith low D C resistance,
preferably under 20m . To m inim ize radiated noise,
use a toroid, a pot core, or a shielded coil.
Table 1 lists inductor suppliers and specific recom -
m ended inductors.
12V or Adjustable, High-Effic ienc y,
Low IQ, Step-Up DC-DC Controller
10
______________________________________________________________________________________
M
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I
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M

O
U
T
P
U
T

C
U
R
R
E
N
T

(
A
)
0
INPUT VOLTAGE (V)
0.5
1.0
1.5
2.0
2.5
3.0
3.5
2 3 4 5
RSENSE = 20m
RSENSE = 25m
RSENSE = 35m
RSENSE = 100m
RSENSE = 50m
VOUT = 5V
L = 22H
M
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M

O
U
T
P
U
T

C
U
R
R
E
N
T

(
A
)
0
INPUT VOLTAGE (V)
0.5
1.0
1.5
2.0
2.5
3.0
3.5
2 4 6 8 10 12
RSENSE = 100m
RSENSE = 50m
RSENSE = 20m
RSENSE = 25m
RSENSE = 35m
VOUT = 12V
L = 22H
Figure 4a. M axim um O utput C urrent vs. Input Voltage
(VO U T = 5V)
Figure 4b. M axim um O utput C urrent vs. Input Voltage
(VO U T = 12V)
Figure 4c. M axim um O utput C urrent vs. Input Voltage
(VO U T = 15V)
Figure 4d. M axim um O utput C urrent vs. Input Voltage
(VO U T = 24V)
M
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M

O
U
T
P
U
T

C
U
R
R
E
N
T

(
A
)
0
INPUT VOLTAGE (V)
0.5
1.0
1.5
2.0
2.5
3.0
3.5
2 4 6 8 10 12 14 16
RSENSE = 100m
RSENSE = 50m
VOUT = 15V
L = 22H
RSENSE = 20m
RSENSE = 25m
RSENSE = 35m
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M

O
U
T
P
U
T

C
U
R
R
E
N
T

(
A
)
0
2
INPUT VOLTAGE (V)
0.8
6 10 14
0.2
0.4
0.6
VOUT = 24V
L =150H
RSENSE = 50m
RSENSE = 100m
RSENSE = 200m
Power Transistor Selec tion
U se an N -channel M O SFET pow er transistor w ith the
M A X1771.
To ensure the external N -channel M O SFET (N -FET) is
turned on hard , use log ic-level or low -threshold
N -FETs w hen the input drive voltage is less than 8V. This
applies even in bootstrapped m ode, to ensure start-up.
N -FETs provide the highest efficiency because they do
not draw any D C gate-drive current.
W hen selecting an N -FET, three im portant param eters
are the total gate charge (Q g), on-resistance (rD S(O N )),
and reverse transfer capacitance (C R SS).
Q g takes into account all capacitances associated w ith
charging the gate. U se the typical Q g value for best
results; the m axim um value is usually grossly over-
specified since it is a guaranteed lim it and not the m ea-
sured value. The typical total gate charge should be
50nC or less. W ith larger num bers, the EXT pins m ay
not b e able to adequately drive the gate. The EXT
rise/fall tim e varies w ith different capacitive loads as
show n in the Typical O perating C haracteristics.
The tw o m ost significant losses contributing to the
N -FETs pow er dissipation are I
2
R losses and sw itching
losses. Select a transistor w ith low rD S(O N ) and low
C R SS to m inim ize these losses.
D eterm ine the m axim um required gate-drive current
from the Q g specification in the N -FET data sheet.
The M A X1771s m axim um allow ed sw itching frequency
during norm al operation is 300kH z; but at start-up, the
m axim um frequency can be 500kH z, so the m axim um
current req uired to charg e the N -FE Ts g ate is
f(m ax) x Q g(typ). U se the typical Q g num ber from the
transistor data sheet. For exam ple, the Si9410D Y has a
Q g(typ) of 17nC (at VG S = 5V), therefore the current
required to charge the gate is:
IG A TE (m ax)= (500kH z) (17nC ) = 8.5m A .
The bypass capacitor on V+ (C 2) m ust instantaneously
furnish the gate charge w ithout excessive droop (e.g.,
less than 200m V):
Q g
V+ =
C 2
C ontinuing w ith the exam ple, V+ = 17nC /0.1F = 170m V.
Figure 2as application circuit uses an 8-pin Si9410D Y
surface-m ount N -FET that has 50m on-resistance w ith
4.5V VG S, and a guaranteed VTH of less than 3V. Figure
2bs application circuit uses an M TD 20N 03H D L logic-
level N -FET w ith a guaranteed threshold voltage (VTH )
of 2V.
Diode Selec tion
The M A X1771s high sw itching frequency dem ands a
hig h-sp eed rectifier. S chottky d iod es such as the
1N 58171N 5822 are recom m ended. M ake sure the
Schottky diodes average current rating exceeds the
peak current lim it set by R SEN SE, and that its break-
dow n voltage exceeds V O U T. For high-tem perature
applications, Schottky diodes m ay be inadequate due
to their hig h leakag e currents; hig h-sp eed silicon
diodes such as the M U R 105 or EC 11FS1 can be used
instead. A t heavy loads and high tem peratures, the
benefits of a Schottky diodes low forw ard voltage m ay
outw eigh the disadvantages of its high leakage current.
Capac itor Selec tion
Output Filter Capacitor
The prim ary criterion for selecting the output filter capac-
itor (C 4) is low effective series resistance (ESR ). The
product of the peak inductor current and the output filter
capacitors ESR determ ines the am plitude of the ripple
seen on the output voltage. Tw o O S-C O N 150F, 16V
output filter capacitors in parallel w ith 35m of ESR each
typically provide 75m V ripple w hen stepping up from 5V
to 12V at 500m A (Figure 2a). Sm aller-value and/or high-
er-ESR capacitors are acceptable for light loads or in
applications that can tolerate higher output ripple.
Since the output filter capacitors ESR affects efficien-
cy, use low -ESR capacitors for best perform ance. See
Table 1 for com ponent selection.
Input Bypass Capacitors
The input bypass capacitor (C 1) reduces peak currents
draw n from the voltage source and also reduces noise
at the voltage source caused by the sw itching action of
the M A X1771. The input voltage source im pedance
determ ines the size of the capacitor required at the V+
input. A s w ith the output filter capacitor, a low -ESR
capacitor is recom m ended. For output currents up to
1A , 68F (C 1) is adequate, although sm aller bypass
capacitors m ay also be acceptable.
B ypass the IC w ith a 0.1F ceram ic capacitor (C 2)
placed as close to the V+ and G N D pins as possible.
Reference Capacitor
B yp ass R E F w ith a 0.1F cap acitor (C 3). R E F can
source up to 100A of current for external loads.
Feed-Forward Capacitor
In adjustable output voltage and non-bootstrapped
m odes, parallel a 47pF to 220pF capacitor across R 2,
as show n in Figures 2 and 3. C hoose the low est capac-
itor value that insures stability; high capacitance values
m ay degrade line regulation.
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12V or Adjustable, High-Effic ienc y,
Low IQ, Step-Up DC-DC Controller
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M
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12V or Adjustable, High-Effic ienc y,
Low IQ, Step-Up DC-DC Controller
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______________________________________________________________________________________
Table 1. Component Suppliers
PRODUCTION INDUCTORS CAPACITORS TRANSISTORS
Surface M ount
Sum ida
C D 54 series
C D R 125 series
C oiltronics
C TX20 series
C oilcraft
D O 3316 series
D O 3340 series
M atsuo
267 series
Sprague
595D series
A VX
TPS series
Siliconix
Si9410D Y
Si9420D Y (high voltage)
M otorola
M TP3055EL
M TD 20N 03H D L
M M FT3055ELT1
M TD 6N 1O
M M B T8099LT1
M M B T8599LT1
Through H ole
Sum ida
R C H 855 series
R C H 110 series
Sanyo
O S-C O N series
N ichicon
PL series
M otorola
1N 58171N 5822
M U R 115 (high voltage)
M U R 105 (high-speed
silicon)
C entral Sem iconductor
C M PSH -3
C M PZ5240
N ihon
EC 11 FS1 series (high-
speed silicon)
M otorola
M B R S1100T3
M M B Z5240B L
DIODES
A VX U SA : (803) 448-9411 (803) 448-1943
SUPPLIER PHONE FAX
C oiltronics U SA : (407) 241-7876 (407) 241-9339
Sum ida
U SA : (708) 956-0666 (708) 956-0702
Japan: 81-3-3607-5111 81-3-3607-5144
M atsuo
U SA : (714) 969-2491 (714) 960-6492
Japan: 81-6-337-6450 81-6-337-6456
C oilcraft U SA : (708) 639-6400 (708) 639-1469
M otorola U SA : (800) 521-6274 (602) 952-4190
C entral
Sem iconductor
U SA : (516) 435-1110 (516) 435-1824
N ihon U SA : (805) 867-2555 (805) 867-2556
Sanyo
U SA : (619) 661-6835 (619) 661-1055
Japan: 81-7-2070-1005 81-7-2070-1174
Siliconix U SA : (800) 554-5565 (408) 970-3950
Sprague U SA : (603) 224-1961 (603) 224-1430
N ichicon U SA : (708) 843-7500 (708) 843-2798
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__________Applic ations Information
Low Input Voltage Operation
W hen using a p ow er sup p ly that d ecays w ith tim e
(such as a battery), the N -FET transistor w ill operate in
its linear region w hen the voltage at EXT approaches
the threshold voltage of the FET, dissipating excessive
pow er. Prolonged operation in this m ode m ay dam age
the FET. This effect is m uch m ore significant in non-
bootstrapped m ode than in bootstrapped m ode, since
bootstrapped m ode typically provides m uch higher
VG S voltages. To avoid this condition, m ake sure VEXT
is above the VTH of the FET, or use a voltage detector
(such as the M A X8211) to put the IC in shutdow n m ode
once the input supply voltage falls below a predeter-
m ined m inim um value. Excessive loads w ith low input
voltages can also cause this condition.
Starting Up Under Load
The Typical O perating C haracteristics show the Start-
U p Voltage vs. Load C urrent graph for bootstrapped-
m od e op eration. This g rap h d ep end s on the typ e
of pow er sw itch used. The M A X1771 is not designed to
start up under full load in bootstrapped m ode w ith low
input voltages.
Layout Considerations
D ue to high current levels and fast sw itching w ave-
form s, w hich radiate noise, proper PC board layout is
essential. Protect sensitive analog grounds by using a
star ground configuration. M inim ize ground noise by
connecting G N D , the input bypass capacitor ground
lead, and the output filter capacitor ground lead to a
single point (star ground configuration). A lso, m inim ize
lead lengths to reduce stray capacitance, trace resis-
tance, and radiated noise. Place input bypass capaci-
tor C 2 as close as possible to V+ and G N D .
Excessive noise at the V+ input m ay falsely trigger the
tim ing circuitry, resulting in short pulses at EXT. If this
occurs it w ill have a negligible effect on circuit efficien-
cy. If desired, place a 4.7F directly across the V+ and
G N D pins (in parallel w ith the 0.1F C 2 bypass capaci-
tor) to reduce the noise at V+ .
Other Applic ation Circ uits
4 Cells to 5V (or 3 Cells to 3.3V), 500mA
Step-Up/Down Converter
The circuit show n in Figure 5 generates 5V (or 3.3V) at
500m A w ith 85% efficiency, from an input voltage that
varies above and below the output. The output couples
to the sw itching circuitry via a capacitor. This configu-
ration offers tw o advantages over flyback-transform er
and step-up linear-regulator circuits: sm ooth regulation
as the input passes through the output, and no output
current in shutdow n.
This circuit requires tw o inductors, w hich can be w ound
on one core w ith no regard to coupling since they do
not w ork as a transform er. L1 and L2 can either be
w ound together (as w ith the C oiltronics C TX20-4) or
kept as tw o separate inductors; both m ethods provide
equal perform ance. C apacitors C 2 and C 3 should be
low -E S R typ es for b est efficiency. A 1F ceram ic
capacitor w ill w ork at C 2, but w ith about 3% efficiency
loss. C 2s voltage rating m ust be greater than the m axi-
m um input voltage. A lso note that the LX sw itch m ust
w ithstand a voltage equal to the sum of the input and
output voltage; for exam ple, w hen converting 11V to
5V, the sw itch m ust w ithstand 16V.
LX sw itch pulses are captured by Schottky diode D 2 to
boost V+ to (VO U T + VIN ). This im proves efficiency w ith
a low input voltage, but also lim its the m axim um input
supply to 11V. If the input voltage does not fall below 4V
and if a 3V logic threshold FET is used for Q 1, you m ay
om it D 2 and connect V+ directly to the input supply.
12V Output Buck/Boost
The circuit in Figure 6 generates 12V from a 4.5V to
16V input. H igher input voltages are possible if you
MAX1771
SHDN
R1
0.1
REF
AGND
R2

R3

C5
47pF
GND
4
3V = OFF
5
FB
Q1* *
SEE TEXT FOR FURTHER COMPONENT INFO
* * VIN MAY BE LOWER THAN INDICATED IF THE SUPPLY IS NOT
* * REQUIRED TO START UNDER FULL LOAD
* * MOTOROLA MMFT3055ELT1

FOR 5V: R2 = 200k, R3 = 470k

3.3V: R2 = 100k, R3 = 20k
3 6
EXT
CS
1

L1
20H
1 CTX20- 4
8
2
D2
1N5817
D1
1N5817
C3
220F
10V
C1
2.2F
C2
47F
16V
C4
0.1F
V+
VIN*
3V TO 11V
VOUT
5V
500mA
7
L2
Figure 5. Step-U p/D ow n for a 5V/3.3V O utput
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carefully observe the com ponent voltage ratings, since
som e com ponents m ust w ithstand the sum of the input
and output voltage (27V in this case). The circuit oper-
ates as an A C -coupled boost converter, and does not
change operating m odes w hen crossing from buck to
b oost. There is no instab ility around a 12V inp ut.
Efficiency ranges from 85% at m edium loads to about
82% at full load. A lso, w hen shutdow n is activated
(SH D N high) the output goes to 0V and sources no cur-
rent. A 1F ceram ic capacitor is used for C 2. A larger
capacitor value im proves efficiency by about 1% to 3% .
D 2 ensures start-up for this A C -coupled configuration
by overriding the M A X1771s D ual-M ode feature, w hich
allow s the use of preset internal or user-set external
feedback. W hen operating in D ual-M ode, the IC first
tries to use internal feedback and looks to V+ for its
feedback signal. H ow ever, since V+ m ay be greater
than the internally set feedback (12V for the M A X1771),
the IC m ay think the output is sufficiently high and not
start. D 2 ensures start-up by pulling FB above ground
and forcing the external feedback m ode. In a norm al
(not A C -coupled) boost circuit, D 2 isnt needed, since
the outp ut and FB rise as soon as inp ut p ow er is
applied.
Transformerless -48V to +5V at 300mA
The circuit in Figure 7 uses a transform erless design to
supply 5V at 300m A from a -30V to -75V input supply.
The M A X1771 is biased such that its ground connec-
tions are m ade to the -48V input. The IC s supply volt-
age (at V+ ) is set to about 9.4V (w ith respect to -48V)
by a zener-biased em itter follow er (Q 2). A n N -channel
FET (Q 1) is driven in a boost configuration. O utput reg-
ulation is achieved by a transistor (Q 3), w hich level
shifts a feedback signal from the 5V output to the IC s
FB input. C onversion efficiency is typically 82% .
W hen selecting com ponents, be sure that D 1, Q 1, Q 2,
Q 3, and C 6 are rated for the full input voltage plus a
reasonable safety m argin. A lso, if D 1 is substituted, it
should be a fast-recovery type w ith a trr less than 30ns.
R 7, R 9, C 8, and D 3 are optional and m ay be used to
soft start the circuit to prevent excessive current surges
at pow er-up.
Battery-Powered LCD Bias Supply
The circuit in Figure 8 boosts tw o cells (2V m in) to 24V
for LC D b ias or other p ositive outp ut ap p lications.
O utput pow er is boosted from the battery input, w hile
V+ voltage for the M A X1771 is supplied by a 5V or 3.3V
logic supply.
5V, 1A Boost Converter
The circuit in Figure 9 boosts a 2.7V to 5.5V input to a
regulated 5V, 1A output for logic, R F pow er, or PC M C IA
applications. Efficiency vs. load current is show n in the
adjacent graph.
12V or Adjustable, High-Effic ienc y,
Low IQ, Step-Up DC-DC Controller
14
______________________________________________________________________________________
MAX1771
SHDN
R1
0.1
REF
AGND
R2
200k
1%
R3
28k
1%
GND
4
ON
OFF
5
FB
NOTE: HIGH-
CURRENT GND
Q1* *
* SEE TEXT FOR FURTHER
COMPONENT INFORMATION
* * Q1 = MOTOROLA MMFT3055ELT1

L1 + L2 = ONE COILTRONICS CTX20- 4

3
6
EXT
CS
1

L1

20H
8
2
D1
1N5819
D2*
1N4148
C3
100F
16V
C1
33F
16V
C2*
1F
C5
0.1F
V+
VIN
4.5V TO 15V
VOUT
12V
250mA
L2*
20H
7
C4
100F
16V
NOTE: KEEP ALL TRACES CONNECTED
TO PIN 3 AS SHORT AS POSSIBLE
Figure 6. 12V B uck/B oost from a 4.5V to 15V Input
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MAX1771
SHDN
R1
0.15
R7
200
REF
AGND GND
4
5
Q1
MTD6N10
6
- 48V
EXT
CS
1

L1
D03340
220H680H
8
3
1
2
D1
MBRS1100T3
D2
CMPZ5240/
MMBZ5240BL
D3
CMPSH- 3
C8
1F
+5V
300mA
7
C5
0.1F
C6
10F
100V
FB
3
V+
Q3
MMBT8599LT1 2
C7
220pF
R2
47k
1%
R3
16k
1%
C4
2.2F
20V R5
1k
R6
200k
R4
100k
C1
220F
10V
C3
0.33F
Q2
MMBT8099LT1
R9
5.1k
C2
220F
10V
GND REF
MAX1771
V+
EXTL
CS
4
SHDN
0.1F
3. 3V OR 5V
LOGIC
SUPPLY
BATTERY
INPUT
2V TO 12V
8
6, 7 5
RSENSE
0.2
1N5817
1
2
L1
22H
OUTPUT
Adj. = 12V TO 24V
(AS SHOWN)
N
47F

0.1F
FB
3
R3
10k
10k
R2
150k
MMFT3055ELT1

OFF
ON

Figure 7. -48V Input to 5V O utput at 300m A , W ithout a Transform er

Figure 8. 2V Input to 24V O utput LC D B ias
M
A
X
1
7
7
1
12V or Adjustable, High-Effic ienc y,
Low IQ, Step-Up DC-DC Controller
16
______________________________________________________________________________________
___________________Chip Topography
V+
FB
0 . 1 2 6 "
( 3 . 2 0 0 mm)
0 . 0 8 0 "
( 2 . 0 3 2 mm)
EXT
CS
GND
AGND
SHDN REF
TR A N SISTO R C O U N T: 501
SU B STR A TE C O N N EC TED TO V+
100
50
1m 10m 100m 1

EFFICIENCY vs. LOAD CURRENT

60
LOAD CURRENT (A)
E
F
F
I
C
I
E
N
C
Y

(
%
)
70
80
90
VIN =3V

MAX1771

GND
7 6

1N5820
330F
0.1F
4
5
1
8
2
3
OUTPUT
5V
1A
0.1F
232k
100k
0.04
150F
22H
MTD20N03HDL
INPUT
2. 7V TO 5. 5V
CS
EXT
V+
FB
100pF
AGND
SHDN
REF
OFF
ON
VIN =4V
Figure 9. 5V/1A B oost C onverter