8088 Instruction Set Summary Revised August 21,2000

This summary has been compiled from a number of sources, but chiefly from
8086/8088/80286 Assembly Language, by Scanlon, and A86 Macro Assembler and D86
Debugger Reference Manual, by Isaacson.
Instructions Important to El E 485/486 lags
S ! " # $ A
A%"
Add &ith carry' dest dest ( source ( "

A%%
Add' dest dest ( source

A)%
And' dest dest .A)%. source

0 0

*
"A++
"S'I$ or I$ address of procedure,
stac, I$ or "S'I$ of ne-t instruction
"./
"onvert byte to &ord. A0 bit 1of A+
"+"
"lear the carry flag. " 0
0
"+I "lear the interrupt enable bit.
2as,able interrupts are ignored.
"2" "omplement the carry flag

"2$ Dest 3 source, result not stored

"/%
%4 A4
15
%6"
%ecrement. dest dest 3 1

%I7 8nsigned divide 9immediate operand not allo&ed:
A4 ;uo of <%4'A4=9&ord op:> and
%4 rem of <%4'A4=9&ord op:>
or
A+ ;uo of <A4=9byte op:> and
A0 rem of <A4=9byte op:>
* * * * * *
I%I7 Signed divide 9immediate operand not allo&ed:
A4, %4 ;uo, rem of <%4'A4=9&ord op:>, or
A+, A0 ;uo, rem of <A4=9byte op:>
* * * * * *
I28+ Signed multiply 9immediate operand not allo&ed:
%4'A4 A4 ? 9&ord op:, or A4 A+ ? 9byte op:
* *

* *
I)
A+ port, or A4 port
$ort is an immediate @3bit address or %4
I)"
Dest dest ( 1

I)T e-ecute a soft&are interrupt
IR6T return from interrupt

A-- conditional Bumps to a relative address 9312@ to (121:
AA=A).6, AA6=A)., A.=A)A6, A", A.6=A)A, A"4!,
A6=A!, AC=A)+6, AC6=A)+, A+=A)C6, A+6=A)C, A)",
A)6=A)!, A)#, A)$=A$#, A)S, A#, A$=A$6, AS
A2$
Aump, I$ or "S'I$ operand
+6A
Dest address of operand
Instructions Important to El E 485/486 lags
S ! " # $ A
+##$
"4 "4 3 1, then transfer to short label destination
if "4 0D
+##$6=+##$!, transfers if "4 0 and ! E 1D
+##$)6=+##$)! transfers if "4 0 and ! E 0.
2#7
dest operand or data stored at operand address
28+ 8nsigned multiply 9immediate operand not allo&ed:
%4'A4 A4 ? 9&ord op:, or A4 A+ ? 9byte op:
* *

* *
)6C
dest 3 dest

)#T
dest complement<dest>
#R
dest dest .#R. source

0 0

*
#8T
port A+ or A4
operand is @3bit immediate or %4
$#$
dest contents of stac,, S$ S$ ( 2
$#$
flags contents of stac,, S$ S$ ( 2

$8S0
stac, source, S$ S$ 3 2
$8S0
stac, flags, S$ S$ 3 2
R"+ rotate &ord or byte left including " 9F bit or 11 bit
rotate:D source 1 or "+.

*
R"R rotate &ord or byte right including " 9F bit or 11 bit
rotate:D source is 1 or "+.

*
R6T
"S'I$ or I$ stac,
R#+ Rotate left @ or 1G bit dest.D source is 1 or "+
.it rotated out is copied to "

*
R#R Rotate right @ or 1G bit dest.D source is 1 or "+
.it rotated out is copied to "

*
SAR Shift right through " &ith sign e-tensionD
source is 1 or "+

*

*
S..
Subtract &ith borro&. dest dest 3 source 3 "

S0+ or
SA+
Shift left dest through " &ith 0 fillD
source is 1 or "+

*

*
S0R Shift right dest through " &ith 0 fillD
source is 1 or "+
0

*

*
ST"
" 1
1
STI Set interrupt enable flag.
2as,able interrupts are serviced
S8.
dest dest 3 source

T6ST dest .A)%. source

0 0

*
4"0C
dest source
4+AT
A+ H%S'9.4 ( unsigned A+:I
4#R
dest dest .4#R. source

0 0

*
Instructions Less Important to El E 485/486 lags
S ! " # $ A
AAA AS"II adBust A+ 9carry into A0: after addition'
AS"II 903F: ( AS"II 903F: 8npac,ed ."%
* *

* *

AA% AS"II adBust before division 9A4E10?A0 (A+:'
8npac,ed ."% .inary

* *

*
AA2 AS"II adBust after multiply
9A+=10' A0EJuo, A+ERem:
Single digit ."% ? Single digit ."% 8npac,ed ."%

* *

*
AAS AS"II adBust A+ 9borro& from A0: after subtraction'
AS"II 903F: 3 AS"II 903F: 8npac,ed ."%
* *

* *

"+% "lear the direction bit.
String instructions increment SI and %I
"2$S H%S'SII 3 H6S'%II, update %I and SI 9based on % flag:
"2$S. and "2$S/ are siKe3specific

%AA %ecimal adBust A+ after addition,
After a byte3&ide add of pac,ed ."% digits, adBusts A+ to
correct ."% result and sets " if result is L FF
10

*

%AS %ecimal adBust after subtraction. +i,e %AA

*

6S" put an operand on the data bus
0+T stop the processor until a R6S6T or e-ternal interrupt
I)T# e-ecute interrupt M if overflo& flag is set
+A0 +oad A0 from flags.
.its 90,2,M,G,1: 9", $, A, !, S:
+%S +oad pointer using %S
%S'dest address of operand
+6S li,e +%S, e-cept 6S'dest receives address
+#"N A prefi-. .us is loc,ed until e-ecution is completed
+#%S
+oad String. A4 or A+ H%S'SII, update SI
+#%S. and +#%S/ are siKe3specific
2#7S
H6S'%II H%S'SII, adBust SI and %I
2#7S. and 2#7S/ are siKe3specific
R6$ A prefi-. +i,e +##$ for string instructions.
R6$6=R6$! and R6$)6=R6$)! are also valid
SA0
flags A0 9used &ith +A0:

S"AS H6S'%II 3 A+ or A4. 8pdate %I.
S"AS. and S"AS/ are siKe3specific

ST%
% 1
String instructions decrement SI and %I
ST#S
H6S'%II A4 or A+. AdBust %I.
ST#S. and ST#S/ are siKe3specific
/AIT processor idles processing interrupts until the e-ternal
T6ST line is asserted, then continues