Mnemonic Algorithm Operator operation No.

Of
bytes
First
byte
Second
byte
Third
byte
Addressin
g mode
Flag
affec
ted
Machine
cycle
T
state
MVI R, ataR ata R !ata This instr"ction mo#es the immediate $ bit
data to register specified in the instr"ction
% opcode$ bit
data
& Immediate NO %'OF(M
R)
*
MVI M
,ata
M ata
'+,) ata
M!ata
'+,)!ata
This instr"ction mo#es the immediate $ bit
data to memory . The +, pair is "sed as
memory pointer. The content of +, register
pair are "sed as memory address.
% opcode$ bit
data
& Immediate NO -'OF(M
R(M.)
/0
MOV Rd, Rs Rd Rs Rd ! Rs This instr"ction copies data from so"rce
register to destination register. The content of
so"rce register remain "nchanged.
/ opcode& & Register NO /'OF) 1
MOV M, R M R
'+,) R
M ! R
'+,) ! R
This instr"ction copies data from register R
to M. The +, register pair is "sed as memory
pointer. The content of specified register are
transfer to that memory location.
/ opcode& & Indirect NO %'OF(M
.)
*
MOV R,M R M
R '+,)
R ! M
R ! '+,)
This instr"ction copies data from memory M
to register R . The +, register pair is "sed as
memory pointer. The content of that memory
location are transfer to specified register R.
/ opcode& & irect NO %'OF(M
R)
*
STA address 'Address) A 'Address) !A This instr"ction copies the content of the
acc"m"lator to the memory location 2hose
address is specified in the instr"ction
- opcode,o2
order
byte of
address
+igh
order
byte of
address
irect NO 1'OF(M
R(MR
(M.)
/-
S+,
address
'Address) ,
'Address(/)+
'Address)! ,
'Address(/)!+
This instr"ction copies the content of
registers , and + to the memory location and
ne3t memory location respecti#ely specified
in the instr"ction.
- opcode,o2
order
byte of
address
+igh
order
byte of
address
irect NO 4'OF(M
R(MR
(M.(
M.)
/5
STA6 R7 Rp A Rp ! A This instr"ction copies the content of
acc"m"lator to the memory location 2hose
address is pointed by the specified register
pair
/ opcode& & Register
indirect
NO %'OF(M
.)
*
,A addressA 'Address) A ! 'Address) This instr"ction copies the content of the
memory location 2hose address is specified
in the instr"ction to the acc"m"lator.The
content of memory location remain
"nchanged
- opcode,o2
order
byte of
address
+igh
order
byte of
address
irect NO 1'OF(M
R(MR
(MR)
/-
,+,
address
, 'Address)
+ 'Address(/)
, ! 'Address)
+!'Address(/)
This instr"ction copies the content of
memory location and ne3t memory location
specified in the instr"ction to the register ,
- opcode,o2
order
byte of
+igh
order
byte of
irect NO 4'OF(M
R(MR
(MR(
/5
and + respectie#ely addressaddress MR)
,A6 R7 A Rp A ! Rp This instr"ction copies the content of
memory location 2hose address is pointed by
the specified register pair to the acc"m"lator.
/ opcode& & Register
indirect
NO %'OF(M
R)
*
,6I R7,
ata'/5bit)
Rp /5 bit data Rp ! /5 bit data This instr"ction load the /5 bit data specified
in the instr"ction to the register pair specified
in the instr"ction respectie#ely
- opcode,o2
order
byte of
data
+igh
order
byte of
data
Immediate NO -'OF(
MR(
MR)
/0
68+9 + , , : +!, ,!: This instr"ction copies the contents of and
: register to the + and , register respecti#ely
/ opcode&& && Register NO /'OF) 1
A R A A(R A ! A(R This instr"ction adds the contents of register
R 2ith the content of the acc"m"lator. The
res"lt of addition is stored in the acc"m"lator
/ opcode Register ;:S /'OF) 1
A M A A('+,) A ! A('+,) This instr"ction adds the contents of memory
location pointed by +, register pair 2ith the
content of the acc"m"lator. The res"lt of
addition is stored in the acc"m"lator
/ opcode& & irect ;:S %'OF(M
R)
*
AI ata A A(ata A ! A(ata This instr"ction add the $ bit data specified
along 2ith the content of the acc"m"lator.
The res"lt of addition is stored in the
acc"m"lator
% opcode$ bit
data
& Immediate ;:S %'OF(M
R)
*
A8 R A A(R (8; A ! A(R(8; This instr"ction adds the contents of register
R along 2ith the carry to the content of the
acc"m"lator. The res"lt of addition is stored
in the acc"m"lator
/ opcode& & Register ;:S /'OF) 1
A8 M A A('+,)
(8;
A !A('+,)
(8;
This instr"ction adds the contents of memory
locationpointed by +, register pair and the
contentof carry 2ith the content of the
acc"m"lator. The res"lt of addition is stored
in the acc"m"lator
/ opcode& & irect ;:S %'OF(M
R)
*
A8I ata A A(ata
(8;
A ! A(ata
(8;
This instr"ction add the $ bit data specified
and the content of carry along 2ith the
content of the acc"m"lator. The res"lt of
addition is stored in the acc"m"lator
% opcode$ bit
data
& Immediate ;:S %'OF(M
R)
*
S<= R A A&R A ! A&R This instr"ction s"btract the contents of
register R from the content of the
acc"m"lator. The res"lt of s"bstraction is
stored in the acc"m"lator
/ opcode& & Register ;:S /'OF) 1
S<= M A A&'+,) A ! A&'+,) This instr"ction s"btract the contents of / opcode& & irect ;:S %'OF(M*
memory location pointed by +, register pair
from the content of the acc"m"lator. The
res"lt of s"bstraction is stored in the
acc"m"lator
R)
S<I ata A A&ata A ! A&ata This instr"ction s"btract the $ bit data
specified from the content of the
acc"m"lator. The res"lt of addition is stored
in the acc"m"lator
% opcode$ bit
data
& Immediate ;:S %'OF(M
R)
*
S== R A A&R &8; A ! A&R&8; This instr"ction s"btract the contents of
register R along 2ith the carry from the
content of the acc"m"lator. The res"lt of
s"bstraction is stored in the acc"m"lator
/ opcode& & Register ;:S /'OF) 1
S== M A A&'+,)&8;A !A&'+,)&8;This instr"ction s"btract the contents of
memory location pointed by +, register pair
and the content of carry from the content of
the acc"m"lator. The res"lt of s"bstraction is
stored in the acc"m"lator
/ opcode& & irect ;:S %'OF(M
R)
*
S=I ata A A&ata >
8;
A ! A&ata
&8;
This instr"ction s"btract the $ bit data
specified and the content of carry along 2ith
the content of the acc"m"lator. The res"lt of
s"bstraction is stored in the acc"m"lator
% opcode$ bit
data
& Immediate ;:S %'OF(M
R)
*
INR R R R ( / R ! R ( / This instr"ction increments the contents of
the specified register R by /. The res"lt is
stored in the same register.
/ opcode& & Register :3ce
pt
carry
flag
/'OF) 1
INR M M M ( / M ! M ( / This instr"ction increments the contents of
the memory location addressedby +, pair by
/. The res"lt is stored in the same memory
location.
/ opcode& & irect NO -'OF(M
R(M.)
/0
IN6 R7 Rp Rp ( / Rp ! Rp ( / This instr"ction increments the contents of
the register pair specified in the instr"ction
by /. The res"lt is stored in the same register.
/ opcode& & Indirect NO /'OF) 5
8R R R R & / R ! R & / This instr"ction decrements the contents of
the specified register R by /. The res"lt is
stored in the same register.
/ opcode& & Register :3ce
pt
carry
flag
/'OF) 1
8R M M M & / M ! M & / This instr"ction decrements the contents of
the memory location addressedby +, pair by
/. The res"lt is stored in the same memory
location.
/ opcode& & irect NO -'OF(M
R(M.)
/0
86 R7 Rp Rp & / Rp ! Rp & / This instr"ction decrements the contents of
the register pair specified in the instr"ction
by /. The res"lt is stored in the same register.
/ opcode& & Indirect NO /'OF) 5
A R7 +, +,( Rp +,!+,( Rp This instr"ction adds the contents of
specified register pair to +, pair and stores
the res"lt in +, pair.
/ opcode& & Register :3ce
pt
carry
flag
%'OF(=I
(=I)
/0
AA / opcode& & Implied ;:S /'OF) 1
ANA R A A?R A ! A?R The contents of specified register are
logically ANed 2ith the content of the
acc"m"lator. The res"lt is stored in the
acc"m"lator
/ opcode& & Register ;:S /'OF) 1
ANA M A A? '+,) A ! A? '+,) The contents of memory location pointed by
+, register pair are logically ANed 2ith the
content of the acc"m"lator. The res"lt of is
stored in the acc"m"lator
/ opcode& & irect ;:S %'OF(M
R)
*
ANI ata A A?ata A ! A?ata The $ bit data specified in instr"ction are
logically ANed 2ith the content of the
acc"m"lator. The res"lt is stored in the
acc"m"lator
% opcode$ bit
data
& Immediate ;:S %'OF(M
R)
*
ORA R A A R A ! A R The contents of specified register are
logically ORed 2ith the content of the
acc"m"lator. The res"lt is stored in the
acc"m"lator
/ opcode & & Register ;:S /'OF) 1
ORA M A A '+,) A ! A '+,) The contents of memory location pointed by
+, register pair are logically ORed 2ith the
content of the acc"m"lator. The res"lt of is
stored in the acc"m"lator
/ opcode & & irect ;:S %'OF(M
R)
*
ORI ata A A ata A ! A ata The $ bit data specified in instr"ction are
logically ORed 2ith the content of the
acc"m"lator. The res"lt is stored in the
acc"m"lator
% opcode$ bit
data
& Immediate ;:S %'OF(M
R)
*
6RA R A A :6&ORR A !A :6&OR R The contents of specified register are
logically :6&ORed 2ith the content of the
acc"m"lator. The res"lt is stored in the
acc"m"lator
/ opcode& & Register ;:S /'OF) 1
6RA M A A :6&OR
'+,)
A!A :6&OR
'+,)
The contents of memory location pointed by
+, register pair are logically :6&ORed 2ith
the content of the acc"m"lator. The res"lt of
is stored in the acc"m"lator
/ opcode& & irect ;:S %'OF(M
R)
*
6RI ata A A:6&OR
ata
A ! A :6&OR
ata
The $ bit data specified in instr"ction are
logically :6&ORed 2ith the content of the
acc"m"lator. The res"lt is stored in the
acc"m"lator
% opcode$ bit
data
& Immediate ;:S %'OF(M
R)
*
8M7 R A&R This instr"ction compares the contents of acc"m"lator 2ith
the contents of resigter specified in the instr"ction. The
comparison is done by s"bstraction. The res"lt of
s"bstraction is discarded.
If the content of acc"m"lator are e@"al to the contents of
register then Aero flag is set.
If the content of acc"m"lator are less than the contents of
register then carry flag is set.
If the content of acc"m"lator are greater than the contents of
register then the carry and Aero flag are set.
/ opcode& & Register ;:S /'OF) 1
8M7 M A&M This instr"ction compares the contents of acc"m"lator 2ith
the contents of memory location specified by the +, register
pair. The res"lt of s"bstraction is discarded.
/ opcode& irect ;:S %'OF(M
R)
*
87I ata A& ata This instr"ction compares the contents of acc"m"lator 2ith
the immediate data. The comparison is done by
s"bstraction.The res"lt of s"bstraction is discarded.
% opcode$ bit
data
& Immediate ;es %'OF(M
R)
*
R,8 Shift all bits
left
8F MS= ,S= The instr"ction rotates all the bits in the
acc"m"lator to the left, by one bit position.
The data bit rotated o"t of MS= is circled
bacB into ,S=. The data bit is rotated o"t of
MS= is also copied to 8F i.e bit =* is placed
in the bit =0 as 2ell as in carry
/ opcade & & Implied Only
cy is
affec
ted
/'OF) 1
RR8 Shift all bits
right
8F MS= ,S= The instr"ction rotates all the bits in the
acc"m"lator to the right, by one bit position.
The data bit rotated o"t of MS= is circled
bacB into ,S=. The data bit is rotated o"t of
MS= is also copied to 8F i.e bit =* is placed
in the bit =0 as 2ell as in carry
/ opcode & & Implied Only
cy is
affec
ted
/'OF) 1
RA, Shift all bits
left
8F MS= ,S= The instr"ction rotates all the bits in the
acc"m"lator to the left, by one bit position.
Along 2ith carry.
=it =* is placed in carry and carry is placed in
bit =0
/ opcode & & Implied Only
cy is
affec
ted
/'OF) 1
RAR Shift all bits
right
8F MS= ,S= The instr"ction rotates all the bits in the
acc"m"lator to the right, by one bit position.
Along 2ith carry.
=it =0 is placed in carry and carry is placed in
/ opcode & & Implied Only
cy is
affec
ted
/'OF) 1
bit =*
8M8 If 8; ! 0 then
8; !/
If 8; !/ then
8;!0
8;!8; This instr"ction in#ert the #al"e of carry flag. / opcode & & Implied :3ce
pt
carry
no
other
are
affec
ted
/'OF) 1
8MA If A ! 0 then A
!/
If A !/ then
A!0
A!A This instr"ction in#ert the #al"e of
acc"m"lator.
The complement is performing a NOT
operation 2ith each bit
/ opcode & & Implied NO /'OF) 1
ST8 8;!/ & This instr"ction sets the carry flag. / opcode & & Implied :3ce
pt
carry
no
other
are
affec
ted
/'OF) 1
CM7
Address
78 Address 78 ! Address This instr"ction loads the 78 2ith the address
gi#en 2ithin the instr"ction and contin"es
2ith the program e3ec"tion from this
location
- opcode,o2
order
byte of
address
+igh
order
byte of
address
Immediate NO -'OF(
MR(
MR)
/0
8onditional
CM7
Address
If the
condition is
tr"e
78 Address
:lse 78
78(-
In conditional C<M7 instr"ction, 2hen the condition is tr"e
or satisfied then only C<M7 is made at the specified address.
If condition is false or not satisfied it 2ill D"st checB and
proceed f"rther to e3ec"te the ne3t instr"ction after it
- opcode,o2
order
byte of
address
+igh
order
byte of
address
Immediate NO %'OF(
MR()E
-'OF)
MR(
MR)
*E/
0
opcode
78+, 78 +, 78 ! +, The content of + and , register are
transferred to high order $ bit and lo2 order $
bits of 78
This instr"ction is e@"i#alent to a / byte
"nconditional C<M7 instr"ction, pro#ided the
address of C<M7 is specified by the +,
/ opcode& & register NO /'OF) 1
register pair. The program se@"ence is
transferred to address specified by the +,
register pair.
8A,,
Address
'S7 > / ) 78+
'S7 > / ) 78,
S7 S7 > %
78 Address
'S7 > / )! 78+
'S7 > / )! 78,
S7 ! S7 > %
78 ! Address
This instr"ction is "sed to transfer the
program control to a s"bprogram or
s"bro"tine.
- opcode,o2
order
byte of
address
+igh
order
byte of
address
Immediate NO 4'OF(
MR(
MR(
M.(
M.)
/$
8 8A,,
Address
'S7 > / )!78+
'S7 > / )! 78,
78 ! Address
:lse 78 !
78(-
'S7 > / )! 78+
'S7 > / )! 78,
78 ! Address
:lse 78 !
78(-
This instr"ction is "sed to transfer the
program control to a s"bprogram or
s"bro"tine if the condition is tr"e.
- opcode,o2
order
byte of
address
+igh
order
byte of
address
Immediate NO 4'OF(
MR(
MR(
M.(
M.)
/$
R:T 78, 'S7)
78+ 'S7(/)
S7 S7 ( %
78, ! 'S7)
78+ !'S7(/)
S7 ! S7 ( %

.hen this instr"ction is e3ec"ted program
control is transferred from the s"bro"tine to
the calling program.
The ret"rn address is poppedEtaBen from
stacB'2here the call instr"ction has stopped
its 78 contents i.e. ret"rn address )this
address is loaded in 78 and the program
e3ec"tion begins at address taBen from stacB
/ opcode & & Indirect NO -'OF(M
R(MR)
/0
R 8ondition 78, 'S7)
78+ 'S7(/)
S7 S7 ( %
:lse 78 !
78(/
78, ! 'S7)
78+ !'S7(/)
S7 ! S7 ( %
:lse 78 !
78(/
.hen this instr"ction is e3ec"ted if the
condition is tr"e program control is
transferred from the s"bro"tine to the calling
program.
The ret"rn address is poppedEtaBen from
stacB'2here the call instr"ction has stopped
its 78 contents i.e. ret"rn address )this
address is loaded in 78 and the program
e3ec"tion begins at address taBen from stacB
/ opcode & & Indirect NO -'OF(M
R(MR)E
/'OF)
/%E5
S7+, S7 +, S7 ! +, .hen this instr"ction is e3ec"ted,the
contents of + register are copied to higher
order byte of stacB pointer and content of ,
register are copied to the lo2er byte of stacB
pointer.
/ opcode & & Register NO /'OF) 5
7<S+ R7 S7 S7 &/
S7 +igher
order Rp
S7 S7 &/
S7 ,o2er
order Rp
S7 ! S7 &/
S7 ! +igher
order Rp
S7 ! S7 &/
S7 ! ,o2er
order Rp
.hen instr"ction is e3ec"ted then the stacB
pointer is decremented by one and the
contents of higher order register of the
specified register pair are copied to the
memory location pointed the stacB pointer.
stacB pointer is again decremented by one
/ opcode & & Register NO -'OF(M
R(M.)
/%
and the contents of lo2er order register of the
specified register pair are copied to the
memory location pointed the stacB pointer.
7<S+ 7S. S7 S7 &/
S7 A S7
S7 &/
S7 Flag
register
S7 ! S7 &/
S7 ! A
S7 ! S7 &/
S7 ! Flag
register
.hen instr"ction is e3ec"ted then the stacB
pointer is decremented by one and the
contents of A are copied to the memory
location pointed the stacB pointer.
stacB pointer is again decremented by one
and the contents of flag register are copied to
the memory location pointed the stacB
pointer.
/ opcode & & Register NO -'OF(M
R(M.)
/%
7O7 R7 ,o2er order
of Rp S7
S7 S7 (/
higher order
Rp S7
S7 S7 (/
,o2er order
of Rp ! S7
S7 ! S7 (/
higher order
Rp ! S7
S7 ! S7 (/
.hen this instr"ction is e3ec"ted, the
contents of memory location pointed by the
stacB pointer'S7) register are copied to the
lo2 order byte of register pair. And then S7 is
incremented by one and the contents of that
memory location are copied to the higher
order byte of register pair and then S7 is
again incremented
/ opcode & & Register NO -'OF(M
R(M.)
/%
7O7!7S. ,o2er order
of Rp flag
register
S7!S7(/
higher order
Rp !A S7
S7 (/
,o2er order
of Rp ! Flag
register
S7 ! S7 (/
higher order
Rp ! A
S7 ! S7 (/
.hen this instr"ction is e3ec"ted, the
contents of flag register are copied to the lo2
order byte of register pair. And then S7 is
incremented by one and the contents of A are
copied to the higher order byte of register
pair and then S7 is again incremented
/ opcode & & Register NO -'OF(M
R(M.)
/%
6T+, , 'S7)
+ 'S7(/)
, ! 'S7)
+ ! 'S7(/)
.hen this instr"ction is e3ec"ted the
contents of , register are e3changed 2ith the
stacB location ponted by stacB pointer. The
contents of + register are e3changed 2ith the
ne3t memory location
/ opcode & & Implied NO 4'OF(
MR(
MR(
M.(
M.)
/5
NO7 78 78 (/ 78! 78(/ .hen this instr"ction is e3ec"ted no
operation is performed instead of that
instr"ction.
/ opcode & & Implied NO /'OF) 1
+,T & & .hen this instr"ction is e3ec"ted, the
microprocessor halts i.e this instr"ction stops
the microprocessor . It can be restarted by a
#alid interr"pt or R:S:T signal.
/ opcode & & Implied NO /'OF)
(/T state
4
:I I: / I:!/ .hen this instr"ction is e3ec"ted the
interr"pt enable flip flop is set so that all
masBable interr"pts are enabled.
/ opcode & & Implied
&
NO /'OF) 1
After an interr"pt is acBno2ledged, the
interr"pt enable flip flop is reset to reenable
the interr"pts.
I I: 0 I:!0 .hen this instr"ction is e3ec"ted the
interr"pt enable flip flop is reset so that all
masBable interr"pts are disabled.
After an interr"pt is acBno2ledged, apart
from TRA7 all other masBable interr"pts can
be disabled.
/ opcode & & Implied
&
NO /'OF) 1
RIM A stat"s of
interr"pts
A!stat"s of
interr"pts
.hen this instr"ction is e3ec"ted the stat"s
of interr"pts is copied into the acc"m"lator.
It also reads serial data thro"gh the SI pin.
/ opcode & & Implied
&
NO /'OF) 1
SIM Interr"pt
masBs and
serial part A
Interr"pt masBs
and serial
part !A
.hen this instr"ction is e3ec"ted the
interr"pts are masBed or Bept pending as
specified in the acc"m"lator contents.
It also sends data on SO pin.
/ opcode & & Implied
&
NO /'OF) 1
IN $ bit
address
A '$ bit
IEO address)
A!'$ bit IEO
address)
This instr"ction is "sed to copy data from
inp"t port address specified into acc"m"lator.
.hen this instr"ction is e3ec"ted the
contents of port 2hose address is specified is
copied into the acc"m"lator.
% opcode$ bit
address
& direct NO -'OF(
MR(IO
R)
/0
O<T $ bit
address
'$ bit IEO
address) A
'$ bit IEO
address) !A
This instr"ction is "sed to copy the contents
of acc"m"lator to the o"tp"t port 2hose
address is specified into the instr"ction.
/ opcode$ bit
address
& direct NO -'OF(
MR(IO
.)
/0
RST n 'S7 > / ) 78+
'S7 > / ) 78,
S7 S7 > %
78 'n 3 $
he3)
'S7 > / )! 78+
'S7 > / )! 78,
S7 ! S7 > %
78 ! 'n 3 $
he3)
This instr"ction transfers the program control
to the specific memory address as sho2n in
fig"re
Instr"ction Restart locations
RST 0 0 3 $ ! 0000+
RST / / 3 $ ! 000$+
RST % % 3 $ ! 00/0+
RST - - 3 $ ! 00/$+
RST 1 1 3 $ ! 00%0+
RST 4 4 3 $ ! 00%$+
RST 5 5 3 $ ! 00-0+
RST* * 3 $ ! 00-$+
/ opcode & & Register
indirect
NO -'OF(
MR(M
.)
/%