EEE 307 Logic Circuits

Lecture 1
Course nformation
What are we going to learn?
Today Binary Systems
Bases: Binary, octal, hexadecimal
Complements
Signed Binary numbers
Binary codes
The rest of the topics are in the syllabus.
Take a look at the moodle site.
Binary numbers
Desimal base 10
5645
The decimal number system uses ten digits
and the coefficients are multiplied by powers
of 10
Binary base
Number base conversion
Octal and Hexadecimal numbers
Complements
Complements are used in digital
computers for simplifying the subtraction
operation and for logical manipulation.
Diminished radix complement
Radix complement
Radix = base
EEE 307 Logic Circuits
Lecture 2
Moodle
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Complements
Complements are used in digital computers for
simplifying the subtraction operation and for
logical manipulation.
Diminished radix complement
Radix complement
Radix = base
Diminished radix complements
Given a number N in base r having n digits, the
(r-1)'s complement of N is defined as
Ex: 9's complement of 345
Ex: 1's complement of 1011
Radix complement
The r's complement of an n-digit number N in
base r is defined as
Ex: The 10's complement of 8765
Ex: The 16's complement of 15
Ex: The 2's complement of 1110
Subtraction with complements
The subtraction of two n-digit numbers
M-N can be done as follows
Add the M to the r's complement of N
f the sum will produce an end carry
which is discarded, what is left is the result M-N
f M < N the sum does not produce an end carry
and is equal to which is the r's
complement of (N-M). To get the right answer
take the r's complement of the sum again.
Example
Example
Signed magnitude number sys.
We need negative numbers to perform
arithmetic operations.
But we don't have negative sign
We have only 0 and 1
Sign magnitude number system uses the left
most bit of the number to represent the sign
0 represents +
1 represents -
Ex 1101 = -5 0101 = +5
1's complement and 2's
complement systems
n a signed complement system a negative
number is indicated by its complement
Since positive numbers always start with a 0 on
the msb, the negative numbers always start with
1
n 1's complement system the negative of a
number can be computed by inverting all the
bits.
n 2's complement system the negative of a
number can be computed by inverting all the bits
and adding +1 to the inverted number.
Example
Arithmetic addition and
subtraction examples
13 + 5, -6 + 13, -7 -13
Do them using eight bits,
Do it using four bits
Binary codes
Digital systems represent and manipulate not only
binary numbers but also many other discrete
elements of information.
For ex: text symbols, picture, sound etc.
Bit means binary digit
A group of eight distinct quantities can be
represented by three bits.
Some bit combinations are not assigned when
the number of elements of the group is not a
power of two. For ex. Decimal digits 0, 1, 2, . 9
Decimal codes
Decimal
Digit
BCD Excess-3 84-2-1 2421 Biquinary
5043210
0 0000 0011 0000 0000 0100001
1 0001 0100 0111 0111 0100010
2 0010 0101 0110 0010 0100100
3 0011 0110 0101 0011 0101000
4 0100 0111 0100 0100 0110000
5 0101 1000 1011 1011 1000001
6 0110 1001 1010 1100 1000010
7 0111 1010 1001 1101 1000100
8 1000 1011 1000 1110 1001000
BCD
The BCD code is a straight assignment of the
binary equivalent. Most natural to use and most
commonly encountered desimal coding
Each four bits represent a digit. To represent
decimal number 455 in BCD
Other codes
The excess-3, 2421, and 84-2-1 are self
complementing; means the 9's complement of
the decimal number easily obtained by inverting
the bits.
Ex 345
The biquinary code is a seven bit code with error
detection properties Why?
Gray code
Gray code Decimal
Equivalent
0000 0
0001 1
0011
2
0010
3
0110
4
0111
5
0101
6
0100
7
1100
8
1101
9
1111
10
1110
11
1010
12
Analog information is
converted into digital
form by means of
analog to digital
converter.
Used in the applications
where normal
sequence of binary
numbers may
produce an error or
ambiguity during the
transition from one
Error-detection code
Message Parity
P
Message Parity
0000 1 0000 0
0001 0 0001 1
0010 0 0010 1
0011 1 0011 0
0100 0 0100 1
0101 1 0101 0
0110 1 0110 0
0111 0 0111 1
1000 0 1000 1
1001 1 1001 0
1010 1 1010 0
1011 0 1011 1
1100 1 1100 0
ASC Character Code
American Standard Code for nformation
nterchange.
Uses 7 bits to code 128 characters. Most
computers uses 8 bits as a single unit which is
called byte. The extra bit is used depending on
the application. For ex. Parity or to encode
Greek letters.
94 of them are printing characters.
26 upper case letters
26 lower case letters,
10 numerals
32 i l i t bl h t ? */ t
ASC Table
EEE 307 Logic Circuits
Lecture 3
Review
Complements
Decimal Codes
Other codes
Binary logic
Binary logic deals with variables that take on two
discrete values and operations that assume
logical meaning.
AND: represented by a dot.
OR: represented by a plus
NOT: represented by a prime.
Truth tables of logical
operations
AND OR NOT
x y xy x y x+y x X'
0 0 0 0 0
0 1 0 1 1
1 0 1 0 0
1 1 1 1 1
Gate symbols
Boolean algebra
Boolean algebra is an algebraic structure defined on a set of
elements B together with two binary operators + and .
Provided the following postulates are satisfied
1.a Closure with respect to +
1.b Closure with respect to
2.a An identity element wrt + designated by 0
2.b An identity element wrt . designated by 1
3.a Commutative wrt +: x + y = y + x
3.a Commutative wrt .: x y = y x
4.a is distributive over +: x(y +z)=(xy )+(xz)
4.b is distributive over +: x(y +z)=(xy )+(xz)
5. For every element x C B there exist an element x' C B
(called the complement of x) such that x + x' =1 and x x' =0
6.There exists at least two elements x,y C B such that
The distributive law (truth table)
x y z y+z x(y+z) xy xz (xy)+(xz)
Basic theorems and properties
of Boolean Algebra
Duality Principle Every algebraic expression deducible from the
postulates of Boolean algebra remains valid if the operators
and identity elements are interchanged.
Basic Postualtes and Theorems.
Postulate 2 a) x + 0 = x b) x 1 = x
Postulate 5 a) x + x'= 1 b) x x'= 0
Theorem 1 a) x + x = x b) x x = x
Theorem 2 a) x + 1 = 1 b) x 0 = 0
Theorem 3, involution (x' )' = x
Postulate 3, commutative a) x + y = y + x b) x y = y x
Theorem 4, associative a) x + (y + z) = (x +y)+z b) x (y z) = (x y) z
Postulate 4 a) x(y+z) = xy + xz b) x+(y z) = (x +y) (x+z)
Theorem 5, De Morgan a) (x+y)' = x'y' b) (x y)' = x'+y'
Theorem 6. absorbtion a) x + xy = x b) x (x+y) = x
Proves of basic theorems
1(a) x + x = x
1(b) xx = x
2(a) x +1 =1
Operator precedence
1. Parantheses ()
2. NOT
3. AND
4. OR
Venn Diagram
Boolean Functions
A boolean function is an expression formed with
binary variables, the two binary operators OR
and AND, and unary operator NOT, parantheses
and and equal sign.
For a given value of variables the function can
be either 0 or 1.
Examples
Example Truth table for a
function
Logic Diagram for a function
EEE 307 Logic Circuits
Lecture 4
Review
Binary logic
Truth tables
Gate symbols
Boolean funtions
Algebraic Manipulation
A boolean function is an expression formed with binary
variables, the two binary operators OR and AND, and
unary operator NOT, parantheses and and equal sign.
A literal is a primed or unprimed variable. When a Boolean
function is implemented with logic gates, each literal in
the function designates an input to a gate and each term
is implemented with a gate.
The minimization of the number of literals and the number
of terms results in a circuit with fewer gates.
Simple examples
Simplify the following Boolean functions
1. x + x'y 2. x(x' + y) 3. x'y'z + x'yz + xy
4. xy + x'z + yz Go by expanding as yz (x+x')
Complement of a function
The complement of a function F is F' and is
obtained by changing 0s for 1s and 1s for 0s in
the value of F.
The complement of a function may be derived by
applying DeMorgan's theorem.
(A + B)' = A'B' (AB)' = A' + B'
General form (A + B + C + .. F)' = A'B'C'....F'
(ABC ...F)' = A' + B' + C' + . +F'
Example
Find the complement of the functions G = xy'z + wx and F = w(xy
+ wy')
Minterms and Maxterms
A binary variable may appear either in its normal
form (x) or in its complement form (x'). Now
consider two binary variables x and y combined
with AND operation. Since each variable may
appear in either form there are four possible
combinations: x'y', x'y, xy', xy. Each of these four
AND terms is called a minterm or a standard
product. N variables can be combined to form
2^N minterms.
n a similar fashion n variables combined by OR
operation provide 2^N different combinations.
These terms are called maxterms or standard
Minterms and Maxterms for
three binary variables
x y z Term Designation Term Designatio
n
0 0
0
x'y'z' m
0
x + y+ z M
0
0 0
1 x'y'z m
1
x + y+ z'
M
1
0 1
0 x'yz' m
2
x + y'+ z M
2
0 1 1
x'yz m
3
x + y'+
z'
M
3
1 0 0
xy'z' m
4
x' + y+ z
M
4
1 0 1
xy'z m
5
x'+ y+ z'
M
5
1 1 0
x'y'z m
6
x+ y'+ z
M
6
1 1 1
xyz m
7
x'+ y'+ z'
M
7
Functions using minterms and
maxterms
A Boolean function can be
expressed from a given truth
table by forming a minterm
for each combination of the
variables that produces a 1
in the function and then
taking the or of the function.
x y z F1 F2
0 0
0
0
1
0 0
1 1 1
0 1
0 0 0
0 1 1
1 0
1 0 0
1 0
1 0 1
0 0
1 1 0
0 1
1 1 1
1 1
Sum of minterms
t is sometimes convenient to express a function in
its some of minterms form if it is not in this form it
can be made so by firs expanding the terms in
sum of AND terms.
Ex: Express F = A + BC in a sum of minterms
form.
Product of maxterms
To express a function as a product of maxterms it
must be first written into a form of OR terms.
Ex: Express F = xy + x'z in a product of maxterm
form.
Conversion between canonical
forms
The complement of a function expressed as the
sum of minterms equals the sum of minterms
missing from the original function.
Now apply DeMorgan
Examples
Standard Forms
The sum of products is a Boolean expression
containing AND terms called product terms and
one or more literals. The sum denotes the
OR'ing of thes terms..
The product of sums is a Boolean expressinon
containing OR terms, called sum terms. Each
term may have any number of literals. The
product denotes the ANDing of these terms.
Other logic operations
There are functions for n binary variables.
Digital logic gates
EEE 307 Logic Circuits
Lecture 5
Review
Algebraic manipulation: Use postulates and
theorems to simplify a logic expression
Complement of a function: Use De Morgan
theorem or invert the bits in the truth table
Minterms and maxterms: A function can be written
either in the sum of minterms form or in the
product of maxterms form. These are called
canonical forms.
We also have standard forms: i) sum of products
form ii) product of sums form
Simplification of Boolean
functions
A boolean function is an expression formed with binary
variables, the two binary operators OR and AND, and
unary operator NOT, parantheses and and equal sign.
A simplified Boolean function can be implemented by using
fewer number of gates.
n the previous lecture, we learned to simplify Boolean
functions by applying theorems and postulates.
That approach has two drawbacks:
1. t depends on the experience of the person.
2. ts hard to apply them when there exists more than three
literals in the expression.
Two-variable map
m
0
m
1
m
2
m
3
x'y' x'y
xy' xy
Three-variable map
m
0
m
1
m
3
m
2
m
4
m
5
m
7
m
6
x'y'z' x'y'z x'yz' x'yz
x'yz x'yz' xyz xyz'
Simplify the Boolean function
Simplify the Boolean function
Example
Find the complement of the functions
G = xy'z + wx and F = w(xy + wy')
Example
Given the following Boolean function F = A'C + A'B + AB'C + BC
a) Express it in sum of minterms form
B) Find the minimal sum of products expression
Four variable map
m
0
m
1
m
3
m
2
m
4
m
5
m
7
m
6
m
12
m
13
m
15
m
14
m
8
m
9
m
11
m
10




Simplify the Boolean function
Simplify the Boolean function
Five variable map
Simplify the Boolean function
Product of sums simplification
The simplified functions using map method were
expressed in the sum of products forms. With a
minor modification product of sums form can be
obtained.
a) Obtain F' by combining 0s in the function
instead of 1s
b) Apply DeMorgan Theorem on F' to get F in the
product of sums form
Simplify the following Boolean function in a) sum of products
form b) product of sums form.
Other comments
f the function is given in product of maxterms
form. First complement it using DeMorgan
Theorem. Then mark the 0s in the
complemented functions map and combine them
to find the simplified function
NAND and NOR implementation
Digital circuits are more frequently constructed with NAND or NOR
gates than with AND and OR gates. NAND and NOR gates are
easier to fabricate the current technology.
NAND implementation
1. Simplify the function and express it in sum of products form.
2. Draw a NAND gate for each product term of the function that has at
least two literals.
3. Draw a single NAND gate in the second level with inputs coming
from outputs of the first level
gates.
4. A term with a single literal requires an inverter on the first level or
may be complemented.
mplement the following function with NAND gates.
EEE 307 Logic Circuits
Lecture 6
Review
Karnaugh -Map method to simplify the functions in sum of
products form.
Get the minterms of the function
Put 1 in the corresponding cell if the minterm exist in
the function.
Group the 1s in the cells such that the number of 1s in
a group is a power of 2.
nclude each 1 in a group that has the maximum
number of 1s.
Also learned how to get the inverse of a function using K-
Maps and expressing the function in products of sums
form
Combinational logic
A combinational circuit consists of logic gates whose outputs at
any time determined directly from the present combination of
inputs without regard to the previous inputs.
Design procedure
1.State the problem.
2.Determine the number of available input
variables and required output variables.
3.Assign letter symbols to input and output
variables.
4.Obtain the truth table for each output.
5.Simplify the Boolean function for each output
equation.
6.Draw the logic diagram.
Design Ex 1: Half Adder (HA)
Problem: Design a circuit that adds two
bits.
Logic diagram of HA
Design Ex 2: Full Adder (FA)
Problem: Design a circuit that adds three bits.
Logic diagram of FA
Subtractors
The subtraction of two binary numbers may be accomplished by taking the
complement of the subtrahend by adding to the minuend. However, it is also possible
to implement this operation as done by the paper and pencil. By this way we will need to
get borrows from the next unit.
Half-subtractor
Problem: Design a circuit that subtracts one bit from the other one.
HS contiuned.
Full subtractor
Full-subtractor
Problem: Design a circuit that performs x-y-z operation where each variable is one bit
values.
Full subtractor continued
Code conversion
Sometimes it is necessary to convert
information given in one coding system to
another one.
Ex: BCD to Binary, Excess-3 to BCD etc...
Notice that if some cases in the inputs do not
exist they should be taken as don't care
conditions.
BCD to Excess-3 converter
State: Design a circuit that converts a BCD digit to an Excess-3 digit.
EEE 307 Logic Circuits
Lecture 7
Review
Combinational Circuit Designs
Half adder, full adder, half subtractor, full subtractor.
Code converters.
Combinational logic
A combinational circuit consists of logic gates whose outputs at
any time determined directly from the present combination of
inputs without regard to the previous inputs.
Reverse procedure:
Logic Diagram Logic Equations:
Ex:
Multilevel NAND circuits
The implementation that uses two levels of NAND gates were introduced.
How can we implement NOT, AND and OR gates by using NAND gates.
Procedure: 1. Draw the logic diagram. 2. Convert all AND gates to NAND
gates. 3. Convert all OR gates to NAND gates with invert-OR symbols. 4.
Check all small circles in the diagram if it is not compensated by another
circle, invert it by a NAND gate.
Example: F = A + (B'+C)(D'+BE')
Exclusive-OR function
Exclusive or function has some useful properties:
Odd function
Parity Generation and Checking
x y z P
x y z P C
EEE 307 Logic Circuits
Lecture 8
Review
Logic diagrams to logic equations
Multilevel NAND gates.
XOR => Odd function
Parity generator circuit and checking circuit
MS Circuits
There are several combinational circuits employed in the design
of combinational circuits.
MS components perform special digital functions commonly
needed in the design of the digital systems:
Adders, subtractors, comparators, decoders, encoders, and
multiplexers.
MS and PLD Components
With integrated circuits it is not the count of gates that determines
the cost but the number and the types of Cs employed and
the number of interconnections needed to implement the given
digital circuit.
Binary adder and subtractor
Ex: Addition of two four bit numbers
Binary parallel adder
Binary parallel adder generates the addition of two n-bit binary
Numbers in parallel.
Binary parallel subtractor
Carry propagations
n the worst case the carry propagates all full adder blocks.
Since carry propagation is the limiting factor for the speed of the
Adder, we must speed up the carry propagation
n the worst case the carry propagates all full adder blocks.
Two new binary varaibles are defined
Full adder
Full adder with two new binary varaibles.
Carry equations
Lookahead generator
And
And
And
And
And
And
Or
Or
Or
P3
G3
P2
P1
G2
G1
C1
C3
C2
C1
4-bit full adders with lookahead generator.
A4
And
Xor
C5
G4
P4
C4
P4
Xor
B4
A3
And
Xor
G3
P3
C3
P3
Xor
B3
A2
And
Xor
G2
P2
C2
P2
Xor
B2
A1
And
Xor
G
P1
P1
Xor
B1
C1
A1
S4
S2
S2
S3
EEE 307 Logic Circuits
Lecture 9
Review
N-bit parallel adders and subtractors.
Carry look ahead adder.
Decimal adders
Computers (esp.) in finance performs arithmetic operations
directly in decimal number system.
The decimal numbers are represented in binary-coded system.
BCD, Excess-3, 84-2-1, 2421 etc.
A decimal digit adder requires nine inputs and five outputs. This
circuit can be designed by using combinational design
methods. The truth table for that circuit has 512 entries.
BCD
Adder
K Z8 Z4 Z2 Z1 C S8 S4 S2 S1
0 0 0 0 0 0 0 0 0 0
0 0 0 0 1 0 0 0 0 1
0 0 0 1 0 0 0 0 1 0
0 0 0 1 1 0 0 0 1 1
0 0 1 0 0 0 0 1 0 0
0 0 1 0 1 0 0 1 0 1
0 0 1 1 0 0 0 1 1 0
0 0 1 1 1 0 0 1 1 1
0 1 0 0 0 0 1 0 0 0
0 1 0 0 1 0 1 0 0 1
0 1 0 1 0 1 0 0 0 0
0 1 0 1 1 1 0 0 0 1
0 1 1 0 0 1 0 0 1 0
0 1 1 0 1 1 0 0 1 1
0 1 1 1 0 1 0 1 0 0
BCD Adder Using Binary Adder
4-bit binary adder
4-bit binary adder
Magnitude comparator
A magnitude comparator is a combinational circuit that compares two num
A and B and determines their relative magnitudes. The outcome of the com
rision is specified by three binary variables that indicate A>B, A=B, A<b
Decoders and Encoders
A decoder is a combinational circuit that converts binary information
From n input lines to a maximum of 2^n distinct elements.
Truth Table of a 3-to-8 Line Decoder
x y z D0 D1 D2 D3 D4 D5 D6 D7
mplementation of a 2 to 4 decoder
Demultiplexer
A demultiplexer is a circuit that receives information on a single line
And transmits this information on one of 2^n possible output lines.
A decoder with an enable line can function as a demultiplexer.
Truth Table for a decoder with enable
Combinational logic implementation
with a decoder
Designing a 4 to 16 decoder using two
3 to 8 decoders
Encoders
An encoder is a digital circuit that performs the inverse operation of a
decoder. An encoder has 2^n or fewer input lines and n output lines.
Truth Table to Octal to Binary Encoder
Logic Equations
E A B D0 D1 D2 D3
Priority encoders
An encoder is an encoder circuit that includes the priority function.
Truth Table of a priority encoder
K maps
D0 D1 D2 D3 X Y V
EEE 307 Logic Circuits
Lecture 10
Review
How to design a decimal adder using BCD adder
Magnitude comparator without subtraction.
Decoders, encoders, priority encoders.
Demultiplexer
A demultiplexer is a circuit that receives information on a single line
And transmits this information on one of 2^n possible output lines.
A decoder with an enable line can function as a demultiplexer.
Multiplexers
Multiplexing means transmitting a large amount of information units
Over a smaller number of channels or lines.
A digital multiplexer is a combibational circuit that selects binary
information from one of many input lines and directs it to a single out-
put line
The selection of a particular input line is controlled by a set of selection
lines.
A 2-to-1 mux and 4-to-1 mux
nside a multiplexer
Boolean function implementation
Any function can be implemented by using a multiplexer.
First implementing a function with n variables using a 2^n to 1 mux.
EX: F(A,B,C) = _(1,3,5,6)
Example 2
A B C F
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
mplementing a Boolean function with n variables using 2^n-1 mux.
EX: F(A,B,C) = _(1,2,4,5)
Example 3
mplementing a Boolean function with n variables using 2^n-1 mux.
EX: F(A,B,C,D) = _(0,1,3,4,8,9,15)
Read only memory ROM
A read-only memory ROM is a device that includes both the decoder
and the OR gates within a sincle C oackage.
The ROM is used to implement complex combinational circuits within
One C package or as permanent storage for binary information.
ROM's come with special internal electronic fuses that can be program-
Med for a special configuration. Once the pattern is established, it stays
Within the unit even when the power is turned off and on again
ROM Block Diagram
2^n x m
ROM
N inputs
M outputs
Each bit
combinatio
n of the
input
Lines is
called an
address
Each bit
combinatio
n that
comes out
of the
output lines
is called a
word.
Combinational logic implemantation using
a ROM
EX: Design a logic circuit that
computes the third power of a three
bit two's complement input
Programmable logic array
A combinational circuit may occasionally have don2t care conditions.
When implemented with a ROM don't care condition becomes an
Address input that will never occur.
The result is that not all the bit patterns available in the ROM are used,
Whic may be considered a waste of available equipment.
For cases where the number of don't care conditions is excessive, it is
More economical to use a programmable logic array, PLA.
nside thePLA
PLA, Example
A B C F1 F2
0 0 0 0 0
0 0 1 0 0
0 1 0 0 0
0 1 1 0 1
1 0 0 1 0
1 0 1 1 1
1 1 0 0 0
1 1 1 1 1
Term A B C F1 F2
AB'
AC
BC
PLA, contacts for the example
EEE 307 Logic Circuits
Lecture 11
Review
Demultiplexers, multiplexers
Studied how to design a combinational circuit with a mux
ROM's, comb. circuit design with using ROMs
PLAs
Flip Flops
Flip flops are binary cells capable of storing one bit information.
Properties of flip-flops:
1. They have two outputs one for the normal value and one for the
complement value of the bit stored in it.
2. t can maintain a binary state indefinitely until directed by an input
signal to swith states.
3. There are different types of flip-flops which differ based on the
number of inputs and the effects of the input signals in its binary state.
Basic flip-flop circuit
RS-flip flop
The operation of the flip flop can be modified by providing an additional
control input that determines when the state of the input is to be changed.
RS flip-flop continued
Characteristic equation
Graphic symbol
D flip flop
One way to eliminate the undesirable condition of the indeterminate state in
the RS flip flop is to ensure that inputs S and R are never equal to 1 at the
same time.
JK flip flop
A JK flip flop is an improved RS flip flop where indeterminate state of the RS input is
defined as toggle the state.
T flip-flop
T- flip flop is a single input version of the JK flip-flop.
Trigerring of the flip flops
The state of a flip-flop is switched by a momentary change in the input
signal. This momentary change is caleed a trigger.
Asynchronous flip-flops such as the basic flip-flops introduced at the
begining of the lecture are trigerred by a change of signal level. This level
must return to its initial value before second trigger is applied.
A clocked flip flops are triggered by pulses. Flip-flops can accept input during
One level of the clock pulse. However,his approach can cause problems when
the circuit has feedback.
Definition of clock pulse transition
Master slave flip flop
Graphic symbols of the flip flops
Flip flops with direct inputs
Exercise
Exercise