Electronic Devices Lab Manual

K.Sridhar Raju www.engglabs.blogspot.
com
Department of
Electronics & Communication Engineering
Manual and Observation Book
Electronic Devices Lab
By
www.engglabs.blogspot.com
K.Sridhar Raju
9346226
!
K.Sridhar Raju www.engglabs.blogspot.com
2
"epartment o#
$lectronics % &ommunication $ngineering
$lectronic "e'ices (ab
Name of the student :
Class :
!oll No: :
"emester :
#cad $ear :
3
4
L%"& O' E()E!%MEN&"

!. )*+ characteristics o# Silicon and ,ermanium diodes and measurement o# static and dynamic
resistances
2. -ener diode characteristics and its applications as 'oltage regulator
3. "esign. reali/ation and per#ormance e'aluation o# hal# wa'e and #ull wa'e recti#iers without #ilters
4. "esign. reali/ation and per#ormance e'aluation o# hal# wa'e and #ull wa'e recti#iers with &. (.
(&. 0 1ilters
2. 3lotting the characteristics o# B45 in &ommon Base con#iguration and measurement o# h*
parameters
6. 3lotting the characteristics o# B45 in &ommon Base con#iguration and measurement o# h*
parameters
6. 3lotting the characteristics o# 41$5 in &ommon Source con#iguration and measurement o#
5ransconductance and "rain resistance
7. B45 Biasing &ircuits
9. 1$5 Biasing &ircuits
!. &ommon $mitter B45 8mpli#ier and measurement o# ,ain. bandwidth. input and output
impedances
!!. &ommon Source 1$5 8mpli#ier measurement o# ,ain. bandwidth. input and output impedances
!2. $mitter 1ollower9Source #ollower circuts and measurements o# ,ain. bandwidth. input and output
impedances
!3. &haracteristics o# Special de'ices : ;45 and S&R
!4. &haracteristics o# 5unnel diode and photo diode
#ppendi*
<easurement o# h*parameters
&haracteristics o# photo transistor

2
6
Department of
Electronics & Communication Engineering
$lectronic "e'ices (ab
=ame o# the student>
&lass B.$>
Roll =o> 8cad ?ear>
%NDE(
"l
No
Name of the E*periment Date
Conducted
%nitials of staff
6
7
E()E!%MEN& NO: +
,-% characteristics of "ilicon and .ermanium diodes and measurement of static
and d/namic resistances
+0 #%M : a@ 5o obtain the #orward bias and re'erse bias characteristics o# 3*= junction diode A,e %
Si@.

10 #))#!#&2":
Sl =o. =ame o# the de'ice Range9 =o Bty.
!. ,e "iode "R22 !=os
2. Si "iode + = 46 !=os
3. ".&.8mmeter A*2 m8@ !=os
4. ".& 8mmeter A*! 8@ !=os
2. ".& 3ower Supply A*3)@ !=os
6. &onnecting wires ******* !=os
6. Resistor 2.2K !=os
7. ".& )olt meter A : 22) @ !=os

30 &4EO!$:
"+C"$ S3$&+1+&85+C=S>
"R 22 * 8lloy junction suitable #or low 'oltage. low power recti#ier applications such as battery
eliminator etc.
)RR< 22 ) maD
+18) 22 m8 maD
+1R< + 8 maD
3tot Aupto 22 c@ 22 m' maD
)1 A+1 E 22m8@ ) maD
5j 9 & maD
3*= junction diode is a two terminal solid state de'ice. 5he Symbolic representation o# a diode is
shown below.
8node AF@ AK@ cathode A*@

9
5he terminal K is called the cathode or the negati'e electrode. 5he terminal 8 is called the anode or
the positi'e terminal. Ge also re#er the terminals as p*side and n*side terminals.
8@ 1CRG8R" B+8S> Ghen the terminal HKI is connected to the negati'e terminal o# the supply and
the terminal H8I is connected to the positi'e o# the power supply the diode is said to be J#orward
biasedK. +n other words when p*side o# the junction diode is connected to the positi'e and n*side is
connected to the negati'e o# the power supply the diode is connected in the J#orwardK direction.
5he diode gets #orward biased only when )# L )r. 5he #orward biased diode is shown in #igure
A3@. 5he atomic 'oltage drop across the body o# the de'ice is /ero under ideal conditions. +n the
#orward biased diode the height o# the Jpotential energy barrier J at the junction gets lowered by
the magnitude o# the #orward bias )1. 5his disturbs the initial eMuilibrium between the #orces
tending to cause di##usion o# Jmajority carriersK across the junction and the opposing in#luence o#
the potential energy barrier at the junction. =ow JholesK cross the junction #rom the p*region to
the n*region while the electrons cross the unction #rom the n*region to the p*region. 1low o# both
types o# carriers causes con'entional electric current #rom p*region to n*region and these
components get added. Nence under #orward biased condition Ai.e )# L 'r@ the #ollowing occur.
!. Resistance o##ered by the junction is low.
2. 3*= junction acts as a closed switch.
3. Gidth o# the depletion region is reduced.
4. "ri#t current increases with increase in bias.
&ut*in )oltage )> &ut*in 'oltage is de#ined as the 'oltage at which !O o# the rated current #lows. +n
practical terms. this is the 'oltage at which the diode may be considered to start the conduction.
1or ,e. ) E .2'.
1or Si. )E .6'.
B@ R$)$RS$ B+8S &C="+5+C=> a 3*= diode with re'erse bias condition i.e.. with positi'e
terminal o# the battery )r connected to the n*side and negati'e terminal connected to the p*side.
!
5his re'erse bias causes both holes in the p*region and electrons in the n*region to mo'e away
#rom the junction. Nence the region o# negati'e charge density on the p*side and region o# positi'e
charge density on the n*side become wider i.e.. the width o# the depletion region increases. 1urther
the height o# the potential energy barrier increases with increase in )r. the applied 'oltage. 5his
increased barrier height ser'es to reduce the #low o# majority carriers to the other side i.e. holes
#rom p*side to n*side and electrons #rom n*side to p*side. Nowe'er the #low o# minority carriers
remains unin#luenced by the increased barrier height. Since these minority carriers #all down the
potential energy barrier. nominally /ero current #lows under re'erse bias condition as there are a
#ew number o# minority carriers. Nowe'er a small current does #low in the re'erse direction i.e..
#rom n*region to p*region across the junction. 5his eDtremely small re'erse current is called
re'erse saturation current A+o@ 5he magnitude o# +o #or ,e is about #ew 8 and #or silicon it is a #ew
nano amperesAn8@.
Nence under re'erse biased condition.
!. 5he resistance o# the diode increases
2. 5he width o# the depletion region increases.
3. 5he current is eDtremely low.
50 C%!C2%& D%#.!#M>
1CRG8R" B+8S

R$)$RS$ B+8S
!!
! 6 101k ohms
7
8-38 ,
-
# 98-+88 :#;
98-18,;
#
8 98-18 m#;
! 6 101k ohms
98-18,;
7
8-38 ,
-
<0 )!OCED2!E:
1CRG8R" &N8R8&5$R+S5+&S>
!. &onnect the circuit as shown in the corresponding circuit diagram.
2. +ncrease the supply 'oltage #rom /ero 'olts. Cbser'e the corresponding 'alue o# current.
3. 1or e'ery 'alue o# #orward 'oltage across the diode. obser'e the 'alue o# current and record it.
NO&E: 5he graph should be drawn showing that the 'oltage )# is an +ndependent parameter hence the
supply 'oltage must be 'aried and corresponding 'alue o# current must be noted.
4. Cbser'e the 'oltage across the diode where current +# just starts #lowing through the diode. =ow
record the 'alues o# 'oltage and current.
2. 5he cutin 'oltage should be clearly obser'ed and noted.
6. +ncrease the diode 'oltage in suitable steps without eDceeding the maDimum 'alues indicated a#ter the
cutin 'oltage to obtain a smooth cur'e.
6. Repeat the abo'e procedure #or Si diode also obser'ing some precautions.
7. 3lot the graphs and obtain the dynamic and static resistance #rom the )*+ characteristics. &ompare
them with the eDpected 'alues.
R$)$RS$ B+8S &N8R8&5$R+S5+&S>
!. &onnections are to be made as per the corresponding circuit diagram.
2. 5he independent parameter i.e.. the diode 'oltage )R is 'aried #rom /ero 'olts and corresponding
'alues o# the re'erse current +R is obser'ed.
3. )ary the supply 'oltage #rom /ero 'olts. =ote the 'alues o# )R and +R.
4. 5abulate all the obser'ations.
2. Repeat the abo'e procedure #or Si diode.
6. 1ind the dynamic and static resistance #rom the graph.
OB"E!,#&%ON":
1or ,e diode
Aa@ 1or 1orward Biased &ondition >*
,s 9,; ,d 9,; %d9m#;
!2
!3

Ab@ 1or Re'erse Biased &ondition> *
)sA)@ )d A)@ +d A8@
!4
=0 OB"E!,#&%ON": 1or Si. "iode
Aa@ 1or 1orward Biased &ondition >*
)sA)@ )d A)@ +d Am8@

!2
Ab@ 1or Re'erse Biased &ondition> *
)sA)@ )d A)@ +d An8@
>0 E()EC&ED .!#)4:
+ Am8@
,e Si

)* F )

+ A8@
!6
?0 !E"2L&:-
+80 ,%,# @2E"&%ON":
!. Ghat do you understand by a junction diodeP
2. +s the 3*= junction diode a passi'e element or an acti'e elementP
3. Ghat is the importance o# the type number gi'en to the 'arious diodesP
4. Ghat is meant by potential barrier across a 3*= junctionP
2. Ghat is the signi#icance o# a diode as a de'iceP
6. Ghat is cut in 'oltageP Ghat is the 'alue o# cutin 'oltage #or ,e
and Si diodes. Ghat is the reason #or the di##erence in cutinP
)oltage o# ,e and Si.

6. $Dplain physically how a 3*= junction #unctions as a recti#ier.
7. Ghat is the eDpression #or the total current in a 3*= junctionP Now
does it 'ary with the applied 'oltageP
9. Ghat do you understand by a re'erse saturation currentP Ghat
are the typical 'aluesP
!. Ghy is the magnitude o# the current in the #orward biased diode
greater than that in the re'erse biased diodeP
!!. Now does the re'erse saturation current 'ary with temperature
#or ,e and Si diodesP +s it o# signi#icance while the circuit
designer chooses a particular de'ice in designP
!2. Ghat do you understand by dynamic and static resistanceP Now
are these 'alues obtained graphicallyP
!3. "e#ine the terms #orward and re'erse resistance o# a 3*=
4unction diode.
!4. $Dplain the capaciti'e e##ects in a junction.
!2. Ghat are the 'arious applications o# a 3*= junction diodeP
!6
E()E!%MEN& NO:1

Aener diode characteristics and its applications as voltage regulator
+0 #%M: a@ 5o obtain the 'olt*ampere characteristics o# -ener diode
b@ 5o obtain the regulation characteristics namely !@ Supply 'oltage regulation characteristics
and 2@ (oad regulation characteristics.
10 #))#!#&2":
S.=o. +tem Range9Speci#ication Bty
! -ener diode $S- 2.2 !
2 "& 8mmeter *2 m8 !
3 "& )oltmeter *2 ) 2
4 Resistor 2.2 Q Nal# Gatt !
2 Regulated 3ower Supply *3 ) !
6 "ecade Resistance BoD ! * ! < !
6 3atch cords 9 &onnecting wires
30 &4EO!$:
Because o# the eDistence o# an electric #ield across a re'erse biased junction. it is possible to rupture
co'alent bonds. 5his can be done by eDerting a strong #orce on the bound electrons so that they are Jtorn
awayK #rom the bonds. 5his process leads to additional electron*hole pairs. Ghen additional electron*hole
pairs are generated. the re'erse current increases. 5his mechanism is called -ener BreaQdown. and the
'oltage at this point is called /ener 'oltage. which remains irrespecti'e o# the 'ariations re'erses current.
supply 'oltage and load resistance.
8'alanche BreaQdown or 8'alanche <ultiplication is a process wherein. a carrier acMuires enough
energy #rom the applied potential. to collide with a crystal ion and disrupt a co'alent bond.
Ghen a bond is disrupted in this #ashion. a new electron*hole pair is generated. =ow. these carriers can
also gain energy #rom the applied potential and go on to disrupt other co'alent bonds. 5his process
becomes cumulati'e leading to large re'erse currents.
5he strong #ield reMuired #or -ener BreaQdown is reached in the range o# 46) in highly doped
diodes. 5he high doping concentration is reMuired to ha'e a su##iciently thin depletion region.
+# the depletion region is thin. then a strong #ield is produced that can rupture co'alent bonds. ,enerally
the doping concentration is around one impurity atom per !
2
silicon atoms. 5he electric #ield at the
junction is o# the order o# !
6
)9cm.
+n the re'erse characteristic o# a -ener diode. the Qnee 'oltage is called the breaQdown )oltage )/.
,enerally. in lightly doped diodes. the depletion region is relati'ely thicQR 8'alanche BreaQdown
is predominant and occurs at higher 'oltages. A8bo'e 7)@.
!7
a; &o obtain the volt-ampere characteristics of Aener diode
50 C%!C2%& D%#.!#M":
1or Re'erse Bias>
1or 1orward Bias>

<. )!OCED2!E:
1or Re'erse Bias
!@ &onnect the circuit as per th3 circuit diagram. Keep the 'oltage o# the power supply at minimum and
switch it on.
2@ Starting #rom /ero. increase the supply 'oltage in small steps. $ach time. note the corresponding
'ales o# the -ener 'oltage )/ Aas indicated by the 'oltmeter@ and the current Aas indicated by the
ammeter@.
3@ 5abulate all readings and plot i 'ersus )/.
1or 1orward Bias
!@ &onnect the circuit as per the circuit diagram. $nsure power*supply 'oltage Qnobs are in the
minimum position and switch it on.
2@ )ary the supply 'oltage in small con'enient steps. =ote down the corresponding 'ales o# #orward
'oltage Aas indicated by the 'oltmeter@ and the current Aas indicated by the ammeter@.
!9
3@ 5abulate all readings. 3lot i 'ersus )#.
B0 E()EC&ED .!#)4:
=0 &#B2L#! COL2MN":
1orward &haracteristics>
2
)- A)olts@ +- Am8@
Re'erse &haracteristics>
)- A)olts@ +- Am8@
2!
b; Aener diode regulator characteristics
)oltage regulator should pro'ide constant 'oltage at any desired 'alue irrespecti'e o# 'ariations in the
supply 'oltage and 'ariations in the load. 1rom the re'erse characteristics o# the -ener diode. at -ener
BreaQdown. 'oltage across diode remains constant irrespecti'e o# the 'ariations in re'erses current and
supply 'oltage. Since the characteristics o# -ener diode satis#ies the worQing o# a regulator. a 'oltage
regulator using -ener diode is designed. Regulation characteristics are di'ided into line or 'oltage
regulation and load regulation.
C%!C2%& D%#.!#M O' # AENE! D%ODE !E.2L#&O!:
)!OCED2!E:
Supply 'oltage regulation A(ine regulation@ characteristics>
!. &onnect the circuit as per the circuit diagram. $nsure that the power supply 'oltage Qnobs are in
the minimum position and switch it on.
2. Set the supply 'oltage to about !.2 ).
3. &hoose a 'alue #or load current. say +(E! m8.
4. )ary the resistance in the "RB so that the current #lowing through the load is eMual to the
chosen i(.
2. =ow note the corresponding 'alues o# input 'oltage )in.
6. Repeat the steps 4 and 2 by increasing the supply 'oltage in small con'enient steps till about
22).
6. 5abulate the readings.
7. Repeat the abo'e procedure #or di##erent 'alues o# load current i(.
9. 3lot ) 'ersus )in.
(oad regulation characteristics> (oad regulation characteristics>
!@. &onnect the circuit as per the circuit diagram. $nsure that all power supply Qnobs are in
minimum position and switch it on.
2@ &hoose a 'alue o# the supply 'oltage. say )inE!2)
3@ 8djust the "RB to get minimum resistance. 5hen maDimum current #lows. =ote down the load
current and the 'oltage across the load A)@.
4@. +ncrease the resistance so that i( decreases. 8t con'enient inter'als. note down the 'alue o# i(
and the corresponding 'alue o# ).
2@. 5abulate the readings.
6@. Repeat the abo'e steps #or 'arious 'alues o# )in.
6@. 3lot i( 'ersus ).
22

F

*

! *
!<S
E()EC&ED .!#)4":
&#B2L#! COL2MN":
)oltage Regulation &haracteristics
+(E .2 m8 +(E ! m8
)in A)olts@ )o A)olts@ )in A)olts@ )o A)olts@
23
)oltage9(ine Regulation (oad Regulation
(oad Regulation &haracteristics
)inE !2 )olts )inE !7 )olts
+(Am8@ )o A)olts@ +(Am8@ )o A)olts@
24
!E"2L&:
,%,# ,OCE:
!@ Ghat are the typical applications o# a -ener diodeP
2@ Ghy a -ener diode is generally not connected in #orward biasP
3@ Ghat is meant by regulationP Ghy is it reMuiredP
4@ "e#ine the 'arious types o# breaQdown possible in diodes.
2@ ,i'e the typical application o# an a'alanche breaQdown diode.
6@ Ghat are the typical applications o# a -ener diodeP
6@ =ame the 'arious types o# diodes a'ailable
7@ Ghat is meant by breaQdown o# diodesP
9@ Now do we test a diode using a multimeterP
22
26
E()E!%MEN& NO:3
!EC&%'%E!" C%&4O2& '%L&E!"
#%M:5o obtain ripple #actor and regulation o# a hal# wa'e and #ull wa'e recti#ier without #ilters.
#))#!#&2"> *
S.=o. =ame o# the de'ice Range9=o Buantity
!. "iodes != 46 2 =o.
2. <illi ammeter * 22m 8mp. ! =o.
3. &RC 2 <h/ ! =o.
4. &enter taped 5rans#ormer 6**6 ) ! =o.
2. 3atch cords
6. )oltmeter *2 ) ! =o.
6. "ecade Resistance BoD !T : ! < T ! =o.
&4EO!$:
Recti#iers per#orm the tasQ o# con'erting 8.&. to ".&. &ommonly used recti#iers are Nal#*Ga'e
Recti#ier and 1ull*wa'e Recti#ier.
4alf Dave rectifier:
5he basic recti#ying element is a diode. 5his de'ice has essentially an in#inite resistanceAwhen it is re'erse
biased@ to current #low in one direction and a 'ery small resistance Awhen it is #orward biased@ #or the
current #low in the opposite direction.
Ghen the diode is #orward biased. current #lows through the load resistance. leading to the de'elopment
o# a uni directional output across it. Ghen it is re'erse biased. current is approDimately /ero. there#ore
'oltage de'eloped across the load is /ero.
'ull-Cave !ectifier:
8s shown in the #igure in a #ull*wa'e recti#ier the trans#ormer secondary has a center*tap and each hal#
gi'e a peaQ 'oltage o# )m. +n each hal# there is one diode "! and "2. 5he load resistance R( is common to
both hal'es. Nence a #ull*wa'e circuit comprises o# two hal#*wa'e circuits. Cn the positi'e hal# cycle
when the point 8 is F'e w.r.t B. the diode "! conducts and current i! #lows through R(. "uring the
negati'e hal# cycle the point & is F'e w.r.t to B and hence the diode "2 conducts and current i2 #lows
through R(.
C%!C2%& D%#.!#M:
26
1ig: Nal# wa'e
recti#ier
1ig> 1ull Ga'e Recti#ier

)!OCED2!E for '2LL C#,E and 4#L' C#,E !EC&%'%E!
+0 &onnect the circuit as per the circuit diagram.
10 &hoose an appropriate 'alue #or the load resistor. say. ! Q T.
30 Cbser'e the input and output wa'e#orms on the &RC and 'eri#y whether they are as can be eDpected.
50 <easure the peaQ 'oltage )m on the &RC screen. ;sing this 'alue o# )m. the 'alues o# +rms and +dc can
be calculated.
<0 <easure the "& current and the "& 'oltage in the ammeter and the 'oltmeter respecti'ely.
B0 <easure the peaQ 'oltage )m Aor the dc 'oltage )dc. using the 'oltmeter@ at the no load condition.
=0 <aQe calculations according to #ormulae.
'O!M2L#E:
N8(1 G8)$ R$&5+1+$R>
+m E )m 9 AR# F R( F R@
+dc E +m92 . +rms E +m9U
V E WA+dc9+rms@
2
: !X
!92
Regulation E A)no load : )#ull load@9)#ull load
27
1;(( G8)$ R$&5+1+$R>
+m E )m 9 AR# F R( F R@
+dc E +m9!.4!4. +rms E 2+m9U
Ripple #actor V E WA+dc9+rms@
2
: !X
!92
OB"E!,#&%ON":
Recti#ier +"&Am8@ )"&A)@ +8&Am8@ )8&A)@ Ripple
1actor V
Nal#wa'e
recti#ier
1ullwa'e
recti#ier
!E"2L&:
,%,# ,OCE:
!@ Ghat is the ad'antage o# using a #ull wa'e recti#ier o'er a hal# wa'e recti#ierP
2@ Ghat is a bridge recti#ierP Ghat is the ad'antage o# using it o'er a #ull wa'e recti#ierP
3@ Ghat is the 3eaQ +n'erse )oltage in the case o# #ull wa'e and hal# wa'e recti#iersP
4@ "e#ine regulation and ripple #actor. Ghat are the ideal 'alues #or these MuantitiesP Ghat are the
practical 'aluesP
2@ Now do we remo'e ripple #rom a recti#ier outputP
6@ Ghat is a #ilterP Ghat is its useP
6@ Ghat is a regulatorP Ghy is it reMuiredP
29
B$ 294 : + sem $" (ab. $&$ "ept.. <)SR$&
3
B$ 294 : + sem $" (ab. $&$ "ept.. <)SR$&
E()E!%MEN& NO:5
!EC&%'%E!" C%&4 '%L&E!"
#%M:5o obtain ripple #actor o# a #ull wa'e recti#ier with #ilters.
#))#!#&2":
S.=o. =ame o# the
de'ice
Range9 =o Bty
! Si diode +=46 2
2 " < < 2
3 8.& power
supply
23).2N/ !
4 &onnecting
wires
2 Resistor !K !
6 & R C !
&4EO!$:
8 #ull wa'e recti#ier con'erts a /ero a'erage 'alue signal into a signal which is unidirectional with some
a'erage 'alue. 5he two diodes in the circuit are connected in such a way that the conduction #or one hal#
cycle AF'e@ taQes place through one diode Asay "@ and the diode "2 is not conducting. +n the neDt hal#
3!
B$ 294 : + sem $" (ab. $&$ "ept.. <)SR$&
cycle diode "! is not conducting and "2 is conducting. 5he current #lowing through the load is always in
the direction. 5he current #lowing through the load is the sum o# the load currents.
!EC&%'%E! C%&4O2& '%L&E!:
!egulation:
+dc E 2+m 9
+rms E +m 9 Y2
+m E )m 9 AR# F R(@
Ripple #actor V E rms 'alue o# alternating components o# wa'e 9 a'erage 'alue o# wa'e
Ripple #actor AV@
V E Y WA+rms 9 +dc@
2
:!X
+rms 9 +dc E A+m 9 2@ 9 A2+m 9 @ E !.!!
V E YA!.!!2 : !@ E .472
!egulation:
)dc E A2)m 9 @ : A+dc R#@
)no load E 2)m 9 Abecause +dc E 8@
)#ull load E 2 )m 9 * +dc R#
Regulation E A)noload : )#ull load@ 9 )#ull load
'2LL C#,E !EC&%'%E! C%&4 %ND2C&O! '%L&E!:
5he impedance o# inductor increases with #reMuency hence better #iltering action occurs #or higher :
harmonic terms. 5he wa'e#orm in the output is eDpected to be principally o# second harmonic.
!ipple 'actor:
V E W2 9 A3 Y2@ XW! 9 YA! F 4Z
2
(
2
9 R(
2
@X
+# 4Z
2
(
2
9 R(
2
LL !
32
B$ 294 : + sem $" (ab. $&$ "ept.. <)SR$&
V E R(9W3Y2. Z(X
!egulation :
)dc =o (oad E 2)m 9
)dc 1ull (oad E 2)m 9 * +dc R * A3@
R : is the total resistance o# the circuit eDclusi'e o# the load
i.e. RER#FR&FRS where R# is the #orward resistance o# diode. R& is the choQe resistance and RS is the
resistance o# the secondary winding.
C#)#C%&O! '%L&E!:
)dc no load E )m
)dc #ull load E )m : A)r 9 2@ Ghere )r is the total capacitor discharge 'oltage or the ripple 'oltatge.
!ipple 'actor:
V E )rms 9 )dc E ! 9 A4 Y3 #&R( @
V E A)r92@9A)m :)r92@
( : S$&5+C= 1+(5$R>
!egulation:
) dc no load E 2)m 9
)dc #ull load E 2 )m 9 * +dc.AR#FR&FRS@
L-section filter:
!ipple 'actor:
r E )rms 9 )dc E 2 D c 9 3 D (
E AY2@ 9 A!2Z
2
(&@
- "EC&%ON '%L&E!:
!egulation:
)dc no load E )m
33
B$ 294 : + sem $" (ab. $&$ "ept.. <)SR$&
)dc #ull load E )m : )r 9 2
!ipple 'actor:

R.1E !9A4Y2 Z
3
&
2
(

@
C%!C2%& D%#.!#M":
G+5N +=";&5CR 1+(5$R>

G+5N &838&+5CR 1+(5$R>

G+5N (*S$&5+C= 1+(5$R>
34
B$ 294 : + sem $" (ab. $&$ "ept.. <)SR$&

G+5N 3+*S$&5+C= 1+(5$R>

)!OCED2!E:
)#!& E # A;sing an inductor #ilter@
!@ &onnect the #ull wa'e recti#ier circuit with an inductor #ilter
o# 'alue ( E !N and R( E !K.
5he step down 'oltage output o# the trans#ormer is applied as
input to the 1GR circuit.
2@ <easure the dc current #lowing the circuit
3@ Cbser'e the output wa'e#orms on the &RC.
4@ <easure the peaQ 'alue o# the input and output 'oltage using a &RC. 8lso measure the ripple
'oltage.
2@ &alculate the regulation and ripple #actor using the appropriate relations.
6@ )eri#y the results using theoretical calculations.
)#!& E B A;sing a capacitor #ilter@
!@ &onnect a capacitor #ilter to the #ull wa'e recti#ier circuit.
2@ Cbser'e the input and the output wa'e#orms on the oscilloscope.
32
B$ 294 : + sem $" (ab. $&$ "ept.. <)SR$&
3@ <easure the "& current through the load.
4@ <easure the ripple 'oltage and the peaQ 'oltage o# the output wa'e#orm #rom the oscilloscope.
2@ &alculate the ripple and regulation using the appropriate relations
)#!& E C A;sing ( : Section 1ilter@
!@ <aQe the connections as per the circuit diagram.
2@ &onnect an (*Section #ilter as shown.
3@ Cbser'e the input and the output wa'e#orms on the Cscilloscope
4@ <easure the dc current #lowing the circuit using the "& 8mmeter.
2@ <easure the peaQ 'oltage and the ripple 'oltage o# the output wa'e#orm.
6@ <easure the series resistance o# the choQe. ARc@ resistance o# the
trans#ormer winding ARs@ and the diode #orward resistance AR#@
6@ &alculate regulation and ripple #actor using appropriate relations
)#!& E D A;sing a * Section #ilter@
!@ <aQe the connections by connecting all the capacitors and
inductors in the circuit.
2@ Cbser'e the output wa'e #orm on the Cscilloscope.
3@ <easure the dc current A+dc@ #lowing through the circuit.
4@ <easure the peaQ 'oltage and the ripple 'oltage on the oscilloscope.
2@ $'aluate the ripple #actor and regulation using the appropriate relations.
6@ $'aluate the results theoretically and 'eri#y.
$'aluate the ripple #actor and regulation using the relations gi'en below.
Ripple #actor A r @ E 2 [& 9 R( [&! 9 [(!
E 2 ! 9 2G& : ! 9 R( : ! 9 2G&! 2G(!
Regulation> )dc no load : )dc #ull load 9 )dc #ull load
)no load E )m
)dc #ull load E )m : +dc D ! 9 4#c : +dc*R
Ghere +dc E )dc 9 R(. R E Resistance o# the trans#ormer
winding F choQe F diode
E()EC&ED C#,E'O!M"
36
8.& input wa'e#orm to the
1ullwa'e recti#ier
v 9'olts;
t 9sec;
B$ 294 : + sem $" (ab. $&$ "ept.. <)SR$&
36
v 9'olts;
t 9sec;
'
maD '
min
Cutput wa'e#orm o# the 1ullwa'e
recti#ier with &apacitor #ilter
v 9'olts;
t 9sec;
Recti#ier without #ilter
v 9'olts;
t 9sec;
'
maD '
min
recti#ier with +nductor #ilter
B$ 294 : + sem $" (ab. $&$ "ept.. <)SR$&
OB"E!,#&%ON":
1ilter section +"&Am8@ )"&A)@ +8&Am8@ )8&A)@
5heoritical
Ripple
1actor V
3ractical
Ripple
1actor V
+nductor #ilter
&apacitor
1ilter
(*Section
1ilter
3i section
#ilter

!E"2L&:
37
v 9'olts;
t 9sec;
Cutput wa'e#orm o# the
1ullwa'e recti#ier with 0*
section #ilter
v 9'olts;
t 9sec;
'
min
'
maD
recti#ier with (*section #ilter
B$ 294 : + sem $" (ab. $&$ "ept.. <)SR$&
,%,# - ,OCE
!. Ghy is the ripple #reMuency double the 'alue o# the supply 1reMuency in the case o# a #ull wa'e
recti#ier.
2. $Dplain the importance o# ripple and regulation in the case o# a recti#ier.
3. 8 capacitor #ilter pro'ides nearly )m 'olts at light load. but the 'oltage regulation is poor.
4. $Dplain the reason #or a poor regulation in the case o# a 1GR with capacitor #ilter.
2. $Dplain why only the inductor or the capacitor alone are not used as #ilters to a 1GR circuit. +n other
words discuss the disad'antages o# only & or only ( #ilter.
6. Ghich #ilter circuit do you pre#er in con'erting the recti#ied output 'oltage to a pure dc 'oltage. ,i'e
reasons. &onsider the cases o# a light load and large loads.
39
B$ 294 +* sem $" (ab. $&$ "ept.. <)SR$&
E()E!%MEN& NO: <
COMMON B#"E &!#N"%"&O! C4#!#C&E!%"&%C"
#%M: 5o obtain input and output characteristics o# a common*base transistor.
#))#!#&2":
Sl.=o.
=ame o# the de'ice
Range 9=o Bty.
!. 8mmeters :! m8 2
2. Resistor 2.2K !
3. 5ransistor B& !6 !
4. <ulti meter9)oltmeter ***** !
C%!C2%& D%#.!#M:
&4EO!$:
5he circuit shown in the #igure abo'e. is re#erred to as &ommon Base or &B con#iguration. since the base
is common to both input and output circuits. 1or an =3= 5ransistor. the largest current components are
due to the electrons. 5he emitter*base junction is always #orward biased Athe 'oltage being )$B@and the
collector*base junction is re'erse biased Athe 'oltage being )&B@.
5he 'arious currents are related by the eMuation
+$E+BF+&
1rom the eMuation. we see that output current +& is completely determined by input current +$ and the
output 'oltage )&BE)&. 5he output relation may be written in implicit #orm as
4
B$ 294 +* sem $" (ab. $&$ "ept.. <)SR$&
+&E#A)&B.+$@
Similarly. in implicit #orm. the input characteristic is gi'en by
)$BE#A)&B.+$@
5he output characteristic is a plot o# +& 'ersus )&B with emitter current +$ as a parameter.
5he input characteristic is a plot o# +$ 'ersus )$B with )&B as a parameter.
E*planation of characteristics:
+n common*base con#iguration. the emitter*base junction acts liQe a #orward biased junction. 5here#ore.
the input characteristics are nothing but the 'olt*ampere characteristics o# this junction diode. 8s in a
semiconductor diode. these characteristics also ha'e a cutin 'oltage. 8n increase in the magnitude o# )&B
causes the magnitude o# +$ to increase with )$B held constant. 5his increase is attributed to a phenomenon
called base*width*modulation or $arly $##ect. 5here#ore. the cur'es shi#t le#twards with increasing )&B.
+n. the output characteristics. we can identi#y three regions. 5hey are 8cti'e Region. Saturation Region
and &uto## Region.
+n the acti'e region. the collector junction is re'erse biased and the emitter junction is #orward biased. +n
the saturation region. both emitter and collector junctions are #orward biased. 8nd in the cuto## region.
both emitter and collector junctions are re'erse biased.
5he characteristics are shown in the eDpected graphs.

)!OCED2!E:
%nput Characteristics> *
!. <aQe the connections as per the circuit diagram.
2. &hoose a 'alue #or )&B. say. ).
3. By maintaining )&B at the chosen 'alue. 'ary the supply 'oltage )$$ in small con'enient
steps. $ach time. note the 'alue o# )$B and the corresponding 'alue o# +$.
4.5abulate all readings.
2. &hoose another 'alue o# )&B and repeat the abo'e procedure.
6. 3lot +$ 'ersus )$B.
Output Characteristics> *
!. &onnect the circuit as per the circuit diagram.
2. &hoose a 'alue #or +$. say. ! m8. )ary the power supply )$$ till the ammeter reads this 'alue o# +$.
3. =ow. 'ary the power*supply )&& in small steps. $ach time. note down the 'alue o# )&B and the
corresponding 'alue o# +&.
4. 5abulate all obser'ations.
2. &hoose another 'alue #or +$ and repeat the abo'e steps.
6. 3lot +& 'ersus )&B.
4!
B$ 294 +* sem $" (ab. $&$ "ept.. <)SR$&
OB"E!,#&%ON">
+=3;5 &N8R8&5$R+S5+&S>
)&B E 2) )&B E 4)
)$BA)@ +$Am8@ )$BA)@ +$Am8@
42
B$ 294 +* sem $" (ab. $&$ "ept.. <)SR$&
C;53;5 &N8R8&5$R+S5+&S>
E()EC&ED .!#)4":
C;5 3;5
&N8R8&5$R+S5+&S

+& Am8@
+$ E
6m8
+$ E 4
m8
+$ E
2m8

)&B A)olts@
+=3;5
&N8R8&5$R+S5+&S
)&B E 4)
43
+$ E 2m8 +$ E 4m8
)&BA)@ +&Am8@ )&BA)@ +&Am8@
B$ 294 +* sem $" (ab. $&$ "ept.. <)SR$&
+$ Am8@
)&B E 2 )&B E6)
)$B A)olts@
!E"2L&:
,%,# ,OCE:
!@ Ghat do you understand by the term Bipolar 4unction 5ransistorP
2@ Ghat are the 'arious types o# 5ransistors a'ailable. 8re there any pre#erred types i# so whyP
3@ Ghat do you understand by input and output characteristicsP
4@ "istinguish between acti'e. saturation. cuto## regions and internal operations o# a B45P
2@ "iscuss the 'arious doping le'els in the emitter. base and collector regionsP
6@ $Dplain the physical structure o# a B45P
6@ "iscuss the current components in a B45 in &B con#igurationP
7@ $Dplain why the base width is Qept eDtremely smallP
9@ 8 3=3 5ransistor operating in the acti'e region. eDtremely small no. o# holes injected into the base
recombine with electrons in the narrow base region but the hole density at 4c becomes /ero. $Dplain
howP
!@ $Dplain $arly $##ectP
!!@ Ghy does the emitter current increase with increase in re'erse bias at
the collector junctionP
!2@ Ghat is meant by collector re'erse saturation currentP
44
B$ 294 +* sem $" (ab. $&$ "ept.. <)SR$&
!3@ Grite the collector current eDpression #or B45 in &B con#iguration in
!. &uto## region 2. 8cti'e region 3.saturationP
!4@ "iscuss the shapes o# &B static input and out put characteristicsP
!2@ $Dplain why static o9p characteristics o# a &B 5ransistor ha'e slight
upward slopeP
!6@ Ghat is bottoming e##ectP
!6@ Ghat are the 'alues o# )B$ cuto## )B$ sat. )B$ acti'e. )&B o##.
)&B acti'e .)&B satP
!7@ $Dplain the per#ormance o# the transistor as an electronic switchP
!9@ +s the B45 5ransistor a current controlled de'ice or a 'oltage*
controlled de'iceP
2@ 8 B45 in &B con#iguration is a good *************************8mpli#ier because ***********************
42
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
46
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
46
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
E()E!%MEN& NO: B
COMMON EM%&&E! CON'%.2!#&%ON
#%M: 5o obtain the input % output characteristics o# B45 in common emitter con#iguration.
#))#!#&2":

S.=o. =ame Range9Speci#ication Bty
! =3= B45 B&!6 !
2 Resistor !.7 QT !
3 Resistor 76 QT !
4 )oltmeter *! ) !
2 <icroammeter *2 \8 !
6 <illiammeter *! m8 !
6 "ual &hannel
Regulated
3ower Supply
*3) !
47
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
C%!C2%& D%#.!#M:

)
&$

!.7K

&4EO!$:
5here are two sets o# characteristics that can be drawn #or a B45 in common emitter con#iguration. 5hey
are the input and the output characteristics. 5he input characteristics are obtained #rom the
#ollowing relation.
)B$ E#A)&$.+B@
Ghere )B$ is the base to emitter 'oltage. )&$ is collector to emitter 'oltage and +B stands #or abase
current.
5he output characteristics are obtained #rom the #ollowing relation>
+& E#A)&$.+B@ where +& is the collector current
%nput characteristics>
1or )&$ E ) the collector is e##ecti'ely shorted to the emitter. 5he resulting structure is nothing
but a diode Ap*n junction@. 5he characteristic cur'e obtained A)B$ )ersus +B@ i# essentially that o# a
junction diode.
+n the case o# input characteristics #or )&$ E ). +# )B$ E . the base current +BEm8 since both the
emitter and collector junctions are shorted.
1or any non*/ero 'alue o# a )&$ the base current #or )B$ E) is not /ero. +ts 'alue is 'ery small to
be obser'ed. +n general #or constant )B$ as )&$ increases the base width increases as per the $arly e##ect
Abase width modulation@ and this results in decreased recombination base current.
Output characteristics: 5he output characteristics can be di'ided into three parts . 5hey are>
Ai@ 8cti'e region Aii@ cut o## region Aiii@ saturation region.

49
!.7K
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
#ctive region: +n the acti'e region the emitter base junction A4$@ is #orward biased and collector base
junctionA4&@ is re'erse biased. +n the acti'e region collector current responds more readily to any input
signal. 5he operation o# the common emitter stage is used as an ampli#ying stage only. "ue to J$arly
$##ectK. the current gain increases with increase in )&$. 5he large slope o# the characteristic cur'e o# the
&$ transistor signi#ies that the incremental output impedance o# the B45 in &$ is lower that that in &B
con#iguration
Cutoff region: 5he transistor is said to be in cut o## when emitter current is /ero. 1or achie'ing this
condition. it is not enough to ha'e the base current +B E . because e'en with +B E. the collector current
+&EA!F]@+&. So. in order to achie'e cuto## condition. it is necessary to slightly re'erse*bias the emitter
base junction. which can be achie'ed by applying .! 'olt #or ,ermanium and ) #or silicon. 5his will
ensure the reMuired conditions #or cuto## i.e.
+$ E . +& E +&. +B E *+& E *+&
"aturation region: +n saturation region both the junctions 4$ and 4& are #orward biased by at least the cut
in 'oltage. 5he 'oltage )B$ A)B&@ across #orward biased emitter Acollector@ junction has magnitude o#
just a #ew tenths o# a 'olt. Nence the saturation region lies eDtremely close to -ero 'oltage aDis. 5his is
the region where all cur'es merge and decline rapidly towards the origin. +t may be obser'ed that the
saturation region begins at the JKneeK o# the characteristic cur'es.
)!OCED2!E:
%nput characteristics:-
!. <aQe the connections as per the circuit diagram.
2. $nsure the 'oltage Qnobs o# the power supplies are in the minimum position be#ore switching them
on.
3. &hoose a 'alue #or )&$. 1iD the power supply Qnow )&& to get the desired 'alue o# )&$.
4. )ary the 'oltage )BB in small steps. $ach time. note down the 'alue o# )B$ and the corresponding
'alue o# +B.
2. &hoose another 'alue #or )&$ and repeat the abo'e steps.
6. 5abulate all readings and plot +B 'ersus )B$.
Output Characteristics:-
!. ;se the same circuit as abo'e #or obtaining the output characteristics.
2. =ow maintain +B at some constant 'alue. )ary )&& and obser'e the changes in +& due to the
changes in )&$.
3. +nitially Qeep +BE \8. )ary )&& #rom /ero 'olts and note down the readings o# +& % )&$.
4. Repeat the abo'e procedure #or a #ew other 'alues o# +B such as ! \8. 5abulate all the readings
as per the tabular #orm.
&#B2L#! COL2MN":
%nput Characteristics>
2
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
,CE61,
,CE6B,
+BA\8@ )B$A)@ +BA\8@ )B$A)@

Output characteristics:
%B6+< F#
%B638 F#
)&$A)@ +&Am8@ )&$A)@ +&Am8@
2!
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
+=3;5 &N8R8&5$R+S5+&S
)&B E 4)
+$ Am8@
)&B E 2 )&B E6)
22
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
)$B A)olts@
C;3;5 &N8R8&5$R+S5+&S

!E"2L&:

,%,# ,OCE:
!@ Ghat is a transistorP Ghat is the di##erence between an =3= and a 3=3 5ransistorP
2@ "raw the symbolic representations o# =3= and 3=3 transistors.
3@ $Dplain physically how ampli#ication is achie'ed in a transistor. +s it 'oltage ampli#ication or
current ampli#icationP ,i'e an eDample o# a de'ice capable o# gi'ing any other type
A'oltage9current@ o# ampli#ication. Ghat is the origin o# the name HtransistorIP
23
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
4@ ,i'e the physical arrangements o# a 3=3 junction transistor and discuss how it pro'ides current
ampli#ication.
2@ SQetch the characteristics o# a B45 in &ommon*$mitter &on#iguration. Ghy is it called &ommon*
$mitter con#igurationP
6@ 1or ampli#ication. why is the &$ mode o# B45 pre#erred o'er other modes o# operationP
6@ +s &$ &on#iguration o# B45 a current ampli#ier or a 'oltage ampli#ierP "oes an impedance
trans#ormation also taQe placeP
7@ Ghy do we obser'e a phase*shi#t o# the output with respect to the input in a common emitter
stageP
9@ Ghat is a Jload*lineKP Ghat is its signi#icanceP "i##erentiate between a.c. load line and d.c. load
line.
!@ $Dplain the output characteristics o# B45 in &ommon $mitter &on#iguration with respect to dc
load line.
!!@ Ghat are h*parametersP Ghat are they used #orP Ghy are these h*parameters pre#erred o'er other
parametersP
!2@ Grite the typical 'alues o# h*parameters at +$ E !.3m8.
!3@ ,raphically obtain the h*parameters #or B&*!6 B45 at +& E 2m8 and )&$ E 2).
!4@ ,i'e the 'alues o# )&$ Sat. )&$ &uto## and )&$ 8cti'e #or the transistor B&!6.
!2@ Ghat are the other applications o# the common emitter con#iguration Aother than as an ampli#ier@P
24
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
E()E!%MEN& NO: =
G'E& C4#!#C&E!%"&%C"
#%M: 5o obtain the static characteristics Adrain and trans#er characteristics@ o# a 4unction 1ield $##ect
5ransistor in the &ommon Source &on#iguration.
#))#!#&2":
! n*channel 41$5 B1G! !
2 "& 8mmeter *! m8 !
3 "& )oltmeter *2 ) 2
4 Resistor 4.6 Q Nal# Gatt !
2 "ual &hannel Regulated 3ower
Supply
*3 ) !
)#!& #: D!#%N C4#!#C&E!%"&%C" O! O2&)2& C4#!#C&E!%"&%C":
C%!C2%& D%#.!#M:
&4EO!$:
5he common source drain characteristics #or a typical n*channel 1$5 are obtained by plotting the
drain current against )"S Athe drain to source 'oltage@ with ),S Athe gate to source 'oltage@ as a parameter.
5he gate #orms a 3= junction with the channel. Ghen a re'erse bias is applied to this junction. a space*
charge region is #ormed. Since the gate is relati'ely hea'ily doped. the space*charge region eDtends more
into the channel than into the gate. Nence the channel width is reduced as the re'erse bias 'oltage ),S
increases. 5here#ore. the 'alue o# the drain current decreases.
1irstly let us consider the condition #or ),S E ). =ow with ),SE' there is no re'erse bias at the gate and
hence the channel between the gate junction is completely open. ;nder this condition when )"SE) there
is no electric #ield applied across the drain and source. 5here#ore majority carriers Ai.e. electrons in the
case o# an n*channel 1$5@ do not conduct and the drain current +"E with the application o# a small
'oltage )"S at drain. 5he n*type semiconductor beha'es liQe a single resistor #ollowing ChmIs law and
de#inite drain current #lows. 5his drain current +" 'aries linearly with )"S. 5here#ore. ohmic 'oltage drop
taQes place across the bar. 5his 'oltage drop Awhich is non*uni#ormly distributed within the length o# the
bar@ re'erse biases the gate junction resulting in narrowing o# the channel. 5he depletion region is not
uni#ormly distributed. +t is more towards the drain end rather than at the source end. 8s the magnitude o#
22
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
the drain 'oltage )"S is increased progressi'ely. a critical 'alue o# )"S is reached at which the channel
gets almost constricted i.e.. more or less blocQed. Ghen )"S is #urther increased the drain current +"
becomes constant. 5he 'alue o# )"S #or which the drain current reaches almost a constant 'alue is called
the pinch o## 'oltage )p. 5he region o# the characteristic cur'e #or which )"SL)p is called the constant
current region or the pinch*o## region. Ghen a regulati'e 'oltage is applied at the gate. the re'erse bias at
the p*n junction is greater and pinch o## occurs #or smaller 'alues o# )"S. 8lso the maDimum drain
current +ds is lower when compared to the 'alue o# the saturation drain current +dss at ),SE).
)!OCED2!E:
"R8+= &N8R8&5$R+S5+&S>
!@ &onnect the circuit as per the circuit diagram.
2@ +nitially. choose ),SE. <aQe ),,E so that ),S becomes .
3@ )ary the drain supply )"" starting #rom ). =ote the 'oltage )"S and the corresponding drain
current +d.
4@ 5abulate all readings.
2@ Repeat steps 3 and 4 by taQing di##erent 'ales o# ),S Asay ),SE*!). *3) etc@.
6@ 3lot +d 'ersus )"S in each case.
5R8=S1$R &N8R8&5$R+S5+&S
!@ &onnect the circuit as per the circuit diagram.
2@ &hoose a 'alue #or )"S. say. 4).
3@ )ary the drain power supply )"" to get )" as the chosen 'oltage. 5his is Qept unaltered through the
rest o# the steps.
4@ =ow. 'ary ),S #rom ) onwards in small con'enient steps. =ote the corresponding 'alue o# +".
2@ Cbser'e that +" is maDimum when ),SE and +" becomes /ero #or some 'alue o# ),S.
6@ 5abulate all readings.
6@ &hose another 'alue o# )"S and repeat the abo'e procedure.
7@ 3lot +" 'ersus ),S in each case.
E*pected .raph:
D!#%N C4#!#C&E!%"&%C":
26
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
&#B2L#! COL2MN":
"R8+= &N8R8&5$R+S5+&S>
),SE *.2 )olt ),SE *! )olt
)"S A)@ +" Am8@ )"S A)@ +" Am8@
26
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
5R8=S1$R &N8R8&5$R+S5+&S>
)"S E 2 )olts )"S E 6 )olts
),S A)@ +" Am8@ ),S A)@ +" Am8@
!E"2L&:
27
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
,%,# ,OCE:
!@ Ghat are the di##erences between a B45 and a 41$5P
2@ Ghat is meant by a unipolar de'iceP Ghy is a 41$5 Qnown as a ;nipolar "e'iceP
3@ Ghat are the typical applications o# a 41$5P
4@ Ghat are the parameters o# a 1$5P Ghat are the relations between themP
2@ Ghat are n*channel and p*channel 41$5sP Now are they di##erent #rom one anotherP
6@ ,i'e the names9numbers o# a #ew commercially a'ailable 41$5 de'ices.
6@ Ghat are the 'arious possible con#igurations in which a 41$5 can be connectedP Ghat are the
typical applications o# eachP
7@ Ghat is a <CS1$5P Ghat are the possible types in a <CS1$5P
29
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
E()E!%MEN& NO: >

BG& E B%#"%N.
#%M: 5o design a sel#*bias circuit #or a Bipolar 4unction 5ransistor and to 'eri#y its worQing.
#))#!#&2":
! =pn transistor B&!6 !
2 Resistors 4.6 Q. 3.2Q. !K % !Q ! each
3 ".&. 8mmeter or multimeter to 2m8 !
4 ".&. )oltmeter or multimeter to 2) !
2 "ual &hannel Regulated power
supply
*3) !
&4EO!$:
Biasing is used to obtain a stable operating point against de'ice 'ariation. 5he operating point
depends upon transistor parameters and they in turn depend on temperature.5he transistor parameters liQe
change #rom one transistor to another. although they are o# similar type. i.e. the 'alue o# the parameters
might be di##erent #or di##erent de'ices belonging to the same type0
$'en with the state o# the art in Semiconductor "e'ice 5echnology. transistors o# a particular type still
come with a wide spread 'ariation in the 'alues o# some parameters.5hermal instability causes great
changes in re'erse current +&. +t doubles #or e'ery !& rise in temperature. +t in turn causes the
collector junction temperature to rise. which in turn increases the 'alue o# +& #urther. 8s a result. the
'alue o# +& increases and there occurs a shi#t in the B*point o# the transistor.
5he $mitter biased or the Sel#*biased circuit worQs in the #ollowing manner. +# there is an increase
in the collector current +&. then. the 'oltage drop across the resistor Re increases. Because o# this increase.
the base current actually decreases. Because o# this. the e##ect o# the increase in the collector current is
decreased. Nowe'er. there is bound to be loss o# 8& signal gain due to the same reason.5o a'oid the loss
o# 8& signal gain because o# this. a capacitor is used to bypass the emitter resistor Re.
6
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
C%!C2%& D%#.!#M:
)!OCED2!E:
!. "esign the reMuired circuit as per the reMuirements.
2. 8#ter connecting the circuit as per the design. measure )&$. )B$. )e. +&. +B and )& using
multimeters. &alculate the stability #actor and the operation point. )eri#y theoretically.
OB"E!,#&%ON" #ND C#LC2L#&%ON":
)&& E
)& E
)$ E
R& E
)B E
)&$ E
+& E
" 6
E
)&& E +& R& F )&$ which implies
+& E A)&& * )&$@9R&
RB9R$ E A!F@AS*!@9 !F : S
) E +BRB F )$ F )B$

Ghere ) is the 'oltage o# the 5he'eninIs eMui'alent 'oltage source.
) E A+&9@RB F )$ F )B$
6!
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
5hen.
R! E RB A)&& 9)@
R2 E R!) 9A)&&*)@
1rom the circuit. the current through R! is gi'en by>
+!E)&&9AR! F R2@
5here#ore. the )oltage )2 de'eloped across R2 is gi'en by )oltage "i'ision^
)2E)&& R29AR! F R2@
By applying K)( to the base circuit
)2 E )B$ F )$
E )B$ F +$ R$.
EL +$ E A)2 : )B$@ 9 R$.
=ow. applying K)( to the collector side circuit. we get
)&& E +&R& F )&$ F +$ R$

E +& AR& F R$@ F )&$ Asince +$ +&@
EL )&$ E )&& * +& AR& F R$@
!E"2L&:
62
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
,%,# ,OCE:
!@ Ghich transistor parameters 'ary with temperatureP
2@ Ghat is meant by Hload lineIP
3@ Ghat is meant by the Joperating pointK o# a transistorP
4@ Ghy is a capacitor used to shunt the emitter resistor o# sel#*biased transistorP
2@ Ghat is meant by thermal runawayP
6@ Ghat are the other biasing arrangements possible Aother than sel#*bias@P
6@ Ghy is the sel#*bias circuit pre#erred o'er other possible biasing circuitsP
7@ "e#ine Stability #actor and eDplain its signi#icance.
9@ Ghat is the stability #actor o# a &ommon*base transistor circuitP
63
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
E()E!%MEN& NO: ?
'E& B%#"%N.
#%M: 5o design a source sel#*bias circuit and 'eri#y its operation.
#))#!#&2":
S.=o. +tem Speci#ication 9 range =o.
! n*41$5 B1G! !
2 Resistors 4.6Q. 22Q. 46 !
3 ".&. ammeter A*! ma@ !
4 ".&. 'oltmeter A*2 )@ !
2 &onnecting wires

&4EO!$:
8s in all ampli#iers consideration must be gi'en to biasing the 1$5 to place its operating point within the
linear portion o# its acti'e region. 5he #actors go'erning selection o# operating point #or a 1$5 are
similar to that #or B45.;nliQe a B45 a re'erse bias 'oltage is to be applied across the gate to source
junction in a 1$5. 1or a speci#ied drain current. the corresponding )gs can be obtained. Since the gate
current is negligible. the reMuired source resistance can be determined as ratio o# )gs to +d.
8 capacitor &s ha'ing 'ery large 'alue is used to bypass the resistor RS so as to a'oid the degenerati'e
#eedbacQ #or a.c. signals. 5he problem o# biasing #urther is simpli#ied by the #act that there eDists a 'alue
)gs #or which the drain current does not change with temperature. Nence it is possible to bias a 1$5 #or
/ero drain current dri#t.
)!OCED2!E:
!@ <aQe the connections as per the circuit diagram.
2@ 8pply a 'oltage o# say !2) to the circuit.
3@ <easure drain current. )ds. )gs.
4@ "etermine the operating point.
2@ "esign the 'alues o# biasing resistors.
6@ )eri#y the operation o# circuit.
64
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
C%!C2%& D%#.!#M:
!E"2L&:
,%,# ,OCE:
!@ Ghat is the ad'antage o# a 1$5 biasing circuit abo'e B45 biasingP
2@ Ghat is the need #or the capacitor &SP
3@ Ghy are the coupling capacitors reMuiredP
4@ Ghat is meant by thermal stabili/ationP
2@ ,i'e eDamples o# stabili/ation circuits
62
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
E()E!%MEN& NO: +8
COMMON EM%&&E! BG& #M)L%'%E!
#%M: 5o determine the #reMuency response o# a &ommon*$mitter B45 ampli#ier.
#))#!#&2":
! =3= B45 B&!6 !
2 Resistors 22K.!2K.4.6K.! CN< ! each
3 &apacitors .!\#..!\#
4 Regulated 3ower
Supply
*3) !
2 &athode Ray
Cscilloscope
"ual 5race A*2 <N/@ !
6 81 Signal
,enerator
*! QN/ !
6 &onnecting
wires9probes
&4EO!$:
+n a single stage &$ ampli#ier. the weaQ time*'arying signal is applied to the base o# the transistor. "ue to
this. a small base current Awhich itsel# is time 'arying@ starts #lowing. "ue to the action o# the transistor. a
much larger current #lows through the collector load. 5his current is actually about ] times the base
current. 5here#ore. a weaQ signal applied at the base appears in an ampli#ied #orm at the output o# the
transistor circuit. +t is in this #ashion that the &ommon $mitter ampli#ier acts as an ampli#ier.
Nowe'er. #or the transistor to act as a good ampli#ier. there are certain reMuirements that must be met.
3articularly. we need to study the circuitry that is associated with a practical ampli#ier. 5he #ollowing are
the 'arious circuit elements that are reMuired.
i@ 5he biasing circuit> 5he resistors R!. R2 and Re #orm the biasing circuit #or the transistor. 5his
arrangement is necessary to establish a proper operating point. +# the transistor is not properly biased. it
may go into saturation #or the positi'e hal# cycle or it may go into cuto## in the negati'e hal# cycle.
ii@ +nput &apacitor &in> 8ll practical signal sources ha'e some output resistance. +# necessary steps
are not taQen. this resistance comes in parallel with R2 o# the biasing circuit. disturbing the operating
point. +# a capacitor &in is used in series with the source as shown. it allows only the ac component to pass
through but isolates the signal source #rom R2. ,enerally. an electrolytic capacitor or appropriate capacity
is used as &in.
iii@ $mitter Bypass &apacitor &e> 5he presence o# the emitter resistor Re in the biasing circuit has the
e##ect o# reducing the gain o# the ampli#ier. 5his happens because the current #lowing through the Re
causes the emitter 'oltage to rise. 5o impro'e the gain o# the ampli#ier. the resistor Re is bypassed by a
capacitor &e. 5his capacitor pro'ides a low*impedance path #or the ac component. thereby impro'ing
gain.
66
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
i'@ &oupling &apacitor &c> 5he coupling capacitor is connected between the output o# one stage
to the input o# the second. +n its absence. the Rc o# the #irst stage comes in parallel to R! o# the second
stage. disturbing the operating point o# the second stage. 8lso. the capacitor ser'es to isolate the dc
between the two stages.
.ain: 5he ratio o# the output electrical Muantity to the input o# the ampli#ier is called its gain. +# the
output and the input Muantities are 'oltages. the gain is called the )oltage ,ain o# the ampli#ier.
'reHuenc/ !esponse: 5he 'oltage gain o# an ampli#ier 'aries with signal #reMuency. 5his happens
because the reactance o# the capacitors in the circuit changes with signal #reMuency. 8 plot between the
'oltage gain and the signal #reMuency o# an ampli#ier is called the #reMuency response o# the ampli#ier.
BandDidth: 5he range o# #reMuency o'er which the gain is eMual to or greater than about 6.6O A!9Y2
times@ o# the maDimum gain. is Qnown as the bandwidth o# the ampli#ier.
Decibel .ain: 5he 'oltage gain o# an ampli#ier in decibel notation is gi'en by 2 log! 8' where 8' is the
'oltage gain.
3db BandDidth: Ghen the 'oltage gain attains a 'alue o# !9Y2 times the maDimum gain. the "ecibel
'oltage gain attains a 'alue that is 3db less than the maDimum decibel gain. 5here#ore. the bandwidth o#
an ampli#ier can also be de#ined as the range o# #reMuency o'er which the decibel gain is not less than the
maDimum decibel gain minus 3dB.
C%!C2%& D%#.!#M:

)!OCED2!E:
!@ &onnect the circuit as per the circuit diagram. Keep the signal generator in the sinusoidal mode.
2@ &hoose a 'alue #or the amplitude o# the input signal. say. 2 m) 3eaQ*to*3eaQ.
3@ 8pply a signal o# #reMuency 2 N/ to the circuit. Cbser'e the output wa'e#orm on the &RC. =ote
the amplitude o# the output sinusoid.
66
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
4@ +ncrement the #reMuency o# the applied signal in small con'enient steps. $ach time. adjust the
input amplitude to the chosen 'alue A2m)@. =ote the output amplitude. Repeat this step till a
#reMuency o# 2 QN/.
2@ 5abulate all readings. 8t each input #reMuency. calculate the gain as 8' E )o 9 )i. 8lso #ind the
'alue o# the gain in decibel as 2 log 8'.
6@ 3lot a graph between the input #reMuency A#@ and the gainAin decibel@ on a semi*log graph paper.
6@ Cn the graph. identi#y the 3dB points. 5he #reMuency range between the 3dB points is nothing but
the bandwidth o# the gi'en ampli#ier.
&#B2L#! COL2MN:
+nput )oltage A)in E 2m)@
S.=o. +nput
1reMuency
Cutput )oltage
A)out@
)oltage ,ain
8'E )out9)in@
)oltage ,ain in
db E2logA8'@
67
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
E()EC&ED .!#)4:
!E"2L&:
,%,# ,OCE:
!@ Ghat is the signi#icance o# the emitter*bypass capacitor and the coupling capacitor in the &$
ampli#ier circuitP
2@ $Dplain why re'ersal o# phase occurs in a B45 &$ 8mpli#ier.
3@ Ghat is the signi#icance o# the operating point in the worQing o# an ampli#ierP
4@ Ghat happens i# an ampli#ier is biased at cuto## or at saturationP
2@ Ghat is a load lineP Now is the ac load line di##erent #rom the dc load lineP
6@ Ghat is the signi#icance o# the bandwidth o# an ampli#ierP
6@ Ghat is meant by ,ain*Bandwidth 3roductP Ghat is its signi#icanceP

69
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
E()E!%MEN& NO: ++
COMMON "O2!CE 'E& #M)L%'%E!
+0 #%M: 5o study and obtain the #reMuency response o# a common*source 41$5 8mpli#ier.
10 #))#!#&2":
6
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
! n*channel 41$5 B1G! !
2 Resistors 9K. 26K. 4.6K. 2.2K ! each
3 &apacitors .! \1 3
4 Regulated 3ower
Supply
*3) !
2 &athode Ray
Cscilloscope
6 81 Signal ,enerator *! QN/ !
6 &onnecting
wires9probes
30 &4EO!$:
5he weaQ signal is applied between the gate and the source o# the 1$5. 5he output is obtained between the
drain and the source terminals. 1or proper operation. the gate must be negati'e with respect to the source. ie.. the
input circuit should always be re'erse biased. 5his is achie'ed by the biasing arrangement.
8 small change in the re'erse bias on the gate produces a large change in drain current. 5his #act maQes
1$5capable o# raising the strength o# a weaQ signal. "uring the positi'e hal# o# the signal. the re'erse bias on the
gate decreases. 5his increases the channel width and hence the drain current. "uring the negati'e hal#*cycle o# the
signal. the re'erse 'oltage on the gate increases. &onseMuently. the drain current decreases. 5he result is the small
change in 'oltage at the gate produces a large change in drain current. 5hese large 'ariations in drain current
produce large output across the load R(. 5here#ore. a 1$5 acts as an ampli#ier.
,ain> 5he ratio o# the output electrical Muantity to the input o# the ampli#ier is called its gain. +# the output and
the input Muantities are 'oltages. the gain is called the )oltage ,ain o# the ampli#ier.
1reMuency Response> 5he 'oltage gain o# an ampli#ier 'aries with signal #reMuency. 5his happens because the
reactance o# the capacitors in the circuit changes with signal #reMuency. 8 plot between the 'oltage gain and the
signal #reMuency o# an ampli#ier is called the #reMuency response o# the ampli#ier.
Bandwidth> 5he range o# #reMuency o'er which the gain is eMual to or greater than about 6.6O A!9Y2 times@ o#
the maDimum gain. is Qnown as the bandwidth o# the ampli#ier.
"ecibel ,ain> 5he 'oltage gain o# an ampli#ier in decibel notation is gi'en by 2 log! 8' where 8' is the 'oltage
gain.
3db Bandwidth> Ghen the 'oltage gain attains a 'alue o# !9Y2 times the maDimum gain. the "ecibel 'oltage gain
attains a 'alue that is 3db less than the maDimum decibel gain. 5here#ore. the bandwidth o# an ampli#ier can also
be de#ined as the range o# #reMuency o'er which the decibel gain is not less than the maDimum decibel gain minus
3dB.
6!
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
50 C%!C2%& D%#.!#M:
<0 )!OCED2!E:
3@ 8pply a signal o# #reMuency 2 N/ to the circuit. Cbser'e the output wa'e#orm on the &RC. =ote the
amplitude o# the output sinusoid.
4@ +ncrement the #reMuency o# the applied signal in small con'enient steps. $ach time. adjust the input
amplitude to the chosen 'alue A2m)@. =ote the output amplitude. Repeat this step till a #reMuency o#
!<N/.
2@ 5abulate all readings. 8t each input #reMuency. calculate the gain as 8' E )o 9 )i. 8lso #ind the 'alue o# the
gain in decibel as 2 log 8'.
6@ Cn the graph. identi#y the 3dB points. 5he #reMuency range between the 3dB points is nothing but the
bandwidth o# the gi'en ampli#ier.
B0 &#B2L#! COL2MN:
+nput 'oltageE 2m'
1reMuency Cutput )oltage
A)out@
)oltage ,ain
A)out9)in@
)oltage ,ain
AdB@
62
9 Q
26 Q
4.6 Q
2.2 Q
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
E()EC&ED .!#)4:
63
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&

=0 !E"2L&:
>0 ,%,# ,OCE:
+; Compare the operation and freHuenc/ response of a Common "ource 'E& amplifier Dith those of a
Common Emitter BG& amplifier0
2@ Ghat are the ad'antages o# using a 1$5 instead o# a B45P
3@ Ghat is the typical range o# bandwidth #or the 1$5 &ommon Source ampli#ierP
4@ Ghy is a source bypass capacitor used in a 1$5 &ommon Source ampli#ierP
2@ &an we interchange the source and drain terminals in a 1$5 circuitP &an we do the same with the emitter
and collector terminals o# a B45 circuitP
6@ Ghat is a <CS1$5P Now is it di##erent #rom a 41$5P Ghat are its typical applicationsP
E()E!%MEN& NO: +1
EM%&&E! 'OLLOCE!
!. #%M: 5o determine the #reMuency response. input impedance and output impedance o# a &ommon*
&ollector B45 ampli#ier A$mitter 1ollower@.
10 #))#!#&2":
64
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
! =3= B45 B&!6 !
2 Resistors 22K.!2K.4.6K.! CN< ! each
3 &apacitors .!\#..!\#
4 Regulated 3ower
Supply
*3) !
2 &athode Ray
Cscilloscope
6 81 Signal ,enerator *! QN/ !
6 &onnecting
wires9probes
30 &4EO!$:
5he common collector transistor 8mpli#ier is also called as $mitter 1ollower because its 'oltage gain is close to
unity and hence a change in base 'oltage appears as an eMual change across load at the emitter. 5he emitter #ollows
the input signal. 5he input resistance is 'ery high and the output resistance is 'ery low . Nence the most common
use o# the && circuit is as a bu##er stage which per#orms the #unction o# resistance trans#ormation o'er a wide range
o# #reMuencies. 5he $mitter 1ollower increases the power le'el o# the signal
i@ 5he biasing circuit>5he resistors R!. R2 #orm the biasing circuit #or the transistor. 5his arrangement is
necessary to establish a proper operating point. +# the transistor is not properly biased. it may go into saturation #or
the positi'e hal# cycle or it may go into cuto## in the negati'e hal# cycle.
ii@ +nput &apacitor &in> 8ll practical signal sources ha'e some output resistance. +# necessary steps are not
taQen. this resistance comes in parallel with R2 o# the biasing circuit. disturbing the operating point. +# a capacitor
&in is used in series with the source as shown. it allows only the ac component to pass through but isolates the
signal source #rom R2. ,enerally. an electrolytic capacitor or appropriate capacity is used as &in.
iii@ &oupling &apacitor &c> 5he coupling capacitor is connected between the output o# one stage to the input o#
the second. +n its absence. the Rc o# the #irst stage comes in parallel to R! o# the second stage. disturbing the
operating point o# the second stage. 8lso. the capacitor ser'es to isolate the dc between the two stages.
,ain> 5he ratio o# the output electrical Muantity to the input o# the ampli#ier is called its gain. +# the output and
the input Muantities are 'oltages. the gain is called the )oltage ,ain o# the ampli#ier.
1reMuency Response> 5he 'oltage gain o# an ampli#ier 'aries with signal #reMuency. 5his happens because the
reactance o# the capacitors in the circuit changes with signal #reMuency. 8 plot between the 'oltage gain and the
signal #reMuency o# an ampli#ier is called the #reMuency response o# the ampli#ier.
Bandwidth> 5he range o# #reMuency o'er which the gain is eMual to or greater than about 6.6O A!9Y2 times@ o#
the maDimum gain. is Qnown as the bandwidth o# the ampli#ier.
62
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
50 C%!C2%& D%#.!#M:

<0 )!OCED2!E:
3@ 8pply a signal o# #reMuency 2 N/ to the circuit. Cbser'e the output wa'e#orm on the &RC. =ote the
amplitude o# the output sinusoid.
4@ +ncrement the #reMuency o# the applied signal in small con'enient steps. $ach time. adjust the input amplitude
to the chosen 'alue A2m)@. =ote the output amplitude. Repeat this step till a #reMuency o# 2 QN/.
2@ =otice that there is no phase di##erence between the input and the output signal o# the 8mpli#ier.
6@ 5abulate all readings. 8t each input #reMuency. calculate the gain as 8' E )o 9 )i. 8lso #ind the 'alue o# the
gain in decibel as 2 log 8
'
.
7@ Cn the graph. identi#y the 3dB points. 5he #reMuency range between the 3dB points is nothing but the
bandwidth o# the gi'en ampli#ier.
9@ &alculation o# +nput impedance> !K resistor is present between )s and )i.
5he current #lowing through this resistor is the current #lowing through the
networQ. +i E A)s*)i@ 9 !K R input resistance Ri E )i9+i.
!@ 8mpli#ier. &alculation o# Cutput impedance> 8pply ! KN/. 2m) signal at the input node. &onnect a "RB
with all switches at min position. 8cross the output terminals and increase the resistance such that )o E )i92.
5he 'alue o# resistance in the "RB is eMual to the output resistance o# the ampli#ier.
B0 &#B2L#! COL2MN:
+nput )oltage A)in E 2m)@
66
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
S.=o. +nput 1reMuency Cutput )oltage
A)out@
)oltage ,ain
8'E )out9)in@
)oltage ,ain in
db E2logA8'@
=0 E()EC&ED .!#)4:
>0 !E"2L&:
66
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
,%,# ,OCE:
!@ Ghat is the signi#icance o# the coupling capacitor in the && ampli#ier circuitP
2@ $Dplain why re'ersal o# phase does not occur in a B45 && 8mpli#ier.
3@ Ghat is the signi#icance o# the operating point in the worQing o# an ampli#ierP
4@ Ghat happens i# an ampli#ier is biased at cuto## or at saturationP
2@ Ghat is a load lineP Now is the ac load line di##erent #rom the dc load lineP
6@ Ghat is the signi#icance o# the bandwidth o# an ampli#ierP
6@ Ghat is meant by ,ain*Bandwidth 3roductP Ghat is its signi#icanceP
7@ Ghy is the &ommon &ollector 8mpli#ier called as $mitter 1ollowerP
E()E!%MEN& NO: +3
C4#!#C&E!%"&%C" O' 2G& #ND "C!
#%M: 5o obtain the a@ 'olt*ampere characteristics o# ;45
b@ 'olt*ampere characteristics o# S&R
#))#!#&2":
!. ;45 eDperimental trainer Qit with user manual and 3atch chords.
2. * !2) "& 'oltmeter.
3. * !m8 "& ammeter.
4. &athode Ray Cscilloscope
9a; ,olt ampere characteristics of 2G&
&4EO!$:
5he ;ni 4unction 5ransistor is a three terminal semiconductor de'ice with negati'e resistance
characteristics. +t consists o# a bar o# n*type silicon with a small p*type insert Aemitter@ near to one o# the
ends. 5he two ohmic contacts at the ends o# the n*type bar constitute two terminals Base*! and Base*2.
5he recti#ying contact is called the $mitter. 5he de'ice shows negati'e resistance characteristics between
its $mitter and Base *! terminals.
67
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
8 #iDed interbase potential )BB is applied between Base*! and Base*2.
5he most important characteristic o# ;45 is that o# the input diode between $ and Base !.+# base*2 is open
circuited. then. +B2E.input )*+ char is same as that o# the normal p*n junction diode.
1or the #iDed 'alue o# )BB. a negati'e resistance char is obtained.
5he principle application o# ;45 is that o# a switch which allows rapid discharge o# a capacitor connected
between emitter and Base*!. this is the principle o# operation o# a RelaDation Cscillator using ;45.
C%!C2%& D%#.!#M":
)!OCED2!E:
!. &onnect the circuit diagram as shown in the 1igure.
2. <aQe sure that the potentiometer is in its minimum position Aanti clocQ wise direction@ ..
3. 8djust the potentiometer in clocQ wise direction and noted down the 'alues o# the 'oltmeter
and milli ammeter.
4. 5abulate these 'alues and draw graph between emitter 'oltage )$ and current +$.
&#B2L#! COL2MN:
)BBE 6) )BBE7)
$mitter
)oltage
A)@
$mitter
currentAm8@
$mitter
)oltage
A)@
$mitter
currentAm8@
69
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
E()EC&ED .!#)4:

9b; ,OL& #M)E!E C4#!#C&E!%"&%C" O' "C!
+0 #))#!#&2":
4. S&R eDperimental trainer Qit with user manual and 3atch chords.
7
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
2. * 22) "& 'oltmeter.
6. * !m8 "& ammeter.
6. "igital multimeter
10 &4EO!$:
5he Silicon &ontrolled Recti#ier AS&R@ is a semi conductor de'ice that is a member o# a #amily o# control de'ices
called the thyristors.
5he three terminals ha'e been named as 8nodeA8@. &athode AK@ and ,ate A,@.
Ghen ,ate is open>
Ghen no 'oltage is applied across ,ate. 42 is re'erse biased while 4! and 43 are #orward biased. =o current #lows
and the S&R is C##. +# the applied is gradually increased. a stage is reached when 42. breaQs down. =ow. it is in C=
state. 5he applied 'oltage at which S&R conducts hea'ily without ,ate 'oltage is called breaQ o'er 'oltage.
Ghen ,ate is positi'e w.r.t cathode>
5he S&R can be made to conduct hea'ily at smaller applied 'oltage by applying a small potential to the gate. 43 is
now 1.B. 42 is R.B. 8s soon as the ,ate current #lows. anode current increases. 5he increased anode current maQes
more electrons a'ailable at 42.5his process continues and in a small time. 42 breaQs down and S&R conducts
hea'ily. Cnce S&R starts conducting. the ,ate losses all control. $'en i# gate 'oltage is remo'ed. the anode current
does not decrease at all. 5he only way to stop conduction is to reduce the applied 'oltage to /ero.
30 C%!C2%& D%#.!#M":
Basic characteristics o# S&R>
,ate characteristics o# S&R
7!
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
50 )!OCED2!E:
Basic &haracteristics o# S&R>
a@ &onnect the circuit as shown. 8djust some "& 'alue and connect an 8mmeter and )oltmeter.
b@ =ow short the gate terminal to the anode terminal.
c@ 5hen S&R #ires and is indicated by the #lowing o# anode current. )oltage across anode to cathode #alls.
d@ =ow. open the gate terminal and obser'e whether the S&R is C= or C11.
e@ +# the S&R is in the C= state. then the anode current is enough to Qeep the S&R in the C= position. +# S&R
is C11. the increase the "& 'oltage to some more 'alue and repeat the abo'e procedure.
#@ 1ind out the approDimate 'alue o# the holding current.
,ate &haracteristics o# S&R>
a@ &onnect the circuit as shown in the #ig.
b@ &onnect the ammeter and the 'oltmeter in the circuit.
c@ 8djust the 8node to cathode 'oltage o# S&R to its #ull 'alue.
d@ <aQe sure that the ,ate 'oltage is in its min position. )oltmeter across S&R #ull 'oltage applied and
current meter shows no reading. 5his means that the S&R is in the C11 state.
e@ =ow. 'ary the gate current o# the S&R with 'oltage adjustment pot and current adjustment pot until the
S&R #ires. which is indicated by the #alling o# the 'oltage across S&R and current #lowing through the
S&R.
<0 &#B2L#! COL2MN:
+g E 6.2m8
)8K A)olts@ +8K Am8@
72
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
2)
4)
6)
B0 E()EC&ED .!#)4:
73
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&

=0 !E"2L& :
>0 ,%,# @2E"&%ON":
a@ $Dplain the worQing o# S&R.
b@ "e#ine holding current.
c@ Ghat are the speci#ications o# the S&R used in the trainerP
E()E!%MEN& NO: +5
74
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
)4O&O D%ODE C4#!#C&E!%"&%C"
#%M: a@ <easure the $mitter &urrent A+$@ o# the 3hoto "iode #or di##erent light
intensities.
b@ 5o demonstrate switching C=*C11 o# an eDternally operated 23) 8& de'ice A1or eDample a
table #an. hair drier etc@. when light intensity eDceeds beyond a particular intensity.

#))#!#&2":
3hoto diode trainer Qit. digital multimeter
&!#%NE! I%&

&4EO!$:

Ghen light is allowed to #all on a re'erse biased p*n junction diode additional hole*electron pairs are
created in both p : and n : regions. 5his produces a 'ery small change in majority carrier
concentration and a 'ery large change in minority carrier concentration. 5hese additional minority
carriers enhance the re'erse current since they #all down the barrier potential. +t is #ound that the
current through the diode 'aries almost linearly with the light #luD. 5he diodes designed to operate
on this principle are called photo diodes. Such diodes are used in light detection. intrusion alarms. in
light operated switches and in reading o# computer punched cards etc.

)!OCED2!E:
E*periment to measure Emitter Current J%EJ
!. 3lace the switch in +$ position
2. 3lace a "<< at terminals intended #or measurement o# &;RR$=5 in m8. <aQe sure that the
terminals are placed in proper socQets o# "<< and switched to "& &;RR$=5 position.
3. ;se light intensity control Qnob and switch C11 the lamp.
4. <easure emitter current +$ .
2. ;se light intensity control Qnob and measure emitter current #or three di##erent Qnob positions.
namely (CG. <+" and <8[ intensities.
6. 1or no light incidence. the photo diode will eDhibit low current Aa #ew _l8@. 1or high bright
condition the emitter current will be more Aa #ew tens o# _@.
72
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
<aQe the obser'ation as #ollows.
OB"E!,#&%ON
+ntensity position +$ in \8
=C light
(CG light
<+" light
1or <8[ light
=ow draw a graph between +ntensity 3osition )s $mitter &urrent +$
b@ 5o demonstrate switching C=*C11 o# an eDternally operated 23) 8& de'ice when
light intensity eDceeds beyond a particular intensity` 5his is a simple eDperiment. 5he aim o# this
eDperiment is to demonstrate that a photo diode can be used to detect the presence or absence o# light.
8s a result o# this a de'ice can be operated. 5here is a 2*pin socQet in the rear side o# this instrument.
?ou can plug a 23) 8& operated calling bell to this socQet. Ghen the light impinging on the 3hoto
diode eDceeds threshold point conduction taQes place. 5here#ore a relay will be switched C=. ?ellow
lamp will be C= i# the obstruction between the 4Gatt lamp and the transducer is remo'ed. +t will be
C11 when the obstruction is introduced. 3lace the switch in ato ampli#iera position .;se light
intensity control Qnob and switch C11 the lamp.
Rotate light intensity control Qnob until light intensity increase gradually. till the relay is switched C=.
Ghen there is no light #alling on the transducer. the ?ellow lamp is C11. +# the light #alls on the
transducer the ?ellow lamp will be C=.
!E"2L&:
#ppendi*
76
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&

)4O&O &!#N"%"&O! C4#!#C&E!%"&%C"
#%M: !. <easure the &ollector &urrent A+&@ o# the 3hoto5ransistor #or di##erent light intensities.
2. <easure output 'oltage o# the ampli#ier de'eloped by 3hoto5ransistor as a #unction o#
di##erent light intensities.
#))#!#&2">
3hoto transistor trainer Qit. digital multimeter
)!OCED2!E:
a@ E*periment to measure Collector Current J%CJ
!.3lace the switch in +& position
2. 3lace a "<< at terminals intended #or measurement o# &;RR$=5 in
m8. <aQe sure that the terminals are placed in proper socQets o# "<< and switched to "& &;RR$=5
position.
3. ;se light intensity control Qnob and switch C11 the lamp.
4. &onnect a "<< in "& current mode. Keep the range in ! m8. <easure collector current +&
2. ;se light intensity control Qnob and measure collector current #or three
di##erent Qnob positions. namely (CG. <$" and N+,N intensities.
=ote> 1or no light incidence. the photo transistor will eDhibit low current Aa #ew
\8@. 1or high bright condition the emitter current will be more Aa #ew hundreds o# _@.
76
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
OB"E!,#&%ON
+ntensity 3osition &ollector &urrent in \8
=o light condition
(CG (ight
<$" (ight
1or <aDimum (ight
=ow draw a ,raph between +ntensity 3osition )s &ollector &urrent.
b@ E*periment to measure Output ,oltage
!.3lace the switch in ampli#ier position
2.3lace a "<< at output terminals intended #or measurement o# 'oltage
3.;se light intensity control Qnob and switch C11 the lamp.
4.<easure the output 'oltage
2.;se light intensity control Qnob and measure output 'oltage #or three di##erent Qnob positions.
namely (CG. <$" and N+,N intensities.
6.1or no light incidence. the 3hoto5ransistor will eDhibit 'ery low 'oltage or almost /ero. 1or high
bright condition the output 'oltage will be maDimum. as per gain potentiometer settings. 5his will
not eDceed more than 2) "&.
<aQe the obser'ation as #ollows
(ight intensity Cutput 'oltage
=o light condition
(ow light
<ed light
<aD light condition
"raw a ,raph Cutput )oltage )s incidence light intensity on the transducer
!E"2L&:
77
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
#ppendi*
Measurement of h-)arameters
#%M : 5o determine the h:3arameters o# a bipolar junction transistor in the common emitter
con#iguration.
#))#!#&2" :
S. =o. +tem !ange K Number Bty.
! =3= 5ransistor B&!6B !
2 ".&. 3ower Supply
A"ual &hannel@
*3) !
3 Resistors Kohms 4
4 <ultimeters 3
2 3atch cords 9 probes
&4EO!$ :
(et )!.)2 be the input and the output 'oltage o# a two*port networQ respecti'ely. (et +! and +2 be
the input and the output current respecti'ely. 5hen. the #our h*parameters are de#ined as #ollows>
h!!E)!9+!. )2 being /ero.
h!2E)!9+2. +! being /ero.
h2!E+29+!. )2 being /ero.
h22E+29)2. +! being /ero.
5o a'oid the use o# double sub*scripts. the #ollowing notation is generally adopted.
h!!Eh+ AShort*&ircuit +nput +mpedance@
h!2Ehr ACpen*&ircuit Re'erse 5rans#er )oltage ,ain@
h2!Eh# AShort*&ircuit 1orward 5rans#er &urrent ,ain@
h22Eho ACpen*&ircuit Cutput +mpedance@
Ghile studying transistor circuits. it is commonplace to use a second subscript with this notation. 5he
second subscript generally denotes the type o# con#iguration ie. &ommon emitter. common base
etc.5here#ore hib. hrb. h#b. hob denote the #our h*parameters #or the common base con#iguration. Similarly.
hie. hre. h#e. hoe are the h*parameters #or the common emitter con#iguration.
5he eMui'alent circuit o# a common*emitter transistor in terms o# the h*parameters is as #ollows>
79
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
C%!C2%& D%#.!#M:
5he typical 'alues o# h*parameters #or the &ommon $mitter con#iguration are as #ollows>
)arameter
value
hi
hr
hf
ho
+Kho
+0+ IL
10<(+8
-5
<8
1< F"
58 IL
5his eDperiment consists o# #inding the h*parameters #or the gi'en transistor in the common*emitter
con#iguration.
)!OCED2!E :
!@ 3lot the input and the output characteristics o# the gi'en transistor. 1ollow the reMuired procedure
to accomplish the same.
2@ 5hen. #rom the input characteristics.
Ge ha'e
hieEb)be 9 b ib .)ce being constant
hreEb)be 9 b)ce . +b being constant
3@ 1rom the output characteristics. determine the #ollowing
h#eEb+c 9 b+b . )ce being constant.
hoeEb+c 9 b)ce . +b being constant.
9
B$ 294*+ sem $" (ab. $&$ "ept.. <)SR$&
!E"2L&:
,%,# ,OCE:
!@ Ghy are h*parameters pre#erred o'er other parameters to analy/e B45 circuitsP
2@ Ghy are h*parameters Qnown as hybrid*parametersP
3@ $Dplain the approDimate hybrid model o# the B45. Now are the approDimations doneP
4@ ;nder what conditions can the approDimate hybrid model o# the transistor be usedP
2@ ,i'e the con'ersion #ormulae #or con'erting h*parameters in common*emitter con#iguration to those
in common*base and common*collector con#igurations.
9!
B$ 294 +* sem $" (ab. $&$ "ept.. <)SR $&
92

Electronic Devices Lab Manual

Uploaded by

Document Information

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Electronic Devices Lab Manual

Uploaded by

Copyright:

Available Formats

K.Sridhar Raju www.engglabs.blogspot.

You might also like