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Chapter 4 Ee 301
Chapter 4 Ee 301
Chapter 4 Ee 301
TIMERS
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555 TIMER
555 timer is an integrated circuit that
very stable.
Use as monostable multivibrator, astable
multivibrator, bistable mode, buffer, analog
square wave signal generator, achometer
frequency meter and others
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Pin Configuration
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Pin Configuration
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Monostable Multivibrator
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Monostable Multivibrator
Know as shoot multivibrator
Producing a single pulse when triggered
Pulse generator circuit which the period is
calculated from RC network and
connected to external of 555 timer
Monostable multivibrator is stable when
the output logic LOW (logic = 0)
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Operation
When a pulse is trigger at pin 2 (normally
negative trigger pulse), timer output will
change to HIGH (+Vs) for a while and
change to LOW (stable condition). The
condition will continue LOW until pulse is
trigger again.
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Operation
The timing period is triggered (started)
when trigger input (555 pin 2) is less than
1/3 Vs, this makes the output high (+Vs)
and the capacitor C1 starts to charge
through resistor R1. Once the time period
has started further trigger pulses are
ignored.
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Operation
The threshold input (555 pin 6) monitors
the voltage across C1 and when this
reaches 2/3 Vs the time period over and
the output becomes LOW,
At the same time discharge (555 pin 7) is
connected to 0V, discharging the capacitor
ready for the next trigger.
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Output waveform
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ASTABLE MULTIVIBRATOR
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ASTABLE MULTIVIBRATOR
Known as free running multivibrator.
Producing a square wave
This type of timer do not have stable
condition, the condition always change.
Astable do not need trigger pulse for
external to change the output
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ASTABLE MULTIVIBRATOR
The period for LOW and HIGH can be
calculated based on resistor and
capacitor value that connected at outside
of timer.
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Operation
Assume the initial is HIGH. Transistor Q1
OFF and capacitor is charging through
resistor RA and RB.
When capacitor voltage reach 2/3 Vee,
Comparator 1 will trigger flip flop and
output change from change from HIGH to
LOW. Resistor RB and transistor Q1.
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Operation
When the capacitor voltage reach 1/3 Vee,
comparator output 2 will trigger flip flop so
the timer output is HIGH. The cycle is
repeated.
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Operation
Period for capacitor charging from 1/3 Vcc
to 2/3 Vcc same as period for HIGH output
at timer.
Period for capacitor discharging from
2/3Vcc to 1/3 Vcc same as period for LOW
output at timer
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Output waveform
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Formulas
TH = 0.693 (RA+RB) C
TL = 0.693 (RB) C
Period, T = TH + TL = 0.693 (RA + 2RB) C
Frequency, f = 1/T
= 1/ (TH + TL)
= 1.44 / ((RA + 2RB) C)
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Formulas
% Duty Cycle = [TH / (TH + TL) ]x 100
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Bistable mode
A simple memory which can be set and
reset.
The circuit is called a bistable because it is
stable in two states: output high and
output low. It is also known as a 'flip-flop'.
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Bistable mode
It has two inputs:
Trigger (555 pin 2) makes the output
high.
Trigger is 'active low', it functions when
< 1/3 Vs.
Reset (555 pin 4) makes the output low.
Reset is 'active low', it resets when < 0.7V.
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Bistable circuit
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Operation
R1 and R7 are the collector load resistors. Voltage
dividers R1, R2, and R5 provide forward bias for Q2; R7,
R6, and R3 provide forward bias for Q1. These resistors
also couple the collector signal from one transistor to the
base of the other. Observe that this is direct coupling of
feedback. This type of coupling is required because the
circuit depends on input triggers for operation, not on RC
time constants inside the circuit. Both transistors use
common emitter resistor R4 which provides emitter
coupling. C1 and C2 couple the input triggers to the
transistor bases.
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Circuit
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Output
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Schmitt trigger
A Schmitt trigger is a device that produces
rectangular wave signals.Its primary
function is to convert sine waves or
arbitrary waveforms into crisp square
shaped signals. The Schmitt trigger also
has an operational function called
hysterisis.
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Schmitt trigger
This function means that the switching
threshold on a positive going input is at a
higher voltage level than the switching
threshold on a negative going signal. A
device with hysterisis capabilities is
identified with this symbol.
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Operation
The resistors R1+R2 and R4 will perform a
voltage divider. The output from this voltage
divider will determine the state of the transistor
Q2.
As the input voltage is increased, a very small
current will start flowing through Q1. This will
have a result on the base voltage of Q2 that it
will gradually be decreased, and also the emitter
voltage of Q2 will be decreased. But the emitters
of Q1 and Q2 are connected together..
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Operation
Therefore, the voltage difference VBE of
Q1 will be increased. There will be a point
that the current flowing through Q1 will be
very high, and the Q2 will be sent to cutoff. When the Q2 is to cut-off area, no
current flows through it and thus, the
output voltage is the power supply voltage.
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