Icalabmanualpart 1

Lab manual
for
IC Applications Lab
III B. Tech I Semester
Prepared by
J. Sunil Kumar
&
B. Ramu
Department of Electronics & Communication Engineering
Turbomachinery Institute of Technology & Sciences

(Approved by AICTE & Affiliated to JNTUH)
Indresam(v), Patancheru(M), Medak(Dist). Pin: 502 319
IC Applications Lab Manual
Turbomachinery Institute of Technology & Sciences

Certificate
This is to certify that Mr. / Ms. .. RollNo.. of
I/II/III/IV B.Tech I / II Semester of ...branch has completed
the laboratory work satisfactorily in ........ Lab for the academic year 20
to 20 as prescribed in the curriculum.
Place: ..
Date: ...
Lab In charge
Head of the Department
-2-
Principal
List of Experiments
Cycle 1:
1. Applications of Op-Amp
2. Active Filters
3. Wien Bridge Oscillator
4. Multivibrators using IC 555 ( Astable & Monostable )
5. Schmitt trigger
6. PLL application
Mini Project:
1. Design Function Generator
2. Power supply Design
Cycle 2:
1. Flip Flops
2. Counter (Synchronous & Asynchronous)
3. Comparator
4. Mux
5. RAM
6. Stack & Queue implementation using RAM
-3-
Lab Exam Question Paper

1. a) Design a three input adder circuit to have a voltage gain of 3. Calculate the resistor values,
currents and output voltage when all the input voltages are 1V.
b) A substractor is to be designed to amplify the difference between two voltages by a factor
of 10. The inputs each approximately equal 1V. Determine suitable resistor values for a
circuit using a 741 Op-Amp.
c) Using 741 Op-Amp Design Comparator Circuit
d) Using a 741 Op-Amp, Design a low pass filter to have cutoff frequency of 1kHz.
e) Using a 741 Op-Amp, Design a high pass filter circuit to have cutoff frequency of 5kHz.
2. a) Design a Butterworth second order low pass filter, to have cutoff frequency of 1kHz.
Calculate the actual cutoff frequency.
b) Design a Butterworth second order high pass filter, to have cutoff frequency of 12 kHz.
Using the selected component values, calculate the actual cutoff frequency for the circuit.
3. Design a wein bridge oscillator to produce 100kHz, 9V output.
4. Using 555 timer Design Astable & Monostable Multivibrators
5. Using a 741 op-amp, calculate resistor values for the Schmitt trigger circuit to give
triggering points of 5V.
6. Using 566 IC design a VCO Circuit
7. The regulator circuit id to have an output of 10V. Calculate resistor values for R1 and R2,
select a suitable input voltage and determine the maximum load current
supplied if PD(max) = 1000mW
-4-
that may be
Exp. No. 1
Date:
APPLICATION OF OP-AMP
(Adder, Substractor, Comparator, Integrator, Differentiator)
Aim:
a) Design a three input adder circuit to have a voltage gain of 3. Calculate the resistor
values, currents and output voltage when all the input voltages are 1V.
b) A substractor is to be designed to amplify the difference between two voltages by a
factor of 10. The inputs each approximately equal 1V. Determine suitable resistor
values for a circuit using a 741 op-amp.
c) Using 741 Op-Amp Design Comparator Circuit
d) Using 741 op-amp, Design a low pass filter to have cutoff frequency of 1kHz.
e) Using 741 op-amp, Design a high pass filter circuit to have cutoff frequency of 5kHz.
Apparatus Required:
S. No.
1
Name of the Component

Op-amp
Specification
A741
Quantity
1
33k
2
3
Resistors
Signal Generator
100k
0-10MHz
IC Regulated Power Supply
15V
Connecting Wires
Single Strand
Bread Board
As Required
1
Theory:
Adder:
Op-Amp may be used to design a circuit whose output is the sum of several input
signals such as circuit is called a summing amplifier or summer. We can obtain either
inverting or non inverting summer.
The circuit diagrams shows a two input inverting summing amplifier. It has two
input voltages V1and V2, two input resistors R1, R2 and a feedback resistor Rf.
Assuming that op-amp is in ideal conditions and input bias current is assumed to be
zero, there is no voltage drop across the resistor Rcomp and hence the non inverting input
terminal is at ground potential. By taking nodal equations.
-5-
Adder Circuit Diagram:

R4 100kOhm
R3 33kOhm
R2 33kOhm
Vee 15V
R1 33kOhm
U1 UA741/301
VF2
Vi
Vcc 15V
Adder Waveforms:
T
1.00
Axis label
500.00m
0.00
-500.00m
Input signal
-1.00
0.00
50.00m
100.00m
-6-
150.00m
200.00m
V1/R1 +V2/R2 +V0/Rf = 0

V0 = - [(Rf/R1) V1 + (Rf/R2) V2]
And here R1 = R2 = Rf = 1K
V0 = - (V1 +V2)
Thus output is inverted and sum of input.
Substractor:
A basic differential amplifier can be used as a sub tractor. It has two input signals V1 and
V2 and two input resistances R1 and R2 and a feedback resistor Rf. The input signals scaled to
the desired values by selecting appropriate values for the external resistors.
From the figure, the output voltage of the differential amplifier with a gain of 1 is
V0 = -R/Rf(V2-V1) V0 = V1-V2.
Also R1 =R2 = Rf =1K.
Thus, the output voltage V0 is equal to the voltage V1 applied to the non inverting
terminal minus voltage V2 applied to inverting terminal.
Hence the circuit is sub tractor.
Comparator:
A comparator is a circuit which compares a signal voltage applied at one input of an

op-amp with a known reference voltage at the other input . It is basically an open loop opamp with output Vsat as in the ideal transfer characteristics.
It is clear that the change in the output state takes place with an increment in input Vi
of only 2mv. This is the uncertainty region where output cannot be directly defined There are
basically 2 types of comparators.
1. Non inverting comparator and.

2. Inverting comparator.
The applications of comparator are zero crossing detector , window detector, time marker
generator and phase meter.
-7-
10.00
Output Signal
A xis la b el
5.00
0.00
-5.00
-10.00
0.00
50.00m
100.00m
150.00m
200.00m
Substractor Circuit Diagram:

R2
R1
2
V1
+
OP1
R4
R3
VG1
VG2
V2
-8-
VF1
Low Pass Filter:

The first order low pass butter worth filter uses an Rc network for filtering. The
op-amp is used in the non inverting configuration, hence it does not load down the RC
network. Resistor R1 and R2 determine the gain of the filter.
V0/Vin = Af/(1+ jf/fh)
Af = 1 + Rf/R1 = pass band gain of filter .

F = frequency of the input signal.
Fh = 1/2RC =High cutt off frequency of filter .
V0/Vin = Gain of the filter as afunction of frequency
The gain magnitude and phase angle equations of the LPF the can be obtained by
converting V0/Vin into its equivalent polar form as follows
|V0/Vin| = Af/(1 +(f/fl)2)
= - tan-(f / fh)
Where is the phase angle in degrees . The operation of the LPF can be verified
from the gain magnitude equation.
1. At very low frequencies i.e f<fh,
|V0/Vin| = Af.
2. At f =fh , |V0/Vin| = Af/2.
3. At f>fh , |V0/Vin|<Af.
High Pass Filter:
High pass
filters are
often
formed
simply
by interchanging frequency.
Determining resistors and capacitors in LPFs that is ,a first order HPF is formed from a first
order LPF by interchanging components R and C figure. Shows a first order butter
worth HpF with a lower cut off frequency of Fl. This is the frequency at which
magnitude of the gain is 0.707 times its pass band value. Obviously all frequencies, with the
highest frequency determinate by the closed loop band width of op-amp.
For the first order HPF , the output voltage is
V0 =[1 + Rf/R1] j2RCVin/(1 - j2fRC)
V0/Vin =Af[j(f/fl)/(1 =j(f/fl)]
Where Af + Rf/R1 a pass band gain of the filter.
-9-
Input Signal at terminal 3
2.00
Axis label
1.00
0.00
-1.00
-2.00
0.00
50.00m
100.00m
150.00m
200.00m
Input Signal at terminal 2
1.00
Axis label
500.00m
0.00
-500.00m
-1.00
0.00
T
50.00m
100.00m
150.00m
200.00m
1.00
Axis label
500.00m
Substrator Output Signal

0.00
-500.00m
-1.00
0.00
50.00m
100.00m
- 10 -
150.00m
200.00m
F =frequency of input signal.

Fl =1/2RC = lower cutt off frequency
Hence, the magnitude of the voltage gain is
|V0/Vin| =Af(f/fl)/1+(f/f1)2.
Since, HPFs are formed from LPFs simply by interchanging Rs and Cs .The
design and frequency scaling procedures of the LPFs are also applicable to HPFs.
Procedure:
Adder:
1. connections are made as per the circuit diagram.
2. Apply input voltage 1) V1= 5v,V2=2v
2) V1= 5v,V2=5v
3) V1= 5v,V2=7v.
3. Using Millimeter measure the dc output voltage at the output terminal.
4. For different values of V1 and V2 measure the output voltage.
Substractor:
1. Connections are made as per the circuit diagram.
2. Apply input voltage 1) V1= 5v,V2=2v
2) V1= 5v,V2=5v
3) V1= 5v,V2=7v.
3. Using multi meter measure the dc output voltage at the output terminal.4. For different
values of V1 and V2 measure the output voltage.
Comparator:
1.
Connections are made as per the circuit diagram.
2.
Select the sine wave of 10V peak to peak , 1K Hz frequency.
3.
Apply the reference voltage 2V and trace the input and output wave forms.
4.
Super-impose input and output waveforms and measure sine wave amplitude
with reference to Vref.
5.
Repeat steps 3 and 4 with reference voltages as 2V, 4V, -2V, -4V and observe the
waveforms.
6.
Replace sine wave input with 5V dc voltage and Vref= 0V.
- 11 -
Comparator Circuit Diagram:
OBSERVATIONS:
Adder:
V1(volts)
V2(volts)
V3(volts)
Theoretical
V0 = -(V1+V2+V3)
Practical
V0 = -(V1+V2+V3)
Subtractor:
V1(volts)
Theoretical
V0 = (V1-V2)
V2(volts)
Practical
V0 = (V1-V2)
Comparator:
Voltage input
Vref
- 12 -
Observed wave amplitude
7.
Observe dc voltage at output using CRO.
8.
Slowly increase Vref voltage and observe the change in saturation voltage.
Differentiator:
2. Apply sine wave of amplitude 4Vp-p to the non inverting input terminal.
3. Values the input signal frequency.
4. Note down the corresponding output voltage.
5. Calculate gain in db.
6. Tabulate the values.
7. Plot a graph between frequency and gain.
8. Identify stop band and pass band from the graph.
Integrator:
2. Apply sine wave of amplitude 4Vp-p to the non inverting input terminal.
3. Values the input signal frequency.
4. Note down the corresponding output voltage.
5. Calculate gain in db.
6. Tabulate the values.
7. Plot a graph between frequency and gain.
8. Identify stop band and pass band from the graph.
Precautions:
1. Make null adjustment before applying the input signal.
2. Maintain proper Vcc levels.
- 13 -
V2 5
Differentiator Circuit Diagram
VG1
OP1 uA741
VF1
V1 5
R1 33k
C1 1n
VF2
R2 33k
R1 120k
VG1
OP1 uA741
VF1
V1 5
C1 1.32n
VF2
V2 5
Integrator
R2 120k
Differentiator Response
T 10.00
0.00
Gain (dB)
-10.00
-20.00
-30.00
-40.00
-50.00
-60.00
Phase [deg]
100.00
50.00
0.00
-50.00
-100.00
10
100
1k
10k
Frequency (Hz)
- 14 -
100k
1M
Viva Question:
1. What is an op-amp?
2. Give the characteristics of an ideal op-amp:
3. How a non-inverting amplifier can be courted into voltage follower?
4. What is the necessity of negative feedback?
5. What are 4 building blocks of an op-amp?
6. What is the purpose of shunting Cf across Rf and connecting R1 in series with the input signal?
7. What are the applications of Differentiator?
8. What do you mean by unity gain bandwidth?
9. What did you observe at the output when the signal frequency is increased above fa?
10. How would you eliminate the high frequency noise in integrator?
11. What are the main applications of the Integrator?
12. Is it possible to design an analog computer using integrator and differentiator?
13. What happens to the output of integrator when input signal frequency goes below fa?
Result:
Thus Adder, Substractor, Comparator, Differentiator, Integrator, using op-amp was
designed and tested.
- 15 -
Integrator
Frequency(Hz)
V0(V)
Gain in db=20log(V0/Vi)
Differentiator
Frequency (Hz)
V0(V)
Gain in db= 20log(V0/Vi)
- 16 -
- 17 -
Integrator Response
T 10.00
0.00
Gain (dB)
-10.00
-20.00
-30.00
-40.00
-50.00
-60.00
-70.00
Phase [deg]
0.00
-50.00
-100.00
-150.00
-200.00
10
100
1k
10k
Frequency (Hz)
- 18 -
100k
1M
Exp. No. 2
Date:
ACTIVE FILTERS
Aim:
a) Design a Butterworth second order low pass filter, to have cutoff frequency of 1kHz.
Calculate the actual cutoff frequency.
b) Design a Butterworth second order high pass filter, to have cutoff frequency of 12kHz. Using
the selected component values, calculate the actual cutoff frequency for the circuit.
Apparatus Required:
S. No.
1
Name of the Component

OP AMP
Resistors
3
4
5
6
7
8
9
Capacitors
Fixed Power Supply
Function Generator
CRO
General Purpose Trainer Kit
Connecting wires
CRO Probes
Specification
A741
22k
39k
0.01F
0.001uF
15 V
2MHz
20MHz
Single Strand
Crocodile Clips
Quantity
1
2
1
1
2
1
1
1
1
1
2
Theory:
A filter is a device that passes electric signals at certain frequencies. Butterworth is one
of the most commonly used filter optimizations. It has the following characteristics:
It provides monotonic response, the maximally flat pass band response. For this reason, it is
sometimes called a flat-flat filter.
Butterworth filters are used as anti-aliasing filters in data converter applications where
precise signal levels are required across the entire pass band.
The frequency response below shows the transition band ( fc to f1) where the response shifts
from the pass band to the stop band. The pass band ends when A1 is -3db down from the low
frequency response A0. The stop band enters when the response drops to some
predetermined value A2.
LPF
A LPF allows only low frequency signals up to a certain break-point fH to pass through,
while suppressing high frequency components. The range of frequency from 0 to higher cut off
frequency fH is called pass band and the range of frequencies beyond fH is called stop band.
The following steps are used for the design of active LPF.
- 19 -
Circuit Diagram:
Butterworth Low Pass Filter
VF1
OP1 uA741
VG1
V1 5
R2 22k
C1 5n
R1 22k
VF2
V2 5
C2 10n
R3 39k
Butterworth High Pass Filter
V2 5
R1 10k
OP1 uA741
R2 18k
VG1
VF1
C1 1n
R3 18k
V1 5
C2 1n
VF2
Butterworth Low Pass Filter Response
Gain (dB)
T 100.00
0.00
-100.00
-200.00
Phase [deg]
200.00
100.00
0.00
-100.00
10
100
1k
10k
Frequency (Hz)
- 20 -
100k
1M
1. The value of high cut off frequency fH is chosen.

2. The value of capacitor C is selected such that its value is 1m F.
3. By knowing the values of fH and C, the value of R can be calculated using
4. Finally the values of R1 and Rf are selected depending on the designed pass band gain by
using
Second order HPF:

The high pass filter is the complement of the low pass filter. Thus the high pass filter can
be obtained by interchanging R and C in the circuit of low pass configuration. A high pass filter
allows only frequencies above a certain bread point to pass through and at terminates the low
frequency components. The range of frequencies beyond its lower cut off frequency fL is called
stop band.
Procedure:
LPF:1. Connections are given as per the circuit diagram.
2. Input signal is connected to the circuit from the signal generator.
3. The input and output signals of the filter channels 1 and 2 of the CRO are connected.
4. Suitable voltage sensitivity and time-base on CRO is selected.
5. The correct polarity is checked.
6. The above steps are repeated for second order filter.
HPF
1. Connections are given as per the circuit diagram.
2. Input signal is connected to the circuit from the signal generator.
3. The input and output signals of the filter channels 1 and 2 of the CRO are connected.
4. Suitable voltage sensitivity and time-base on CRO is selected.
5. The correct polarity is checked.
6. The above steps are repeated for second order filter.
Result:Thus the second order Low pass filter and High pass filter were designed using Op-amp and its
cut off frequency was determined.
- 21 -
LPF
HPF
- 22 -
Tabular Column : (LPF)

S. No.
Frequency
Output Voltage (Vo)
Gain (Vo / Vin)
Output Voltage (Vo)
Gain (Vo / Vin)
Tabular Column : (HPF)

S. No.
Frequency
- 23 -
Butterworth High Pass Filter Response:

T 10.00
0.00
Gain (dB)
-10.00
-20.00
-30.00
-40.00
-50.00
-60.00
-70.00
Phase [deg]
0.00
-100.00
-200.00
-300.00
-400.00
10
100
1k
10k
Frequency (Hz)
- 24 -
100k
1M
Exp. No. 3
Date:
WEIN BRIDGE OSCILLATOR

Aim:
Design a Wein-Bridge Oscillator to produce 100kHz, 9V output.
Apparatus Required:
S. No.
1
2
3
4
5
6
7
8
9
Component
IC
Resistors
Capacitor
Variable Resistor
Fixed Power Supply
Connecting Wires
CRO
CRO Probes
Bread Board
Specification
LM 565
1.5k
10k
4.7k
2k
0.047F, 0.1F
10k
15V
Single Strand
0-30MHz
Crocodile Clips
Quantity
1
1
1
2
1
1
1
1
As Required
1
3
1
Theory:
An oscillator consists of an amplifier and a feedback network.
1) 'Active device' i.e. Op Amp is used as an amplifier.
2) Passive components such as R-C or L-C combinations are used as feed back net work.
To start the oscillation with the constant amplitude, positive feedback is not the only
sufficient condition. Oscillator circuit must satisfy the following two conditions known as
Barkhausen conditions:
a. The first condition is that the magnitude of the loop gain (A) = 1
A = Amplifier gain and = Feedback gain.
b. The second condition is that the phase shift around the loop must be 360 or 0.
The feedback signal does not produce any phase shift. This is thebasic principle of a Wien
bridge oscillator. The given circuit shows the RC combination used in Wien bridge oscillator.
This circuit is also known as lead-lag circuit. Here, resistor R1 and capacitor C1 are connected in
the series while resistor R2and capacitor C2 are connected in parallel. At high frequencies, the
reactance of capacitor C1 and C2 approaches zero. This causes C1 and C2 appears short. Here,
capacitor C2 shorts the resistor R2. Hence, the output voltage Vo will be zero since output is
taken across R2 and C2 combination. So, at high frequencies, circuit acts as a 'lag circuit'.
C1combination. Here, the circuit acts like a 'lead circuit'. But at one particular frequency
between the two extremes, the output voltage reaches to the maximum value. At this frequency
- 25 -
Circuit Diagram:
VF1
uA741
V2 10
R2 1.5k
C2 1n
R3 3.3k
R1 1.5k
V1 10
C1 1n
R4 1.5k
Design:
Gain required for sustained oscillation is Av = 1/b = 3
(PASS BAND GAIN) (i.e.) 1+Rf/R1 = 3
Rf = 2R1
Frequency of Oscillation fo = 1/2p R C
Given fo = 1 KHz
Let C = 0.05 F
R = 1/2 foC
R = 3.2 KW
Let R1 = 10 K \ Rf = 2 * 10 K
Model Output Signal
T 2.00
Axis label
1.00
0.00
-1.00
-2.00
0.00
10.00u
20.00u
30.00u
- 26 -
40.00u
50.00u
only, resistance value becomes equal to capacitive reactance and gives maximum output. Hence,
this particular frequency is known as resonant frequency or oscillating frequency.
The maximum output would be produced if
R = Xc.= 1/(2fC)
If R1 = R2 = R and C1 = C2 = C
Then the resonant frequency f = 1/(2RC)
Due to limitations of the op-amp, frequencies above 1MHz are not achievable.
The basic version of Wein bridge has four arms. The two arms are purely resistive and
other two arms are frequency sensitive arms. These two arms are nothing but the lead-lag circuit.
The series combination of R1 and C1 is connected between terminal a and d. The parallel
combination of R2 and C2 is connected between terminal d and c . So the two circuits (Fig.1 and
Fig.2) are same except in shape. Here, bridge does not provide phase shift at oscillating
frequency as one arm consists of lead circuit and other arm consists of lag circuit. There is no
need to introduce phase shift by the operational amplifier. Therefore, non inverting amplifier is
used.
Procedure:
1. Connect the components as shown in the circuit
2. Switch on the power supply and CRO.
3. Note down the output voltage at CRO.
4. Plot the output waveform on the graph.
5. Redesign the circuit to generate the sine wave of frequency 2KHz.
6. Compare the output with the theoretical value of oscillation.
Observation:
Peak to peak amplitude of the output = __________Volts.
Frequency of oscillation = __________Hz.
Questions:
1. State the two conditions for oscillations.
2. Classify the Oscillators?
3. Define an oscillator?
4. What is the frequency range generated by Wein Bridge Oscillator?
5. What is frequency stability?
Result:
Thus wein bridge oscillator was designed using op-amp and tested.
- 27 -
- 28 -
Exp. No. 4
Date:
MULTIVIBRATORS USING IC 555 (ASTABLE & MONOSTABLE)

Aim: To design and test an Astable and Monostable Multivibrators using 555 timer with duty
cycles ratio.
Apparatus Required:
S. No.
1
2
Component
IC
Resistors
Capacitors
4
5
6
7
8
9
Diode
CRO
Fixed Power Supply
Probes
Bread Board
Connecting Wires
Specification
555 TIMER
3.3k
6.8k
0.1F
0.01F
IN4007
0-30MHz
15V
Quantity
1
1
1
2
2
1
1
1
2
1
As Required
Theory:
Fig shows the 555 timer connected as an Astable Multivibrators. Initially, when the
output is high. Capacitor C starts charging towards Vcc through RA and RB. As soon as capacitor
voltage equals 2/3 Vcc upper comparator (UC) triggers the flip flop and the output switches low.
Now capacitor C starts discharging through RB and transistor Q1. When the voltage across C
equals 1/3 Vcc lower comparator (LC), output triggers the flip-flop and the output goes high.
Then the cycle repeats. The capacitor is periodically charged and discharged between 2/3 Vcc
and 1/3 Vcc respectively. The time during which the capacitor charges form 1/3 Vcc to 2/3 Vcc is
equal to the time the output is high and is given by
Tc = 0.69(RA+RB)C
(1)
Where RA and RB are in Ohms and C is in farads. Similarly the time during which the
capacitor discharges from 2/3 Vcc to 1/3 Vcc is equal to the time the output is low and is given by
Td = 0.69 RB C
(2)
The total period of the output waveform is

T = Tc + T d = 0.69 (RA + 2RB) C
(3)
The frequency of oscillation

fo = 1 / T =1.45 / (RA+2RB)C
(4)
Eqn (4) shows that fo is independent of supply voltage Vcc

The duty cycle is the ratio of the time td during which the output is low to the total time
period T. This definition is applicable to 555 Astable Multivibrators only; conventionally the
- 29 -
Circuit Diagram:
Astable Multivibrator:
Monostable Multivibrator
Monostable Multivibrator Model Graph:
- 30 -
duty cycle ratio is defined as the ratio as the time during which the output is high to the total
time period.
Duty cycle = td T X100
RB + RA+ 2RB X 100
(5)
To obtain 50% duty cycle a diode should be connected across RB and RA must be a
combination of a fixed resistor and a potentiometer. So that the potentiometer can be adjusted
for the exact square waves
Monostable Multivibrators has one stable state and other is a quasi stable state. The
circuit is useful for generating single output pulse at adjustable time duration in response to a
triggering signal. The width of the output pulse depends only on external components, resistor
and a capacitor. The stable state is the output low and quasi stable state is the output high. In the
stable state transistor Q1 is on and capacitor C is shorted out to ground. However upon
application of a negative trigger pulse to pin2, Q1 is turned off which releases the short circuit
across the external capacitor C and drives the output high. The capacitor C now starts charging
up towards Vcc through RA. However when the voltage across C equal 2/3 Vcc the upper
comparator output switches form low to high which in turn drives the output to its low state via
the output of the flip-flop. At the same time the output of the flip flop turns Q1 on and hence C
rapidly discharges through the transistor. The output remains low until a trigger is again applied.
Then the cycle repeats. The pulse width of the trigger input must be smaller than the expected
pulse width of the output. The trigger pulse must be of negative going signal with amplitude
larger than 1/3 Vcc. The width of the output pulse is given by,
T = 1.1 RAC
Astable Multivibrator Design:
fo = 1/T = 1.45 / (RA+2RB)C
Choosing C = 1 m F; RA = 560
D = RB / RA +2RB= 0.5 [50%]
RB = ______
Monostable Multivibrator Design:
Given a pulse width of duration of 100 m s
Let C = 0.01 mfd; F = _________KHz
Here, T= 1.1 RAC
So, RA =
- 31 -
Astable Multivibrator Model Graph:
Astable Multivibrator Observations:
Theoretical Time Period
Practical Time Period
Monostable Multivibrator Observations:

Theoretical Time Period
- 32 -
Practical Time Period
Precautions:
1. Make the null adjustment before applying the input signal.
2. Maintain proper vcc levels.
Result:
Operation of Monostable and Astable multivibrators using 555 IC trainers is studied
and wave forms are noted.
Viva Questions:
1. What is another name for mono stable multi?
2. What is the purpose of pin reset?
3. Define duty cycle?
4. What are the various applications of one shot?
5. How many external triggers are necessary in one shot?
6. Define astable multi?
7. Explain the pulse width of the astable multi?
8. What is the other name for astable multi?
9. Write one application of free running oscillator?
10. How many external triggers are necessary for astable?
- 33 -
- 34 -
Exp. No. 5
Date:
SCHMITT TRIGGER CIRCUITS USING IC 741

Aim: To design and test Schmitt trigger using Op-Amp
Apparatus Required:
S. No.
1
2
Component
Op-Amp
Resistors
3
4
5
6
7
8
Fixed Power Supply

Function Generator
CRO
CRO Probes
Bread Board
Connecting Wires
Specification
A741
120
47k
10k
15 V
0 2MHz
0 30 MHz
Quantity
1
1
1
1
1
1
1
2
1
As Required
Theory:
The Schmitt Trigger is a type of comparator with two different threshold voltage levels.
Whenever the input voltage goes over the High Threshold Level, the output of the comparator
is switched HIGH (if is a standard ST) or LOW (if is an inverting ST). The output will remain in
this state, as long as the input voltage is above the second threshold level, the Low Threshold
Level. When the input voltage goes below this level, the output of the Schmitt Trigger will
switch. The HIGH and LOW output voltages are actually the POSITIVE and NEGATIVE
power supply voltages of the comparator. The comparator needs to have positive and negative
power supply (like + and -) to operate as a Schmitt Trigger normally. The following drawing
shows how a Schmitt Trigger would react to an AC voltage input:
When the non-inverting input (+) is higher than the inverting input (-), the comparator
output switches to the POSITIVE voltage supply. On the contrary, the non-inverting input (+) is
lower than the inverting input (-), the output switches to the NEGATIVE voltage supply. The
inverting input (-) is grounded, so someone would expect that the turn-on and off point would be
the ground (0). The function of the ST comes from the feedback resistor RFB. When for example
the output of the comparator is to the POSITIVE voltage supply, then the non-inverting input
has through the RFB this voltage! The same happens when the output is to the NEGATIVE
power supply.
The voltage needed to switch the output of the comparator must be above or below zero
(ground), according to the POSITIVE and NEGATIVE power supply and according to the
resistors RI and RFB. More specific, the formula to calculate the threshold voltage is:
- 35 -
Design:
VCC = 12 V;
VSAT = 0.9 VCC;
R1= 47K;
R2 = 120
VUT = + [VSAT R2] / [R1+R2]
VLT = - [VSAT R2] / [R1+R2]
HYSTERSIS [H] = VUT - VLT
Circuit Diagram:
Vin
V1 15
OP1 uA741
6
VG1
V2 15
R1 10k
R2 47k
R3 120
Vo
Model Graphs:
- 36 -
VTHRESHOLD = VSUPPLY x RI/(RFB + RI)

So, if the output is to the POSITIVE voltage, the required negative voltage that must be
applied to Vin is:
VINPUT <= - VTHRESHOLD
If the output is to the NEGATIVE voltage, the required positive voltage that must be applied to
Vin is:
VINPUT >= VTHRESHOLD
Procedure:
1. Connect the circuit as shown in the circuit
2. Set the input voltage as 5V (p-p) at 1KHz. (Input should be always less than Vcc)
3. Note down the output voltage at CRO
4. To observe the phase difference between the input and the output, set the CRO in dual
Mode and switch the trigger source in CRO to CHI.
5. Plot the input and output waveforms on the graph.
Observation:
Peak to peak amplitude of the output = Volts.
Frequency = Hz.
Upper threshold voltage = Volts.
Lower threshold voltage = Volts.
Viva Questions:
1. What is Hysteresis? What parameter determines Hysteresis?
2. How would you recognize that positive feedback is being used in the Op-amp circuit?
3. What do you mean by upper and lower threshold voltage in Schmitt Trigger?
4. What is the difference between a basic comparator and the Schmitt trigger?
5. What is a sample and hold circuit? Why is it needed?
6. What is a voltage limiting, and why is it needed?
7. What is the name of the circuit that is used to detect the peak value of the Nonsinusoidal input waveforms?
8. How will you produce, definite Hysteris in a Schmitt trigger using op-amp?
Result: Thus Schmitt Trigger using op-amp was designed & tested.
- 37 -
Exp. No. 6
Date:
IC 565 PLL APPLICATIONS VCO

Aim: Design a Phase Locked Loop Application (Voltage Controlled Oscillator) using IC
LM565.
Apparatus Required:
S. No.
1
2
3
4
5
6
7
8
9
Component
IC
Resistors
Capacitor
Variable Resistor
Fixed Power Supply
Connecting Wires
CRO
CRO Probes
Bread Board
Specification
LM 565
1.5k
10k
4.7k
2k
0.047F, 0.1F
10k
15V
Single Strand
0-30MHz
Crocodile Clips
Quantity
1
1
1
2
1
1
1
1
As Required
1
3
1
Theory:
This oscillator uses a special IC chip, the LM565 that is designed to function as a phase
locked loop (PLL). The chip contains a VCO (which we will utilize in this experiment) and a
phase detector. A combination of an input control voltage on pin 7 and the RC time constant
formed by the components on pins 8 and 9 set the VCO output frequency. The VCO within the
LM565 is not designed like a conventional oscillator. It is really a current controlled oscillator.
Remember that as the charging current in a capacitor is increased, the rate of capacitor charging
(as evidenced in its voltage rise) also increases. The same is true for capacitor discharging as
well. The LM565 simply translates the control voltage on pin 7 into a charging and discharging
current for the timing capacitor, C1. So what is the function of the resistors on pin 8? The
resistors on pin 8 also help set the charge and discharge current for the timing capacitor C1. In
other words, the output frequency of the LM565 VCO depends on three factors:
1) The control voltage on pin 7;
2) The total resistance on pin 8 (R3 and R4);
3) The capacitance on pin 9 (C1).
When a capacitor is charged by a constant current, its voltage rises linearly (straightline). Thus, one of the output waveforms of the LM565 is a triangle wave. The other output is a
square wave -- the result of the triangle wave going through a Schmitt trigger.
- 38 -
Circuit Diagram:
- 39 -
Two different LM565 VCO circuits will be examined in this experiment, and they are
shown in Figures 1 and 2. In Figure 1, the control voltage of the VCO is held constant by
resistors R1 and R2, and the RC time-constant is varied by R3. (Note that the total resistance Rt
in Figure 1 is the series combination of R3 and R4). In Figure 2, the timing resistance Rt is equal
to R2, and is constant. A potentiometer has been substituted in R1's place, allowing the control
voltage to be varied over a range of approximately 7.5 V to 15 V. Note that the control voltage
should be adjusted to be in the range 11.25 V to 15 V in part two of this experiment.
Procedure:
Procedure:
2. Measure the output voltage and frequency of both triangular and squares.
3. Vary the values of R1 and C1 and measure the frequency of the waveforms.
4. Compare the measured values with the theoretical values.
Precautions:
1. Connect the wires properly.
2. Maintain proper Vcc levels.
Result:
The NE/SE 565 is operated as Voltage Controlled Oscillator also the output
frequency for various values of R1 and C1 are observed.
Viva Questions:
1. What are the applications of VCO?

2. Draw the pin diagram of NE/SE 565.
3. What is the need of connecting 0.0047F capacitor between pin 5 and pin 6?
- 40 -
Observations:
Output Voltage (V)

S. No. R1
C1
Square wave Triangular wave
Model Graph:
- 41 -
Theoretical
Practical
frequency (KHz)
frequency
Exp. No. 7
Date:
VOLTAGE REGULATOR IC LM723

Aim: To design a high current, low voltage and high voltage linear variable dc regulated power
supply and test its line and load regulation.
Apparatus Required:
S. No.
1
2
3
4
5
6
7
8
Component
Voltage Regulator
Resistor
Specification
LM723
3.3k
4.7k
5.6k (POT)
100F
Capacitor
DRB
Regulated Power Supply
Multimeter
Bread Board
Connecting Wires
0 15 V
Quantity
1
1
1
2
1
1
1
2
1
As Required
Theory:
A Voltage Regulator is a circuit that supplies a constant voltage regardless of changes in
load current and input voltage variations. Using IC 723, we can design both low voltage and
high voltage regulators with adjustable voltage. For a low voltage both regulator, it is Vo >Vref,
where as for high voltage regulator can be designed using Op-Amps, it is quiker and easier to
use IC voltage regulators. IC 723 is a general purpose regulator and is a 14-pin IC with internal
short circuit current limiting, thermal shutdown, current / voltage boosting etc. Furthermore it is
an adjustable voltage regulator which can be varied over both positive and negative voltage
ranges. By simply varying the connection made extremely, we can operate the IC in the required
mode of operation. Typical performances parameters are line and load regulations which
determine the precise characteristics of a regulator.
Procedure:
a) Line regulation
1. Connect the circuit as shown in fig.
2. Obtain R1 and R2 for Vo = 3
3. By varying Vinrom 2 to 10 V, measure the output Voltage Vo
4. Draw the graph between Vin and Vo
5. Repeat the steps for Vo = 5V
- 42 -
Circuit Diagram:
Model Graphs:
- 43 -
b) Load Regulation For Vo = 3V

1. Set Vi such that Vo = 3V
2. By varying RL, measure IL and Vo
3. Plot the graph between IL and Vo
4. Repeat the Steps 1 to 3 for Vo = 5V
Precautions:
1. Check the connection before giving the power supply
2. Readings should be taken carefully
Result: Thus the line and load regulation of a high current, low voltage and high voltage linear
variable dc regulated power supply was designed and tested.
Viva Questions:
i) Why minimum protect resistance in load is required? What will happen if it is not there?
ii) Did you short circuit the output and check whether the short circuit protection is working?
iii) What will you do if you are asked to design both high and low voltage regulators in one
circuit?
iv) Give 10 example applications of the above circuits?
- 44 -
Observations:
Line Regulation:
S. No.
Load Resistance RL1 =

Input Voltage
Output Voltage
(Vin)
(Vo)
Load Resistance RL2 =

Input Voltage
output Voltage
(Vin)
(Vo)
Load Regulations:
S. No.
Input Voltage Vin =

Output Current
Output Voltage
(Vo)
(IL)
Input Voltage Vin =

Output Current
output Voltage
(IL)
(Vo)
Calculation of % Voltage Regulation :

% Voltage Regulation = ( Vdc ( NL ) - Vdc ( FL ) ) / Vdc ( FL )
Vdc ( NL ) = D.C. output voltage on no load
Vdc ( FL ) = D.C. output voltage on full load
- 45 -

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Lab manual

Department of Electronics & Communication Engineering

Turbomachinery Institute of Technology & Sciences

IC Applications Lab Manual

Turbomachinery Institute of Technology & Sciences

Head of the Department

IC Applications Lab Manual

IC Applications Lab Manual

Lab Exam Question Paper

IC Applications Lab Manual

Name of the Component

IC Regulated Power Supply

IC Applications Lab Manual

Adder Circuit Diagram:

IC Applications Lab Manual

V1/R1 +V2/R2 +V0/Rf = 0

A comparator is a circuit which compares a signal voltage applied at one input of an

1. Non inverting comparator and.

IC Applications Lab Manual

Substractor Circuit Diagram:

IC Applications Lab Manual

Low Pass Filter:

V0/Vin = Af/(1+ jf/fh)

Af = 1 + Rf/R1 = pass band gain of filter .

IC Applications Lab Manual

Input Signal at terminal 3

Input Signal at terminal 2

Substrator Output Signal

IC Applications Lab Manual

F =frequency of input signal.

Connections are made as per the circuit diagram.

Select the sine wave of 10V peak to peak , 1K Hz frequency.

Replace sine wave input with 5V dc voltage and Vref= 0V.

IC Applications Lab Manual

Comparator Circuit Diagram:

Observed wave amplitude

IC Applications Lab Manual

Observe dc voltage at output using CRO.

IC Applications Lab Manual

Differentiator Circuit Diagram

IC Applications Lab Manual

IC Applications Lab Manual

Gain in db= 20log(V0/Vi)

IC Applications Lab Manual

IC Applications Lab Manual

IC Applications Lab Manual

Name of the Component

IC Applications Lab Manual

Butterworth High Pass Filter

Butterworth Low Pass Filter Response

IC Applications Lab Manual

1. The value of high cut off frequency fH is chosen.

Second order HPF:

IC Applications Lab Manual

IC Applications Lab Manual

Tabular Column : (LPF)

Output Voltage (Vo)

Gain (Vo / Vin)

Output Voltage (Vo)

Gain (Vo / Vin)

Tabular Column : (HPF)

IC Applications Lab Manual

Butterworth High Pass Filter Response: