Etd (Doar Cap 2-7)

ABSTRACT
DU, YU. Advanced Bi-directional Converters for Energy Storage Systems. (Under the
direction of Dr. Alex Huang.)
The electric power and transportation industries are two major sectors for primary
energy consumption on Earth. The majority of energy sources such as petroleum, natural gas, coal are nonrenewable or not environment-friendly. The associated energy
shortage, green house gas emission and energy security issues are well known. The wide
spread adoption of renewable energy and transportation electrification are two potential
solutions. Battery and supercapacitor energy storage systems and bi-directional power
electronic converters play vital roles for both solutions.
In Chapter 2, conventional non-isolated and isolated bi-directional DC-DC converters
are reviewed and their performance is evaluated for energy storage application. In Chapter 3, a novel bi-directional series resonant DC-DC converter with clamped capacitor
voltage is proposed. The series resonant DC-DC converter with clamped capacitor voltage exhibits excellent characteristics in forward mode operation, but the conventional
single angle phase-shift modulation cannot reverse the power flow. Novel modulation
strategies for reverse mode operation based on three phase-shift angles are proposed and
investigated in detail. The optimum modulation trajectories in three-dimensional modulation space are identified and implemented in a look-up table based modulator for
reversed power flow control in wide voltage range. Simulation analysis is verified by experiment results with a 750V input, 300V-600V output, 50kHz and 15kW (scaled down)
IGBT-based prototype. In Chapter 4, in order to improve the performance of distributed
energy storage device, a novel multi-core bi-directional DC-DC converter is proposed to
fulfill requirements such as high voltage gain, high charging and discharging current,
high power density, high efficiency and planar package. The converter is optimized from
the topology, power stage layout and parasitics minimization, magnetic trade off and
inductor integration, structure optimization, converter package, multi-variable and high
resolution modulation, soft switching, etc. An experimental prototype was developed
which achieved the power density of 5.1kW/L (83W/in3 ). The power conversion efficiency from 40A to 100A is higher than 95% and the maximal efficiency is 96.0%. In
chapter 5, to address the issue of the voltage variation in relatively large range for most
battery or supercapacitor energy storage devices, and the issue of limited zero voltage
switching range of conventional single-angle phase-shift modulation technique for multicore bi-directional DC-DC converter, a dual-angle phase-shift modulation technique is
proposed. With the dual-angle scheme, zero voltage switching of all switches in the multicore converter can be obtained in wide voltage and full load range. The experiment test
result verifies the proposed modulation technique. Also in this chapter, a high resolution
phase-shift modulation scheme to improve the resolution of the phase-shift angle by 50
times is proposed for the 500kHz multi-core converter. The implementation issues such as
deadtime generation and gate signal loss are discussed and solutions are provided. The
experimental measurement of the phase-shift time validates the high resolution of the
phase-shift angle. With 30 angle, the resolution of 0.1% is obtained and is sufficient for
close-loop feedback control. In Chapter 6, the issues of conventional long battery string
with series connected cells and the conventional approaches to mitigate these issues are
described first. A novel distributed energy storage device with modularized short-string
battery pack and integrated DC-DC converter is proposed. Two droop control methods
are proposed to regulate the DESD module output voltage and to balance the paralleled
module current without fast communication. The controlled virtual DC output resistance
is validated in both simulation and experiments.
Copyright 2012 by Yu Du
All Rights Reserved
Advanced Bi-directional Converters for

Energy Storage Systems
by
Yu Du
A dissertation submitted to the Graduate Faculty of

North Carolina State University
in partial fulfillment of the
requirements for the Degree of
Doctor of Philosophy
Electrical Engineering
Raleigh, North Carolina
2012
APPROVED BY:
Dr. Subhashish Bhattacharya
Dr. Srdjan Lukic
Dr. Xiangwu Zhang
Dr. Alex Huang

Chair of Advisory Committee
DEDICATION
I dedicate this dissertation to my wonderful family. Particularly to my father, Jiajiong

Du, who stirred my interest of science and technology when I was a child. He always gives
me spiritual encouragement and great support in my pursuit of excellence. He always
gives more care to family members than to himself. I must thank my loving mother,
Xiuqiong Xia, for taking care of me for years and for her optimism and determination.
Thank you to my lovely wife, Yuanhui Zhang, for all of these years of support and
encouragement. I am luck to have you in my life. I must also thank my terrific in-laws
who have helped so much with our life.
ii
BIOGRAPHY
Yu Du was born in Chengdu, Sichuan Province, China. He received the B.S. and M.S.
degrees in electrical engineering (power electronics) in 2002 and 2005 respectively, both
from the Department of Electrical Engineering at Zhejiang University, Hangzhou, China.
He is completing the Ph.D. degree in North Carolina State University, Raleigh, North
Carolina, U.S.A.
From 2005 to 2007, he was with Global Research Center (Shanghai, China) of General
Electric Company (GE). He was involved the development of ultra-compact high voltage
medical power supplies for GEs healthcare business and conducted interdisciplinary research on novel electric-driven desalination technologies for GEs water business. During
his work in the global research center, he was granted six U.S. patents and he is the
recipient of 2006 Global Research Rookie Award.
Since 2007, he has been pursuing his PhD degree in NSF FREEDM Systems ERC at
North Carolina State University, Raleigh. He is the first international exchange student
that the FREEDM Systems Center sent to the Power Electronics Systems Lab at Swiss
Federal Institute of Technology (ETH-Zurich), Switzerland for three-months of research.
He served as the student group leader for the Advanced Transportation Energy Center
at North Carolina State University. His research interests include ultra-compact bidirectional converters, high voltage converters and distributed energy storage systems.
He has more than ten technical publications and two U.S. patents pending during his
work in FREEDM Systems Center.
iii
ACKNOWLEDGEMENTS
I am very appreciative to my advisor, Dr. Alex Q. Huang, for his guidance and
support throughout my research and work in FREEDM Systems Center. He provides
many valuable inputs to my work and discussion with him often stimulates new ideas
for my research. With Dr. Huangs consistent encouragement and support, I obtained a
chance to drive a technology from an idea in my mind to a lab prototype, from technology
development to potential applications, thus, greatly enriching my PhD experience. Dr.
Huang also has given me a great deal of help in the completion of this dissertation. None
of these would have been possible without his support.
Thank you to my committee members, Dr. Srdjan Lukic, Dr. Subhashish Bhattacharya and Dr. Xiangwu Zhang for serving on my committee and providing suggestions
throughout the research process. Thank you to Dr. Johann Kolar for his cordiality and
hospitality during my stay in his lab at ETH-Zurich. Thank you to Mr. Boris Jacobson
for the support to the project and my research work as a very senior engineer. I would
also like to thank all student members in the Avanced Transportation Energy Center
(ATEC) group for their active involvement in team activities. I would like to give a
special thanks to the faculty, staff and students at FREEDM Systems Center. I have
fond memories for both the work and the extracurricular life here. Thank you to all my
dear friends for your encouragement. One does not find ones way this far in life without
many friends to acknowledge.
iv
TABLE OF CONTENTS
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii

List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ix
Chapter 1 Introduction . . . . . . . . . . . . . . . .
1.1 Energy Storage for Grid Applications . . . . . .
1.2 Energy Storage for Electric Vehicle Applications
1.3 The Scope of the Work . . . . . . . . . . . . . .
1
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Chapter 2 Review and Evaluation of Bi-directional DC-DC Converters

for Energy Storage Applications . . . . . . . . . . . . . . . . . .
2.1 Basic Non-isolated Bi-directional Converters . . . . . . . . . . . . . . . .
2.2 Derived Non-isolated Bi-directional Converters . . . . . . . . . . . . . . .
2.3 Performance of Non-isolated Bi-directional DC-DC Converters in Battery
Energy Storage Applications . . . . . . . . . . . . . . . . . . . . . . . . .
2.3.1 Performance of Buck/Boost, Cuk and SEPIC/Luo Converters . .
2.3.2 Buck/Boost Converter Efficiency Improvement . . . . . . . . . . .
2.4 Performance of the Derived Non-isolated Bidirectional Converters in Battery Energy Storage Applications . . . . . . . . . . . . . . . . . . . . . .
2.5 Summary for the Non-isolated Bi-directional DC-DC Converters . . . . .
2.6 Review of Isolated Bi-directional DC-DC Converters . . . . . . . . . . . .
2.7 Summary for Isolated Bi-directional DC-DC Converters . . . . . . . . . .
2.8 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
15
17
19
20
22
25
30
30
36
40
Chapter 3 A Novel Wide Voltage Range Bi-directional Series Resonant

Converter with Clamped Capacitor Voltage . . . . . . . . . . 43
3.1 The Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.1.1 Conventional Uni-directional Series Resonant Converter with Clamped
Capacitor Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.1.2 A Novel Bi-directional Series Resonant Converter with Clamped
Capacitor Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.2 The Power Stage Design and Trade off for Wide Voltage Range . . . . . 48
3.3 Problem Statement for Reverse Mode Operation and Methodology . . . . 55
3.4 Modulation Technique to Reverse Power with Low Output Voltage . . . . 59
3.5 Modulation Technique to Reverse Power with High Output Voltage . . . 63
3.6 The Generalized Modulation Strategy for Reverse Mode Power Flow Control in Wide Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . 68
3.6.1 The Look-up Table to Store Three Modulation Phase-shift Angles 68
3.6.2
3.7
3.8
The Procedure to Generate the LUT for Power Flow Reverse in

Wide Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . .
3.6.3 A LUT-based Modulator to Simplify Reverse Power Flow Control
Simulation and Experiment Validation for Reverse Mode Operation . . .
3.7.1 The Experimental Prototype . . . . . . . . . . . . . . . . . . . . .
3.7.2 Comparison of Simulation and Experiment Test Results . . . . . .
3.7.3 Simulation Results for Transient Response In Reverse Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.7.4 The Efficiency and Loss Distribution Analysis . . . . . . . . . . .
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 4 A Novel Multi-core Ultra-compact and Efficient Bi-directional

DC-DC Converter . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1 A Multi-core Bi-directional DC-DC Topology . . . . . . . . . . . . . . .
4.2 Minimizing Parasitics Inductance . . . . . . . . . . . . . . . . . . . . . .
4.2.1 Selection of Low Voltage High Current MOSFET Package . . . .
4.2.2 Minimize Layout Parasitic Inductance . . . . . . . . . . . . . . .
4.3 Transformer Design and Trade Off . . . . . . . . . . . . . . . . . . . . . .
4.3.1 High Frequency Core Material . . . . . . . . . . . . . . . . . . . .
4.3.2 Magnetizing Inductance and Core Size . . . . . . . . . . . . . . .
4.3.3 High Current PCB Winding . . . . . . . . . . . . . . . . . . . . .
4.3.4 Series Inductor Integration . . . . . . . . . . . . . . . . . . . . . .
4.4 Multi-core Architecture Optimization . . . . . . . . . . . . . . . . . . . .
4.5 Deadtime Optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.6 The Experimental Verification . . . . . . . . . . . . . . . . . . . . . . . .
4.7 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 5 Advanced Modulation Techniques to Enhance Multi-core Converter Performance . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1 The Modulation Technique to Obtain Full-load and Wide Voltage Range
ZVS for the Multi-core Topology . . . . . . . . . . . . . . . . . . . . . .
5.1.1 The Discharging Mode Operation . . . . . . . . . . . . . . . . . .
5.1.2 The Charging Mode Operation . . . . . . . . . . . . . . . . . . .
5.1.3 The Steady State Analysis of the Converter with the Proposed
Modulation Strategy . . . . . . . . . . . . . . . . . . . . . . . . .
5.1.4 Experiment test results . . . . . . . . . . . . . . . . . . . . . . . .
5.1.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 A High Resolution Digital Phase-shift Modulation Technique . . . . . . .
5.2.1 The Effective Operation Range of the Phase-shift Angle . . . . . .
5.2.2 Low Resolution Issue of Digital Phase-shift Control at Ultra-high
Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
vi
69
73
76
76
77
85
86
91
92
96
100
100
102
103
103
107
111
115
120
124
126
130
131
131
135
141
145
149
153
154
154
158
5.2.3
5.2.4
5.3
High Resolution Digital Phase-shift Modulation Scheme . . . . . .

The Gate Signal Loss Issue in Dynamic Feedback Control and the
Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2.5 Experimental Validation of High Resolution Phase-shift Scheme .
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
161
165
168
170
Chapter 6 A Novel Distributed Energy Storage Device . . . . . . . . . . 172

6.1 Conventional High Capacity Battery String . . . . . . . . . . . . . . . . . 172
6.2 Analysis on Battery String Capacity Loss Due to Cell Inconsistency . . . 177
6.3 A Novel Distributed Energy Storage Device . . . . . . . . . . . . . . . . 182
6.4 Test of the State-of-the-Art High Capacity Li-ion Batteries . . . . . . . . 186
6.5 Design of the Droop Controller for DESD Modularization . . . . . . . . . 189
6.5.1 A Droop Controller Based on the Regulated DC Output Impedance 190
6.5.2 A Droop Controller Based on the Output Current Feedback . . . 194
6.6 Experimental Test and Comparison of Two Droop Controllers . . . . . . 199
6.7 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
Chapter 7 Summary and Future Work . . . . . . . . . . . . . . . . . . . . . 203
7.1 Summary of the Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
7.2 The Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209
vii
LIST OF TABLES
Table
Table
Table
Table
2.1
2.2
2.3
2.4
Specifications for bi-directional DC-DC converters for comparison

Calculated inductor size for comparison . . . . . . . . . . . . . . .
Comparison of inductor size of Buck/Boost and three-level converter
A summary for the bi-directional DC-DC converters for energy storage applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Specifications of the bi-directional series resonant DC-DC converter

with clamped capacitor voltage . . . . . . . . . . . . . . . . . . . .
Table 3.2 The selected resonant tank parameters . . . . . . . . . . . . . . .
Table 3.3 The format of the look-up table and corresponding reversed power
Table 3.4 The required resources for LUT with different size . . . . . . . . .
20
21
28
40
Table 3.1
48
54
69
75
Table 4.1
Table 4.2
High frequency soft magnetic core materials . . . . . . . . . . . . 104

Extracted Steinmetz equation coefficients for different magnetic
core materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Table 4.3 Specifications of the multi-core based bi-directional DC-DC converter128
Table 5.1
Table 6.1
The test conditions for the multi-core based bi-directional DC-DC

converter to verify the proposed modulation technique . . . . . . . 150
The mean capacity

deviation . . . . . .
Table 6.2 The mean capacity
deviation . . . . . .
of the
. . . .
of the
. . . .
battery string
. . . . . . . .
battery string
. . . . . . . .
viii
with
. . .
with
. . .
different standard
. . . . . . . . . . . 179
different standard
. . . . . . . . . . . 180
LIST OF FIGURES
Figure 1.1
The primary energy flow by source and sector of United States in

2009 according to the U.S. Energy Information Administration . .
Figure 1.2 The energy storage options for grid applications (source: APS) .
Figure 1.3 The well-to-wheel green house gas emissions of electric vehicles
(source: EPRI-NRDC) . . . . . . . . . . . . . . . . . . . . . . . .
Figure 1.4 Future charging station architecture with DC power distribution
and renewable energy generation . . . . . . . . . . . . . . . . . . .
Figure
Figure
Figure
Figure
Figure
Figure
Figure
2.1
2.2
2.3
2.4
2.5
2.6
2.7
Figure 2.8
Figure 2.9
Figure 2.10
Figure 2.11
Figure 2.12
Figure 2.13
Figure
Figure
Figure
Figure
2.14
2.15
2.16
2.17
Figure 2.18
Figure 2.19
Figure 2.20
2
3
8
13
The bi-directional Buck/Boost DC-DC converter . . . . . . . . . 16

The bi-directional Cuk DC-DC converter . . . . . . . . . . . . . 16
The bi-directional SEPIC/Luo DC-DC converter . . . . . . . . . 17
The interleaved bi-directional Buck/Boost DC-DC converter . . . 18
The cascaded bi-directional Buck/Boost DC-DC converter . . . . 18
The three-level bi-directional DC-DC converter . . . . . . . . . . 19
Comparison of inductor RMS current in Buck/Boost, Cuk and
SEPIC/Luo converters . . . . . . . . . . . . . . . . . . . . . . . . 22
Comparison of switch current stress in Buck/Boost, Cuk and SEPIC/Luo
converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Comparison of inductor current ripple ratio in conventional PWM
and VFPWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Switching frequency dependency on battery pack voltage of VFPWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Experimentally tested converter efficiency of PWM and VFPWM
Buck/Boost converter . . . . . . . . . . . . . . . . . . . . . . . . . 25
Buck mode waveforms for three-level bi-directional DC-DC converter 26
Boost mode waveforms for three-level bi-directional DC-DC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Test waveforms of three-level DC-DC converter in Buck mode . . 27
Test waveforms of three-level DC-DC converter in Boost mode . . 28
Efficiency test results for three-level and Buck/Boost converter . 29
Bi-directional DC-DC converter based on a voltage-fed full bridge
and a current-fed full bridge . . . . . . . . . . . . . . . . . . . . . 31
and a current-fed full bridge with RCD snubber . . . . . . . . . . 31
and a current-fed full bridge with lossless snubber . . . . . . . . . 32
and a current-fed full bridge with active clamp . . . . . . . . . . . 32
ix
Figure 2.21 Bi-directional DC-DC converter based on a voltage-fed half bridge

and a current-fed full bridge with active clamp . . . . . . . . . . .
and a current-fed half bridge . . . . . . . . . . . . . . . . . . . . .
Figure 2.23 Bi-directional DC-DC converter based on two voltage-fed full bridges
and a voltage-fed full bridge . . . . . . . . . . . . . . . . . . . . .
Figure 2.25 Bi-directional DC-DC converter based on two voltage-fed half bridges
Figure 2.26 Bi-directional DC-DC converter based on two voltage-fed full bridges
and series resonant tank . . . . . . . . . . . . . . . . . . . . . . .
Figure 2.27 Topology categorization for isolated bi-directional DC-DC converter based on voltage-fed and current-fed input/output . . . . .
Figure 2.28 Major topologies for high frequency inverters which are used for
bi-directional operation . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2.29 Major topologies for high frequency rectifiers which are used for
bi-directional operation . . . . . . . . . . . . . . . . . . . . . . . .
Figure 3.1
Figure 3.2
Figure 3.3
Figure 3.4
Figure 3.5
Figure 3.6
Figure 3.7
Figure 3.8
Figure 3.9
Figure 3.10
Figure 3.11
Conventional uni-directional series resonant converter with clamped

capacitor voltage . . . . . . . . . . . . . . . . . . . . . . . . . . .
Phase-shift modulation gate signal in uni-directional operation .
Power stage of bi-directional phase-shift controlled series resonant
converter with clamped tank capacitor voltage . . . . . . . . . . .
Proposed modulation strategy based on three phase shift angles
for reverse mode operation: gate signals for 8 IGBTs . . . . . . .
Maximal output power with different resonant frequency fo , characteristic impedance Zo and equivalent resistance Re (DC-link voltage: Vdc = 750V , phase shift angle 1 = 0) . . . . . . . . . . . .
The maximal voltage of resonant capacitor with F = fs /fo : 1.10,
1.25 and 1.40 (DC-link voltage: Vdc = 750V ) . . . . . . . . . . . .
Weighted average rms current of power stage at 300V /35kW (DClink voltage: Vdc = 750V , phase shift angle 1 = 40) . . . . . . .
Output V-I characteristics and boundary (1 = 3.6) of the designed converter (input: Vdc = 750V ) and the required output region
Proposed modulation strategy based on three phase shift angles
for reverse mode operation: gate signals for 8 IGBTs . . . . . . .
Illustration of the selected numeric simulation points in the 3dimensional phase-shift modulation space . . . . . . . . . . . . . .
The specific revered power for different combinations of three modulation variables [2 , 1 , 21 ] (Vdc = 750V, Vds = 300V ) . . . . . .
32
33
34
34
35
35
37
38
38
44
45
47
47
52
53
53
55
57
58
60
Figure 3.12 The identified trajectory for reverse mode operation with low current stress of converter components for 300V output (Vdc = 750V, Vds =
300V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 3.13 The specific revered power for different combinations of three modulation variables [2 , 1 , 21 ] (Vdc = 750V, Vds = 600V ) . . . . . . 64
Figure 3.14 The identified trajectory for reverse mode operation with strategy
1 for 600V output voltage (Vdc = 750V, Vds = 600V, 1 = 144) . . 65
Figure 3.15 The identified trajectory for reverse mode operation with strategy
2 for 600V output voltage (Vdc = 750V, Vds = 600V, 21 = 36) . . 66
Figure 3.16 The calculated efficiency for the reverse mode modulation trajectories based on strategy 1 and 2 with 600V output (Vdc = 750V, Vds =
600V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 3.17 Simulated reversed power of generated trajectory at 300Vds . . . 70
Figure 3.18 Simulated reversed power of generated trajectory at 325Vds . . . 71
Figure 3.19 2 of the generated trajectories in LUT by proposed procedure in
wide output voltage range . . . . . . . . . . . . . . . . . . . . . . 71
Figure 3.20 1 of the generated trajectories in LUT by proposed procedure in
wide output voltage range . . . . . . . . . . . . . . . . . . . . . . 72
Figure 3.21 21 of the generated trajectories in LUT by proposed procedure
in wide output voltage range . . . . . . . . . . . . . . . . . . . . . 72
Figure 3.22 The diagram of the LUT based modulator . . . . . . . . . . . . . 75
Figure 3.23 The prototype of 15kW scaled-down series resonant converter with
clamped capacitor voltage to verify bi-directional operation . . . . 76
Figure 3.24 Simulation waveforms in forward mode with 300V output voltage
and 12.8kW load (1 = 84) . . . . . . . . . . . . . . . . . . . . . 78
Figure 3.25 Experiment waveforms in forward mode with 300V output voltage
and 12.8kW load (1 = 84) . . . . . . . . . . . . . . . . . . . . . 78
Figure 3.26 Simulation waveforms in forward mode with 600V output voltage
and 12.7kW load (1 = 41) . . . . . . . . . . . . . . . . . . . . . 79
Figure 3.27 Experiment waveforms in forward mode with 600V output voltage
and 12.7kW load (1 = 41) . . . . . . . . . . . . . . . . . . . . . 80
Figure 3.28 Simulation waveforms in reversed mode with 300V output voltage
and 11.6kW load (2 = 26, 1 = 125, 21 = 36) . . . . . . . . . 81
Figure 3.29 Experiment waveforms in reversed mode with 300V output voltage
and 11.6kW load (2 = 26, 1 = 125, 21 = 36) . . . . . . . . . 81
and 11.6kW load (2 = 61, 1 = 41, 21 = 36) . . . . . . . . . . 82
and 11.6kW load (2 = 61, 1 = 41, 21 = 36) . . . . . . . . . . 82
Figure 3.32 The experiment test waveforms to show ZVS operation lagging leg
(S4) in forward mode operation . . . . . . . . . . . . . . . . . . . 83
xi
Figure 3.33 The experiment test waveforms to show ZVS operation of primary
side bridge (S1 and S4) in reverse mode operation . . . . . . . . . 84
Figure 3.34 The experiment test waveforms to show ZVS operation of secondary side bridge (S5 and S8) in reverse mode operation . . . . . 84
Figure 3.35 The simulated transient response of reverse mode operation for
load change in DC-link with proposed modulation technique (Vds =300V,
Vdc =750V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Figure 3.36 The simulated transient response of reverse mode operation for
load change in DC-link with proposed modulation technique (Vds =600V,
Vdc =750V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Figure 3.37 The calculated efficiency and experiment tested efficiency in forward mode with 300V and 600V output voltage Vds (Vdc = 750V )
87
Figure 3.38 The calculated efficiency and experiment tested efficiency in reversed mode with 300V and 600V output voltage Vds (Vdc = 750V ) 88
Figure 3.39 The power loss distribution for the 15kW prototype with 300V/12.8kW
in forward mode, total loss 1264W (Vdc = 750V, Vds = 300V ) . . . 89
Figure 3.40 The power loss distribution for the 15kW prototype with 300V/11.6kW
in reverse mode, total loss 2035W (Vdc = 750V, Vds = 300V ) . . . . 89
Figure 4.1
Figure 4.2
Figure 4.3
Figure 4.4
Figure 4.5
Figure 4.6
Figure 4.7
Figure 4.8
Figure 4.9
Figure 4.10
Figure 4.11
Figure 4.12
The novel multi-core based bi-directional DC-DC converter . . . 98

The layout of one planar transformer with 2 low voltage winding
and 2 full bridges in low voltage side . . . . . . . . . . . . . . . . 103
The magnetizing current, core loss and volume with different Bac
based on 3F35 materials and EQ core series . . . . . . . . . . . . 108
The layout area for the low voltage side with different core sizes
and correspondint Bac . . . . . . . . . . . . . . . . . . . . . . . . 109
Tested magnetizing loss with different core material for one EQ30
core size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
The current distribution of the transformer based on 2D FEA simulation results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
The current distribution in PCB windings based on 2D FEA simulation results at 500kHz . . . . . . . . . . . . . . . . . . . . . . . 112
The winding AC resistance accounting for skin and proximity effects based on 2D FEA simulation . . . . . . . . . . . . . . . . . . 113
The winding AC resistance at 500kHz with different PCB track
thickness based on 2D FEA simulation . . . . . . . . . . . . . . . 114
Insert of the FPC film layers increases the leakage flux between
primary and secondary windings . . . . . . . . . . . . . . . . . . . 115
The required leakage inductance with different switching frequency
based on multi-core bi-directional DC-DC converter configuration 116
The construction of the planar transformer with integrated inductor118
xii
Figure 4.13 The test results of the controlled leakage inductance with FPC
film layers (referred to the high voltage winding side) . . . . . . .
Figure 4.14 The calculated low voltage side power loss and the distribution
with different number of full bridges . . . . . . . . . . . . . . . . .
Figure 4.15 The single LV side MOSFET loss and the thermal limit . . . . .
Figure 4.16 The power density of the multi-core based bi-directional DC-DC
converter with different number of LV side full bridges . . . . . .
Figure 4.17 Optimization of the number of low voltage side full bridges based
on the defined FOM . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 4.18 The gate signals of one bridge leg and AC port output of the full
bridge in low voltage side with large deadtime . . . . . . . . . . .
Figure 4.19 The no load loss of one full bridge in low voltage side with different
deadtime settings . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 4.20 The gate signals of one bridge leg and AC port output of the full
bridge in low voltage side with optimal deadtime . . . . . . . . . .
Figure 4.21 The prototype of the multi-core based bi-directional DC-DC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 4.22 The tested charging mode waveforms at full load . . . . . . . . .
Figure 4.23 The tested efficiency curve for charging mode . . . . . . . . . . .
Figure 5.1
Figure 5.2
Figure 5.3
Figure 5.4
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
5.5
5.6
5.7
5.8
5.9
5.10
5.11
5.12
Figure 5.13
Figure 5.14
Figure 5.15
119
120
121
122
123
124
125
126
127
128
129
The conventional dual-active-bridge (DAB) bi-directional DC-DC

converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
The multi-core based high voltage gain bidirectional DC-DC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
The simplified multi-core based high voltage gain bi-directional
DC-DC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
The discharging mode operation waveforms of the proposed modulation technique . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
The discharging mode operation interval t0 - t1 . . . . . . . . . . 137
The charging mode operation waveforms of the proposed modulation technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
The optimum modulation index m to minimize Rpq . . . . . . . . 147
The ratio of the output power to reactive power and low voltage
side ZVS region . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Test waveforms of the prototype with d = 1.28, m = 0.665, = 15 150
xiii
Figure 5.16 Test waveforms of the prototype with d = 1.28, m = 0.665, = 0

(no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 5.17 Test waveforms of ZVS for HV side MOSFET S1 at no load . . .
Figure 5.18 Test waveforms of ZVS for LV side MOSFETs S41 and S42 at no
load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 5.19 The efficiency test results for the proposed modulation technique
Figure 5.20 The single-angle phase-shift modulation technique for multi-core
converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 5.21 The dual-angle phase-shift modulation technique for multi-core
converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 5.22 The ratio of Q to P with single-angle phase-shift technique . . . .
Figure 5.23 Phase-shift modulation signal generated by ePWM module from
TMS320F28335 . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 5.24 The resolution of digital phase-shift modulation with ePWM modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 5.25 The high resolution digital phase-shift modulation scheme . . . .
Figure 5.26 The clock generated with micro-edge positioning (MEP) for high
resolution phase-shift modulation . . . . . . . . . . . . . . . . . .
Figure 5.27 The improvement of the resolution with the proposed high resolution phase-shift modulation scheme . . . . . . . . . . . . . . . . .
Figure 5.28 The loss of the low voltage side gate signal in dynamic feedback
control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 5.29 The tested waveforms for Vgs41 and Vgs51 loss in dynamic feedback
control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 5.30 The tested waveforms for Vgs31 and Vgs61 loss in dynamic feedback
control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 5.31 The improved high resolution phase-shift modulation scheme to
avoid gate signal loss in dynamic feedback control . . . . . . . . .
Figure 5.32 The experimental test results for the proposed high resolution
phase-shift modulation scheme . . . . . . . . . . . . . . . . . . . .
Figure 5.33 The experimental test results of transient response of the proposed
high resolution phase-shift modulation scheme . . . . . . . . . . .
Figure 6.1
Figure
Figure
Figure
Figure
Figure
6.2
6.3
6.4
6.5
6.6
Conventional battery energy storage system with bi-directional

DC-DC, voltage equalizer and BMS . . . . . . . . . . . . . . . . .
Conventional dissipative battery cell equalizer . . . . . . . . . . .
Battery cell equalizer based on switched capacitor . . . . . . . .
Battery cell equalizer based on DC-DC converters . . . . . . . . .
Battery cell equalizer based on magnetic coupling . . . . . . . . .
The mean capacity of the battery string with different standard
deviation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
xiv
151
152
152
153
155
155
157
159
161
162
163
164
165
166
167
167
169
169
173
174
175
175
176
180
Figure 6.7
Figure 6.8
Figure 6.9
Figure 6.10
Figure 6.11
Figure 6.12
Figure 6.13
Figure 6.14
Figure 6.15
Figure 6.16
Figure 6.17
Figure 6.18
Figure 6.19
Figure 6.20
Figure 6.21
Figure 6.22
Figure 6.23
Figure 6.24
Figure 6.25
Figure 6.26
Figure 6.27
The mean capacity of the battery string with different percentage

of variation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
The probability density function of the cell capacity and string
capacity (c = 100Ah, c = 3.33Ah, N = 100) . . . . . . . . . . . . 181
Proposed paralleled modular DESD with high-density high-efficiency
DC-DC converters . . . . . . . . . . . . . . . . . . . . . . . . . . 183
Advanced battery pack with DESD modules . . . . . . . . . . . . 185
The Arbin BT2000 Battery Test System (left) and commercial
100Ah LiFePO4 Batteries (right) . . . . . . . . . . . . . . . . . . 186
The 0.2C constant current (CC) and constant voltage (CV) charging test profile for 100Ah Li-ion battery . . . . . . . . . . . . . . . 187
The charge capacity with 0.2C CC-CV charging for 100Ah Li-ion
battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
The 0.2C constant current (CC) discharging test profile for 100Ah
Li-ion battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
The DC droop control for DESD module current share . . . . . . 189
The diagram for the droop regulator based on the controlled output impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
The converter small-signal transfer function from to Vd and the
loop gain T after compensation . . . . . . . . . . . . . . . . . . . 191
The converter output impedance with and without the compensation191
The simulation results of the droop controller design . . . . . . . 194
The diagram for the droop controller based on the output current
feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195
The bode plots for the inner voltage loop compensation with a PI
controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196
The stability of the inner voltage loop with a PI controller . . . . 196
The transient response for the droop controller based on output
current feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197
The multi-core based high voltage gain bi-directional DC-DC converter prototype . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199
The test results of the droop controller with method 1 when the
module output load changes . . . . . . . . . . . . . . . . . . . . . 200
The test results of the droop controller with method 2 when the
module output load changes . . . . . . . . . . . . . . . . . . . . . 200
The test results of the two droop controllers for the steady state
output V-I characteristic . . . . . . . . . . . . . . . . . . . . . . . 201
xv
Chapter 1
Introduction
Electric power and transportation industries are two major sources for primary energy
consumption on Earth. For example, according to the United States Energy Information
Administration, the primary energy flow by source and sector in 2009 is shown in Fig.
1.1 [1]. The total energy consumption of United States in 2009 is 27.7 trillion kilowatt
hours (kWh), with about 11.2 trillion kWh or about 40% in the electric power sector
and about 7.9 trillion kWh or about 29% in the transportation sector. For the electric
power sector, 48% of the supply source is from coal and 18% from natural gas. The
renewable energy source contributes 11%. For transportation sector, 94% of the supply
source is from petroleum and only 3% is from renewable energy. 72% of petroleum is
used for transportation sector and about 63% of crude oil relies on import for United
States in 2009 [1]. The majority of energy sources such as petroleum, natural gas, coal
are nonrenewable or not environment-friendly. The associated energy shortage, green
house gas emission and energy security issues are well known.
To address these issues, integrating renewable energy resources on the grid and transportation electrification are two potential solutions. In both applications, energy storage
Unit for supply sources and demand sectors: Quadrillion BTU

Note: 1 BTU (British thermal unit)=1055.06 J =0.293071 Wh, 1 Quadrillion (1015) BTU=0.293071 Trillion (1012) kWh
Figure 1.1: The primary energy flow by source and sector of United States in 2009
according to the U.S. Energy Information Administration
devices are important component of the renewable energy generation systems and electric
vehicle systems.
1.1
Energy Storage for Grid Applications
It is well known that greater utilization of renewable energy resources can help mitigate the issues with fossil fuels. However, due to the intermittent nature of the renewable
energy resources such as wind and solar energy, there is difficulty with higher penetration
of renewable energy generation in todays grid. According to [2], one major challenge to
the wide spread adoption of renewable energy is the ability to store and control the wide
variety of different energy resources. The electric distribution grid of the future must
address the issues of storage and complex control. To achieve the goal of greater utilization of renewable energy sources, both large-scale centralized installations and wide-scale
distributed renewable energy generation are helpful. The energy storage systems can be
used to complement renewable energy resources in order to optimize energy use.
Figure 1.2: The energy storage options for grid applications (source: APS)
Fig. 1.2 shows different options for the utility level energy storage approaches, such as
batteries with different chemistry, supercapacitors, flywheels, superconducting magnetic
energy storage (SMES), compressed air energy storage (CAES), pumped hydro and so on.
They are categorized based on the power level, discharging time and the functionalities
[3]. The scope of this dissertation focuses on the battery and supercapacitor energy
storage system, and more specific, the Li-ion battery energy storage system.
Todays photovoltaic (PV) generators are designed to extract maximum power from
PV panels and inject the generated electric energy to the grid. In some countries, government aid such as feed-in tariff stimulates numerous individual installations of 5kW
photovoltaic (PV) generators on the roofs of private homes. The recent draft act on the
renewable energy sources guarantees the highest tariffs in the case of self consumption.
Large-scale installations of grid-connected PV systems may cause large fluctuations of
the power, frequency and voltage of the grid due to the stochastic nature of PV power.
Active distributed generators, for example, the combined distributed renewable energy
resources (DRERs) and distributed energy storage devices (DESDs), have the potential to
provide ancillary services such as peak shaving, emergency power supply, frequency and
voltage control based on the regulated real and reactive power injection from PV generators. A hybrid generator with a photovoltaic energy conversion system is proposed with
supercapacitors and lead-acid batteries coupled to a DC structure through bi-directional
DC-DC converters in [4], which supplies real and reactive power to the grid. Supercapacitors are used to avoid frequent charge and discharge of batteries and to extend battery
life. Batteries are used for long-term supply of energy and supercapacitors lead to fast
dynamic regulation of power. One way to improve the rate of self-consumption for a
PV generator, is the application of storage technology. A 5kW photovoltaic system with
Li-ion battery energy storage system is proposed in [5], which allows for a temporary
decoupling of generation and injection. A bi-directional DC-DC converter connected a
5-7kWh Li-ion battery pack with the voltage range from 168V to 336V to the 600V-680V
DC link of the system. In [6] a short-term supercapacitor based energy storage system
helps to improve the efficiency of the maximum power point tracking (MPPT) control by
quickly reaching the maximum output power determined by the solar radiation at that
time and high-speed energy storage means.
Wind turbine generators are typically controlled to generate maximum power from
wind under normal operating conditions. Due to the low penetration of wind turbines,
they are not required to participate in automatic generation control or frequency reg-
ulation. With advancements in wind turbine technologies, the cost of wind energy is
becoming competitive with traditional fossil fuel energy resources. Many countries have
set goals for high penetration levels of wind generation, for example, about 20% by 2030.
As wind energy continues to grow worldwide and wind turbine generators reach higher
penetration levels, there is also a greater requirement to manage the intermittency associated with individual turbines. Due to its intermittent and partly unpredictable nature,
wind power introduces some uncertainty into operating a power grid, for example, wind
energy may not be available when electricity is needed. The intermittency of wind resources can cause high rates of power change which is a critical issue to balance the power
system. In addition, it is also desired to participate the economic dispatch. To enable a
proper management of the uncertainty, reference [7] presents an approach to make wind
power become a more reliable source on both energy and capacity by using battery energy
storage devices. The integration of the energy storage system and wind turbine to reduce
the uncertainty of wind generation will enhance the grid reliability and security. The supercapacitor based short-term energy storage devices are used in wind turbine generators
in order to improve their performance. In [8], a supercapacitor energy storage system is
connected to the DC bus of a back-to-back converter for a double-fed induction generator
(DFIG) to smooth the fast wind-induced power variations. The energy storage system
also improves turbine performance for low voltage ride through (LVRT) by dumping the
energy into supercapacitors and maintaining a relatively constant DC-bus voltage during
extreme grid voltage disturbance. In [9], a two-layer constant power control scheme for
a wind farm equipped with doubly fed induction generator (DFIG) wind turbines with
each turbine equipped with a supercapacitor energy storage system. The active power
output of the wind turbine is controlled and the deviations between the available wind
energy input and desired active power output are compensated by the energy storage
system. In [10], a combined fuel cells and electrolyzers with hydrogen tanks, a supercapacitor energy storage system are used as low-dynamic long term energy storage and
fast-dynamic short term energy storage devices respectively for a wind turbine generator
to compensate or absorb the difference between the generated wind power and the required grid power. A flow-battery-supercapacitor hybrid energy storage system (ESS) is
integrated with a permanent-magnet synchronous machine (PMSM) wind turbine generator (WTG) in [11] to reduce the wind power fluctuations. A two-level hybrid ESS
consists of a vanadium redox flow battery and a supercapacitor as the short-term ESS
which is used in a wind-diesel system as described in [12].
There is also increasing interest in the use of hydrogen as an energy carrier. A fuel
cell (FC) is a renewable electrochemical device which directly and efficiently combines
hydrogen fuel and air as a means to supply clean energy. It can be used in an onboard energy storage system for electric vehicles or in a stationary power generation
system. The only residue is water. However, there are several challenges for FCs such
as low power density, low dynamic response, reliability and durability, cost and mass
production, long start-up time, hydrogen storage, etc. Also frequent short-term cycles
of high peak power lead to faster irreversible cell degradation. A high power density
energy storage device such as battery or supercapacitor is used for transient power in the
hybrid fuel cell and battery/supercapacitor power source. The battery or supercapacitor
auxiliary sources provide fast power response. A parallel structure of hybrid fuel cell
and supercapacitor power source with a single bi-directional DC-DC converter connected
between the supercapacitor and the DC-link is proposed in [13] as a result of trade off
between cost and power loss of the power management system. A cascaded configuration
is presented in [14] where the battery and the supercapacitor module are cascaded using a
bi-directional converter and are parallel to the terminal of the fuel cell in order to provide
the load directly. Advantages and disadvantages of different structures of the hybrid fuel
cell and battery power source are compared and a systematic approach to designing
the hybrid power system with a four-mode power management strategy is presented in
[15]. In [16], a combined fuel cell, battery and ultracapacitor system with three-port
DC-DC converter is proposed with a power management strategy to achieve maximum
fuel economy with light energy storage system (ESS) mass and high system efficiency.
Reference [17] describes the configuration, modeling and control of a FC-battery-powered
hybrid system for a surface tramway. Other bi-directional DC-DC converter topologies
and control techniques for fuel cell and battery/supercapacitor hybrid power source are
proposed in [18], [19] and [20].
1.2
Energy Storage for Electric Vehicle Applications
Currently about 62% of crude oil used in United States is refined into gasoline for
transportation. Transportation electrification is important to mitigate the associated
energy security and green house gas (GHG) emission problems [21]. In order to satisfy the
growing expectation for energy-efficient eco-friendly transportation, a number of vehicle
concepts have emerged, including the hybrid electric vehicle (HEV) and plug-in hybrid
electric vehicle (PHEV). Hybrid electric vehicle (HEV) is one of the solutions to address
the energy security and GHG emission issues, because fuel economy has been improved
by optimizing internal combustion engine (ICE) efficiency, regenerating brake energy
and shutting down ICE during the idle time. Since more than one million HEVs are
already driven on the road today, there is a growing interest in plug-in hybrid electric
vehicles (PHEV), which are defined by IEEE-USAs Energy Policy Committee as (1) a
battery storage system of 4kWh or more, used to power the motion of the vehicle, (2)
a means of recharging that battery system from an external source of electricity, and
(3) an ability to drive at least 10 miles in all-electric mode, consuming no gasoline [22].
PHEV can be powered by electricity from various sources, including renewable energy
resources, and benefits from lower fuel (electricity) cost. Greenhouse gas emission such
as CO2 is expected to be reduced significantly with higher PHEV penetration due to
much lower petroleum consumption for daily commuters who mainly drive PHEVs in
all-electric mode. Major automakers launched the first models in a new generation of
PHEVs in 2010. Several global and U.S. market research reports [23][24] indicate there
will be a rapid growth of PHEV sales. Reference [24] forecasts that PHEVs will follow a
similar adoption pattern as that of HEVs over the past few years, and by 2015, a total
of 1.7 million PHEVs will be on the road worldwide.
Figure 1.3: The well-to-wheel green house gas emissions of electric vehicles (source:
EPRI-NRDC)
Fig. 1.3 shows a comparison of green house gas emission for the typical conven-
tional car, the hybrid electric vehicle (HEV) and plug-in hybrid electric vehicle (PHEV)
refueled with different electricity sources, according to EPRI-NRDC. Both HEVs and
PHEVs reduce the green house gas emission for transportation industry. PHEVs refueled with combined-cycle natural-gas-fired power plant, nuclear and renewable electricity
can further reduce CO2 emission compared to conventional HEVs [25].
Fuel efficient hybrid, plug-in hybrid, fuel cell and battery electric vehicles can be
designed with on-board batteries and/or supercapacitors energy storage system [26]. The
on-board battery energy storage system with bi-directional DC-DC converter is a key
component for electric vehicles [27][28]. A super capacitor and battery modeling with an
original energy management strategy in a hybrid storage technology is proposed in [29],
where the supercapacitors are dimensioned for peak power requirement and batteries
provide the power in steady state. Reference [30] presents system integration and powerflow management algorithms for a four-wheel-driven series hybrid electric vehicle having
multiple power sources composed of a diesel-engine-based generator, lead acid battery
pack, and supercapacitor bank. In [31] an auxiliary energy system for electric vehicles was
designed, implemented and tested. The system is composed of an ultra-capacitor bank
and a buck-boost converter and the electric vehicle is powered by a lead-acid battery
pack and a 54-kW brushless DC motor. A low-cost DC-DC converter was proposed
for connecting 14V, 42V and high voltage nets in future hybrid and fuel cell vehicles
[32]. The converter minimizes the number of switches and their associated gate driver
components. The on-board supercapacitor energy storage systems are also used in an
innovative subway [33], and in hybrid excavator to reduce the fuel cost by 24% [34].
Since the electric vehicles require the use of batteries with high energy storage capacity
and with large electric load charging requirements, a large deployment of this concept
will provoke considerable impacts in electric power system design and operation, but will
also enable and benefit the usage of nonpollutant energy resources. When PHEVs or
EVs are parked and plugged into the electric grid, they will absorb the energy and store
it in the on-board energy storage system, being also able to deliver electricity back to the
grid. The latter is the distinctive feature of the vehicle-to-grid (V2G) concept, allowing
the provision of several ancillary services like peak power and spinning reserves [35]. In
order to be able to provide these services, each PHEV or EV must have bi-directional
power electronic interface for grid connection.
Currently major PHEVs are designed for an all-electric range of several tens of miles
to meet daily commute requirements, due to the high cost of on-board battery energy
storage system. An on-board charger is usually employed for slow overnight charging
in the home garage. However, as battery capacity and all-electric range of PHEVs are
improved, and some PHEVs or EVs in the near future are able to accept fast charging
to extend all-electric drive range, there is an increased requirement to build off-board
charge station infrastructures [36][37]. In this application, the bi-directional DC-DC
converter is required to absorb electric energy from the grid and charge vehicle battery
packs to reduce gasoline refueling. On the other hand, mass PHEVs can potentially
serve as energy storage devices with their high capacity batteries for utility grid or a
micro-grid, which require energy storage to smooth the intermittent power generated
from distributed renewable energy sources such as wind and photovoltaic (PV) power
generation [38][39][40]. The bi-directional DC-DC converters are able to extract energy
from batteries and feeding it back to DC link or grid. In addition, in high voltage
battery energy storage systems, battery string voltage varies in a very wide range based
on packages, types of batteries, or state of charge. It is important for the bi-directional
DC-DC converters to maintain high efficiency in a wide voltage range.
The off-board DC charging infrastructure attracts more attention recently, which can
10
charge PHEVs and EVs quickly, extend their all-electric range, and potentially help
increase the penetration of electric vehicles. The DC chargers can be integrated into a
DC micro-grid. There are several motivations for building the PHEV/EV DC charging
station infrastructure. First, most PHEVs today use single-phase on-board charger to
refuel their batteries, which is a common practice for both converted PHEVs and several
that will soon be commercialized. On-board chargers can either use an independent power
converter, or leverage the power stage of drive train and motor inductance [41]. The power
rating of on-board charger is low, limited to the current rating of wall plugs. For example,
120V/12A (Level I) or 240V/32A (Level II) single-phase AC input according to SAEJ1772, and so it is suited for slow overnight recharging. However, with the advancement
of battery technology, the energy density and power density of battery packs are improved
and battery cost decreases, there is a desire for more on-board battery capacity making
possible greater all-electric range and less gasoline consumption for future PHEVs or EVs.
Therefore there will be a trend to install large high-power off-board charging stations in
addition to the compact low power on-board chargers.
The second motivation to build this charging station infrastructure is to use a DC
link to interface with distributed renewable power generation, which can be considered
as a DC microgrid. With high penetration of PHEVs, it is necessary to install new
power generation capacity. For municipal parking deck applications, it is quite possible
that PHEVs will be charged during daytime and refueled with peak power electricity.
Distributed renewable power generation can potentially provide a solution for this issue
because it will not only reduce the power demand from the grid during peak time, or even
inject real power back to support the grid, but also recharge PHEV battery packs with
green energy sources making the transportation industry cleaner. The charge station
can install its own solar power generation, fuel cell power generation and wind turbines
11
[38][40]. For example, PV panels generate power during daytime and can reduce the
power demand from grid during peak load time. In addition, there is less safety or noise
concern installing PV in municipal parking decks. On the other hand, vehicle to grid
(V2G) operation provides a potential solution of using PHEV batteries as energy storage
devices for high penetration of distributed wind and solar power generation and smoothes
their intermittent power [40].
The third motivation is to fast charge a PHEV/EV battery pack. In order to improve
the all-electric range of PHEVs and EVs, one will either increase the on-board battery
capacity or recharge the battery pack in a very short time at a fast charging station.
However, all-electric range will be eventually limited by battery capacity due to the size
and weight as well as the cost of batteries. Therefore, high power fast charging will
eventually solve EV range problem by recharging its battery in 5 to 15 minutes, similar
to what people do in todays gasoline station, as long as the battery packs are capable
of accepting high rate charging current.
One proposed architecture of a DC charging station at municipal parking deck is
shown in Fig. 1.4 [42]. Compared to discrete AC-DC and DC-DC chargers, the proposed
charge station uses about 750V DC distribution bus with one high power three-phase ACDC converter as grid interface. This architecture has several advantages. The specific cost
of high power AC-DC stage is lower than that of discrete low power AC-DC converters
in conventional AC power distribution grid. The three-phase rectifier is rated for average
power rather than peak power if ultra capacitor energy storage is installed to filter the
ripple power. The DC distribution grid makes it easy and efficient to integrate distributed
renewable power generations such as wind, PV, fuel cells and other energy storage devices.
The power of each DC-DC channel can be rated for normal slow charge rating to minimize
cost. On the other hand, the parallel of several DC-DC stages provides a high power fast
12
Fuel Cell
Stacks
Distributed
Renewable
Generations
At Parking
Deck
Zigbee
Communication
...
AC-DC
Converter
Three-phase
Rectifier /
Inverter
To
Grid
iEMS
Zigbee
Communication
Bidirectional
DC-DC
Converter
Bidirectional
DC-DC
Converter
DC-DC
Converter
DC-DC
Converter
DC-link +
DC-link -
Bidirectional
DC-DC
Converter
Bidirectional
DC-DC
Converter
Bidirectional
DC-DC
Converter
Bidirectional
DC-DC
Converter
Bidirectional
DC-DC
Converter
Fast Charge Port
Ultra
Capacitor
Storage
...
Normal
Charge
Port
Zigbee
Communication
PHEV/EV
PHEV/EV
PHEV/EV
PHEV/EV
PHEV/EV
PHEV/EV
Figure 1.4: Future charging station architecture with DC power distribution and renewable energy generation
charging channel, assuming that only a small portion of PHEVs will require this service.
With bi-directional DC-DC converters, energy stored in PHEV batteries can be fed back
to grid, which is called V2G operation. An intelligent energy management system (iEMS)
with wireless communication platform can coordinate system operation [43]. The charge
station can provide several grid support functions such as reactive power injection, peak
power generation, harmonic current filter, and load balance [44].
1.3
The Scope of the Work
In summary, battery and supercapacitor energy storage systems become increasingly

important for renewable energy generation and transportation electrification, as well as
for smart grid and micro-grid technology. Bi-directional converters, such as the power
13
electronic interface between the battery/supercapacitor and the system, have a vital role
in improving the performance of energy storage systems.
The scope of this work focuses on the advanced bi-directional DC-DC converter
topologies, modulation techniques, design optimization, control and integration with
Li-ion battery packs for energy storage systems. These technologies lead to improved
performance of the bi-directional converters for battery energy storage systems. The applications of these energy storage systems are targeted for renewable energy generation
systems, electric vehicle systems and their DC charging infrastructure, and micro-grid
systems.
14
Chapter 2
Review and Evaluation of
Bi-directional DC-DC Converters
for Energy Storage Applications
2.1
Basic Non-isolated Bi-directional Converters
Non-isolated bi-directional DC-DC converters have the advantages of simple structure,

high efficiency, low cost, high reliability, etc. Several non-isolated bi-directional DC-DC
converters are reported in the literatures [45][46][47][48]. They can be categorized into
basic topologies such as Buck/Boost converter, Cuk converter, SEPIC/Luo converter and
derived topologies such as the interleaved half-bridge converter, the cascaded half-bridge
converter and the three-level converter. The simplest and most widely used topology
is Buck/Boost converter [45], as shown in Fig. 2.1. Typically the low voltage side is
connected to the terminals of energy storage devices and Vds is the terminal voltage of a
battery or super capacitor string. The high voltage side is connected to a DC bus and
15
Vdc is the DC-link voltage. The converter operates in charging mode by turning off the
gate signal of S2 and modulating S1 in the pulse width modulation (PWM) manner. It
operates in discharging mode by turning off the gate signal of S1 and modulating S2 in
PWM manner.
Vdc
Vds
Figure 2.1: The bi-directional Buck/Boost DC-DC converter
Fig. 2.2 shows a bi-directional Cuk DC-DC converter and Fig. 2.3 shows a bidirectional SEPIC/Luo converter. Both Cuk and SEPIC/Luo converters can transfer
power bi-directionally by using two active switches S1 and S2.
Vds
Vdc
Figure 2.2: The bi-directional Cuk DC-DC converter
16
Vds
Vdc
Figure 2.3: The bi-directional SEPIC/Luo DC-DC converter
2.2
Derived Non-isolated Bi-directional Converters
There are several non-isolated bi-directional DC-DC converters which can be considered as the derived topologies from the basic non-isolated bi-directional DC-DC converters. A widely used non-isolated bi-directional DC-DC converter is interleaved Buck/Boost
converter which can be considered to be derived from the basic bi-directional Buck/Boost
converter. A two-phase interleaved Buck/Boost converter is shown in Fig. 2.4, while the
number of interleaved phases is not limited to 2. In the two-phase interleaved converter,
there is 180 phase shift between the gate signal of S1 and S3 in charging mode, and
between the gate signal of S2 and S4 in discharging mode. When N phases are used,
the phase shift among the gate signals is 180/N . The interleaved Buck/Boost converter
is typically used in high current applications. The output current ripple can be reduced
due to the interleaving, or a smaller inductor can be used and faster dynamic responses
can be achieved.
Another derived bi-directional DC-DC converter is the cascaded Buck/Boost converter, as shown in Fig. 2.5. The advantage of the bi-directional cascaded Buck/Boost
converter is that Vds is not necessarily to be smaller than Vdc . It is generally used in the
17
Vdc
Vds
Figure 2.4: The interleaved bi-directional Buck/Boost DC-DC converter
scenario where the voltage on one side is either lower or higher than the voltage on the
other side. The cascaded Buck/Boost converter provides more freedoms to modulate the
switches and improve the converter performance [49].
Vdc
Vds
Figure 2.5: The cascaded bi-directional Buck/Boost DC-DC converter
Another category of derived bi-directional DC-DC converter is the multi-level converter. For example, three-level converters have been proposed for high DC-link voltage
applications [50][51][52]. Three-level converters are characterized by low switch voltage
stress and smaller energy storage devices such as inductor and capacitor. Topologies
of three-level converter can be categorized into Neutral Point Clamped (NPC), Flying
18
Capacitor and Diode Clamped converter, etc. The topology of a neutral point clamped
three-level bi-directional converter is shown in Fig. 2.6.
Vdc/2
Vdc
Vds
Vdc/2
Figure 2.6: The three-level bi-directional DC-DC converter
2.3
Performance of Non-isolated Bi-directional DCDC Converters in Battery Energy Storage Applications
The performance of the non-isolated bi-directional DC-DC converters is evaluated for

high power energy storage applications in this section. Since the interleaved, the cascaded
Buck/Boost converters and the three-level converter can be considered as the derived
topologies from the basic non-isolated bi-directional Buck/Boost converter consisting of
a half bridge, their performance can be evaluated with good understanding and test data
based on the performance of basic Buck/Boost converter. Therefore, the half bridge,
19
Cuk and SEPIC/Luo converters are compared based on an example specification of bidirectional DC-DC converters for energy storage applications.
2.3.1
Performance of Buck/Boost, Cuk and SEPIC/Luo Converters
The example specifications for comparison of basic non-isolated bi-directional DC-DC

converter performance in a battery energy storage system are listed in Table 2.1. The
power rating is 10kW. The high voltage DC link is 750V and battery side voltage ranges
widely from 180-360V. The switching frequency selected for comparison is 20kHz. For
all three basic topologies shown from Fig. 2.1 to Fig. 2.3, the battery is connected to C1
through a common mode choke and ground fault interrupter (GFI) to limit the leakage
current. C2 is connected to DC link side. The battery string voltage is Vds and the
DC-link voltage is Vdc . When bi-directional DC-DC converters work in charging mode,
the ratio of output voltage Vo to input voltage Vin is lower than 1; when they work in
discharging mode, the ratio of Vo to Vin is larger than 1.
Table 2.1: Specifications for bi-directional DC-DC converters for comparison

Rated Power
DC-link Voltage
Battery String Voltage
Maximal Inductor Current Ripple
Switching Frequency
10kW
750V
180V-360V
30% (peak to peak)
20kHz
The inductor size is calculated based on 20kHz switching frequency and 30% maximal
20
inductor current ripple which is referred to the inductor DC current. The calculated
inductor size for Buck/Boost, Cuk and SEPIC/Luo converters is listed in Table 2.2. It
can be found that Cuk and SEPIC/Luo converter use two larger inductors and one more
capacitor with high current ripple compared with Buck/Boost half bridge converter.
Table 2.2: Calculated inductor size for comparison
L1(mH)
L2(mH)
Buck/Boost Cuk SEPIC/Luo

1.12
1.46
1.46
3.04
3.04
The inductor RMS current and switch current stress are shown in Fig. 2.7 and
2.8 respectively. From Fig. 2.7, the RMS current in inductor L1 is similar for all three
topologies, but inductor L2 in Cuk and SEPIC/Luo converters consume additional power,
although the current stress is much lower than that in L1. From Fig. 2.8, the current
stress for active switches and diodes in Cuk and SEPIC/Luo converter are higher than
that in Buck/Boost or Half Bridge converter under same input/output voltage and power
conditions. Therefore, the Buck/Boost converter is expected to be more efficient and
it also has less number of inductor and capacitors. Buck/Boost converter is a better
candidate in this scenario.
The battery side voltage can change in wide range from 180V to 360V (2:1). When
battery pack voltage is high, the efficiency of Buck/Boost converter is better because the
current stress for inductor L1 and switches is low. However, if battery side voltage is low
and constant power (10kW) charging or discharging is assumed to be required in some
applications, current stress in converter increases greatly and efficiency drops quickly. It
21
Figure 2.7: Comparison of inductor RMS current in Buck/Boost, Cuk and SEPIC/Luo
converters
is even worse with low power conversion efficiency in low battery voltage range because
during the charging or discharging process the major portion of electrons is exchanged
with battery in lower voltage range. This means that a large portion of energy is delivered
to battery pack with low efficiency.
2.3.2
Buck/Boost Converter Efficiency Improvement
The decline of efficiency in low battery string voltage range is a major problem for the
bi-directional Buck/Boost converter in energy storage applications, since the terminal
voltage of battery string or super capacitor string varies in a wide voltage range. This
problem can be mitigated by a variable frequency pulse width modulation (VFPWM)
scheme to improve the efficiency in low voltage range.
Fig. 2.9 shows the inductor current ripple ratio, which is referred to the DC current of
the inductor L1, in the wide battery string voltage range at constant full power (10kW). If
the switching frequency is fixed at 20kHz, in low battery voltage range the current ripple
22
Figure 2.8: Comparison of switch current stress in Buck/Boost, Cuk and SEPIC/Luo
converters
ratio is reduced by about half and much lower than the specified maximal 30% current
ripple ratio. This is not necessary because there is little benefit, and current stress of the
output capacitor is very low because only the inductor ripple current (instead of pulse
current) is injected into capacitor C1. Instead, maintaining a constant inductor current
ripple ratio of 30% in full voltage range at 10kW allows lower switching frequency in lower
battery voltage range, which helps to reduce the switching loss and improve efficiency of
Buck/Boost converter in wide voltage range. The switching frequency is dependent on
battery string voltage in VFPWM scheme and is shown in Fig. 2.10. The absolute value
of the inductor ripple current will increase due to the reduced switching frequency in
lower voltage range. Since the inductor ripple current is filtered by battery side capacitor
C1, the increased ripple current will have little adverse impact on the battery pack.
The experiment setup is built to test the efficiency of conventional fixed frequency
(20kHz) PWM and the proposed VFPWM Buck/Boost converter. Two 1200V/300A
IGBTs APTGF300A120G are used in the Buck/Boost converter prototype and inductor
value is L1 = 1.12mH. The DC choke is built with KoolMu magnetic core material
23
Figure 2.9: Comparison of inductor current ripple ratio in conventional PWM and VFPWM
Figure 2.10: Switching frequency dependency on battery pack voltage of VFPWM
with distributed air gaps. Two pairs of 00K145LE E-E cores are used and the relative
core permeability is 26. DC-link voltage is 750V. The experimentally tested efficiency
in wide battery side voltage range from 180V to 360V at full load 10kW is shown in
Fig. 2.11. The efficiency curves for bi-directional operation, charging or Buck mode,
and discharging or Boost mode, are provided. Full load efficiency is more important
because most of the energy injected into battery pack is during large current and high
power charging stage. Experiment result shows that the efficiency of Buck/Boost half
24
Figure 2.11: Experimentally tested converter efficiency of PWM and VFPWM

Buck/Boost converter
bridge converter in both Buck/Charge mode and Boost/Discharge mode is improved by

1-2.5% with the proposed VFPWM scheme in lower battery voltage range, compared to
conventional PWM scheme with fixed switching frequency.
2.4
Performance of the Derived Non-isolated Bidirectional Converters in Battery Energy Storage

Applications
Three derived non-isolated bi-directional DC-DC converters, such as the interleaved

Buck/Boost converter, the cascaded Buck/Boost converter and the three-level converter
[50][51][53][54], are shown in Fig. 2.4-2.6. Since the interleaved and cascaded Buck/Boost
converters are directly derived from basic Buck/Boost converter, only the performance
of the three-level converter is evaluated in this section.
The topology of a neutral point clamped three-level bi-directional converter is shown
25
in Fig. 2.6. The operation waveforms of this three-level (TL) bi-directional DC-DC
converter for Buck or charging mode, and Boost or discharging mode are shown in Fig.
2.12 and Fig. 2.13, respectively.
Figure 2.12: Buck mode waveforms for three-level bi-directional DC-DC converter
To meet the specifications which are listed in Table 2.1, parameters of three-level
(TL) converter are listed in Table 2.3 and compared to basic Buck/Boost converter as
well. It can be found that the inductor size of the three-level converter is approximately
only one third of that of Buck/Boost converter.
A 10kW experiment prototype was built to evaluate the performance of three-level bidirectional DC-DC converter in the high power battery energy storage application. Due
to the reduced switch voltage stress, 600V IGBTs can be employed in the bi-directional
three-level converter instead of 1200V IGBTs in the Buck/Boost converter. 600V IGBTs
26
Figure 2.13: Boost mode waveforms for three-level bi-directional DC-DC converter
Figure 2.14: Test waveforms of three-level DC-DC converter in Buck mode
27
Table 2.3: Comparison of inductor size of Buck/Boost and three-level converter

Rated Power
DC-link Voltage
Battery String Voltage
Maximal Inductor Current Ripple
Switching Frequency
Inductor size
10kW
750V
180V-360V
30%(peak to peak)
Buck/Boost Three-level
20kHz
10kHz
1120uH
348uH
Figure 2.15: Test waveforms of three-level DC-DC converter in Boost mode
have much lower on-state voltage and switching loss than 1200V IGBTs. Two CM150DY12NF IGBT half-bridge modules are used in the prototype. Also the total IGBTs cost
is lower compared to 1200V IGBTs. The inductor size is only one third of that in a half
bridge converter. This is a great benefit for high power converters because inductors with
higher inductance and high current are very bulky, expensive and inefficient.
The experiment waveforms for 180V battery side voltage and 10kW power are shown
28
in Fig. 2.14 and 2.15, which are corresponding to Buck and Boost mode operation
respectively.
The efficiency of three-level bi-directional DC-DC converter prototype is measured
with full power rating 10kW and wide battery side voltage range from 180V to 360V, as
shown in Fig. 2.16. The efficiency of three-level converter in charge mode varies from 98%
to 95%. The discharge efficiency is about 1% lower than charging mode because IGBTs
conduct for a longer time than diodes in each switching cycle. The tested efficiency of
Buck/Boost converter in the same condition is also shown in Fig. 2.16. Test results
indicate that about 2-3% efficiency improvement can be achieved by three-level DC-DC
converter for Buck mode and Boost mode, respectively, compared to basic non-isolated
Buck/Boost converter.
Figure 2.16: Efficiency test results for three-level and Buck/Boost converter
29
2.5
Summary for the Non-isolated Bi-directional DCDC Converters
Several low cost non-isolated bi-directional DC-DC converters suited for high power
battery energy storage applications have been reviewed and compared. Buck/Boost
converter is better suited compared to Cuk and SEPIC/Luo converter in this scenario
due to its smaller number of passive components, lower switch current stress and higher
efficiency. However, in wide battery side voltage range, efficiency of Buck/Boost half
bridge converter drops quickly with lower battery pack voltage. This problem can be
mitigated by the proposed VFPWM scheme which obtains 1-2.5% improvement. Threelevel bi-directional DC-DC converters have also been investigated. Experiment results
show 2-3% higher efficiency than that of the basic Buck/Boost converter. In addition,
much smaller inductor is required and there is no audible noise in three-level converter
compared with VFPWM half bridge converter, either.
2.6
Review of Isolated Bi-directional DC-DC Converters
A few of transformer isolated bi-directional DC-DC converters were reported in the

literatures. In this section, these isolated bi-directional DC-DC converters are reviewed
and categorized. As an example specification for illustration, the input DC-link voltage
is 750V and battery side voltage ranges from 300V-600V with the power rating up to
several tens of kilowatts. The advantages of isolated bi-directional DC-DC converters
include galvanic isolation which is required in some applications, soft switching for higher
efficiency, higher switching frequency and power density, lower EMI noises, and high step-
30
up or step-down voltage ratio.
S1/D1
S3/D3
Xfmr
S5/D5
S7/D7
Vdc
C1
S2/D2
Vds
C2
N:1
S4/D4
S6/D6
S8/D8
Figure 2.17: Bi-directional DC-DC converter based on a voltage-fed full bridge and a
current-fed full bridge
L
D9
S1/D1
S3/D3
Xfmr
S5/D5
S7/D7
R
Llk
Vdc
C1
S2/D2
C2
S4/D4
N:1
S6/D6
S8/D8
Vds
C3
current-fed full bridge with RCD snubber
One widely used topology is the current-fed and voltage-fed full-bridges and its derivations, as shown in Fig. 2.17 -2.22. Fig. 2.17 shows a typical structure of this type of
converter [55]: one full bridge is connected to voltage source or DC capacitor, which is
called voltage-fed, and the other full bridge is connected to current source or DC inductor, which is called current-fed. This topology was proposed to interface between the
low voltage battery and high voltage DC-link for the motor drive in a hybrid vehicle. A
31
L1
C3
S1/D1
S3/D3
Xfmr
S5/D5
Llk
Vdc
D10
S7/D7
D9
C1
S2/D2
C2
S4/D4
N:1
S6/D6
S8/D8
Vds
L2
current-fed full bridge with lossless snubber
L
S1/D1
S3/D3
Xfmr
S5/D5
S7/D7
S9/D9
Llk
Vdc
C1
S2/D2
C2
S4/D4
N:1
S6/D6
S8/D8
Vds
C3
current-fed full bridge with active clamp
L
S1/D1
C1
Xfmr
S3/D3
S5/D5
S7/D7
Llk
Vdc
C3
S2/D2
C4
C2
N:1
S4/D4
S6/D6
Vds
C5
Figure 2.21: Bi-directional DC-DC converter based on a voltage-fed half bridge and a
current-fed full bridge with active clamp
1.5kW prototype was built to evaluate the converter performance. However, this topology is not practical when used in high power applications of several tens of kilowatts.
The reason is that the transformer is not ideal and there is always leakage inductance
and leakage energy stored in the transformer, which must find some path to discharge
32
C1
S1/D1
C3
Xfmr
S3/D3
Llk
Vdc
C5
S2/D2
N:1
C2
C4
Vds
S4/D4
C6
current-fed half bridge
causing high voltage spikes on switches in current-fed side during switching. When used
in higher power level, this topology has been improved in several ways. Fig. 2.18 shows
that a RCD snubber circuit is added into the current-fed side full bridge to mitigate
the switch voltage stress [56], compared to the topology in Fig. 2.17. In reference [57],
similar approach was employed to reduce the voltage stress of switches in current-fed side
but lossless snubber was used instead, as shown in Fig. 2.19. In reference [58][59][60],
still based on the same idea, an active clamp snubber circuit Sc and Cc was added to the
current-fed side full bridge, as shown in Fig. 2.20. The addition of active clamp provides
several advantages: ZVS is achieved for all the switches on current-fed side; and ZVS or
ZCS is achieved for all the switches on voltage-fed side; and there is no circulating current
which helps to increase the efficiency compared to conventional phase-shift controlled full
bridge converter. One major disadvantage of this converter is that the voltage stress of
current-fed side switches is higher than the source voltage Vds , which indicates that the
topology in Fig. 2.20 is better suited for applications with lower source voltage on the
current-fed side. Fig. 2.21 shows one derivation of this type of topology [61]. In this
topology, a half bridge was employed on the voltage-fed side instead of a full bridge. In
Fig. 2.22 a voltage-fed and current-fed half-bridge converter was reported in [62]. This
33
topology doesnt need a snubber because S1 can act as an active clamp switch and there
is no need to connect additional snubbers to reduce the voltage stress of S3 and S4.
S1/D1
Xfmr
S3/D3
S5/D5
S7/D7
Llk
Vdc
C1
S2/D2
C2
N:1
S4/D4
S6/D6
Vds
S8/D8
Figure 2.23: Bi-directional DC-DC converter based on two voltage-fed full bridges
S1/D1
C1
Xfmr
S3/D3
S5/D5
Llk
Vdc
C3
S2/D2
C4
N:1
C2
S4/D4
Vds
S6/D6
voltage-fed full bridge
Another type of topology widely used in industry for bi-directional operation is dual
active bridges (DAB) [63][64][65][66][67][68], as shown in Fig. 2.23. In Fig. 2.23, dual
active bridges consist of two voltage-fed full bridges, which are interface directly with two
DC voltage sources. Example applications of this topology can be found in energy storage
systems and motor drives [64][65][66]. The control of dual active bridges is very flexible.
34
S1/D1
C1
Xfmr
S3/D3
C3
Llk
Vdc
C5
S2/D2
Vds
C6
N:1
S4/D4
C2
C4
Figure 2.25: Bi-directional DC-DC converter based on two voltage-fed half bridges
S1/D1
Xfmr
S3/D3
Vdc
Cr
S5/D5
S7/D7
Llk
C1
S2/D2
C2
S4/D4
N:1
S6/D6
Vds
S8/D8
Figure 2.26: Bi-directional DC-DC converter based on two voltage-fed full bridges and
series resonant tank
For instance, either one bridge is phase-shift controlled and the other is uncontrolled
(only anti-parallel diodes conduct), or, both bridges output a square voltage waveform
and the phase between a two voltage square waveform can be controlled. DAB topology
has several advantages: ZVS can be achieved for switches in both bridges; the number of
switches is smaller compared to voltage-fed and current-fed full bridges such as in Fig.
2.23; low voltage stress of switches compared to current-fed full bridges; high efficiency
can be achieved. One major disadvantage for this topology is that at light load levels
the ratio of reactive power to active power is high thus it is difficult to achieve high
efficiency in this scenario [65]. The other disadvantage is that the voltage range for
35
optimal operation is narrow. Dual active bridges also have some derivations, such as the
combination of a voltage-fed full bridge and a voltage-fed half bridge as shown in Fig.
2.24 [67], or the combination of two voltage-fed half bridges as shown in Fig. 2.25 [68].
One derivation from the dual-active-bridge bi-directional DC-DC converter is the
bi-directional series resonant DC-DC converter [69], as shown in Fig. 2.26. It has two
voltage-fed full-bridges (or half-bridges), but there is one more resonant capacitor in series
with the inductor compared to DAB converters and the resonant LC circuit is formed.
The resonant converters have the potential to reduce the switching loss. Other isolated bidirectional DC-DC converter topologies include the improved full-bridge converter with
auxiliary resonant network to facilitate soft switching [70] and L-type full bridges with
two inductor rectifier which is more suitable for low voltage high current applications
[71].
2.7
Summary for Isolated Bi-directional DC-DC Converters
In summary, the bi-directional DC-DC converter topologies that can be potentially

used for high power applications can be categorized as current-fed, voltage-fed and their
combinations, as shown in Fig. 2.27. Generally bi-directional DC-DC converters consist
of a high frequency inverter, a high frequency transformer with leakage inductance which
may be either preferred or not preferred in different topologies, and a high frequency
rectifier. Bi-directional DC-DC converter can be directly connected to the voltage source
or the DC capacitor bank, in a voltage-fed manner, or with additional DC inductor in
between, in a current-fed manner. The major high frequency inverter and the corresponding high frequency rectifier topologies which can be used for bi-directional operation are
36
Figure 2.27: Topology categorization for isolated bi-directional DC-DC converter based
on voltage-fed and current-fed input/output
shown in Fig. 2.28 and Fig. 2.29. These topologies include full-bridge inverter and
rectifier, half-bridge inverter and rectifier, push-pull inverter and center-taped rectifier,
L-type half-bridge inverter and current doubler rectifier. The voltage stress of switches in
full bridges is same as that in half bridges, but the current stress of switches is only half
of that in half bridges. The remaining two inverter/rectifier topologies are more suited
for low voltage high current applications due to the low current stress and high voltage
stress of switches.
For high power energy storage applications, generally full bridge based bi-directional
DC-DC converters will be considered. One of the reported topologies is the voltagefed and current-fed full-bridge converter, as shown in Fig. 2.20. For these converters,
voltage-fed full bridge is used on the high voltage DC link side and current-fed full
bridge with an inductor is used on the low voltage battery side. To limit the voltage
37
Figure 2.28: Major topologies for high frequency inverters which are used for bidirectional operation
Figure 2.29: Major topologies for high frequency rectifiers which are used for bidirectional operation
38
stress of components in the current-fed side due to the leakage energy of high frequency
transformer, active clamp is used. Further investigation indicates that the current-fed
side components continue to suffer high voltage stress, especially with wide input/output
voltage range [72].
The dual active bridge (DAB) DC-DC converter, as shown in Fig. 2.23, is another
widely used isolated bi-directional DC-DC converter. With conventional modulation
strategy, the output of both full bridges is square wave and there is a phase shift between
the two full bridges, which controls the direction and amplitude of the power. However,
the optimal operation voltage range with full load zero voltage switching (ZVS) and
minimal reactive power is very limited, making this topology unsuitable for wide voltage
range applications. The circulating current is high and ZVS of switches might be lost
in wide voltage range of battery energy storage systems [72]. To mitigate this issue, a
combined triangular and trapezoidal modulation method to reduce losses over a wide
operating voltage range is proposed in [73]. A dual-phase-shift modulation strategy for
DAB isolated bi-directional DC-DC converter is proposed to reduce the reactive power
and current stress in [74]. Other modulation techniques to improve the DAB performance
are reported in [75][76][77].
In the next chapter, a novel wide voltage range bi-directional series resonant DC-DC
converter with clamped capacitor voltage is proposed for high power battery energy storage systems. The high circulating current issue which is associated with DAB converters
in the wide battery voltage range is addressed in the proposed bi-directional series resonant DC-DC converter with a novel modulation technique. In addition, the clamping
circuits can limit the short-circuit fault current of the converter.
39
2.8
Conclusion
Table 2.4: A summary for the bi-directional DC-DC converters for energy storage applications
Bidirectional
# of
# of
# of
Switch
Switch
Soft
Vds
Ids
V stress
I stress
switching
range
ripple
Isolation
topology
Switch
Buck/Boost
No
Vdc
Medium
No
Wide
Medium
Cuk
No
> Vdc
High
No
Wide
Zero
SEPIC/Luo
No
> Vdc
High
No
Wide
Medium
Interleaved
No
Vdc
Low
No
Wide
Low
Cascaded
No
Vdc , Vds
Medium
No
Widest
High
Three-level
No
Vdc /2
Medium
No
Wide
Low
VCFFB
Yes
Vdc , > Vds
Medium
Yes
Wide
Medium
VCFHB
Yes
Vdc , > Vds
High
Yes
Wide
Medium
DAFB
Yes
Vdc , Vds
Medium
Yes
Narrow
High
DAHB
Yes
Vdc , Vds
High
Yes
Narrow
High
The contribution of this chapter is to review a number of non-isolated and transformer

isolated bi-directional DC-DC converters as reported in the literatures and evaluate their
performance for battery and super capacitor energy storage applications. These typical
conventional bi-directional topologies are summarized in Table 2.4 in terms of the number of components (active switches, capacitors and inductors), galvanic isolation, switch
voltage and current stress and soft switching etc., which are basic aspects to be consid-
40
ered based on converter specifications, cost, efficiency and power density requirements.
The energy storage device voltage range Vds and the ripple of the device current Ids
should be considered for these converters. The voltage for most energy storage devices
varies widely based on their state of the charge (SOC). In the meantime, high efficiency
is required in a wide voltage range in order to obtain high round-trip efficiency. Some
batteries are sensitive to the ripple current because it will generate additional heat and
reduce battery life. Therefore, minimizing battery ripple current is also important.
For basic non-isolated bi-directional DC-DC converters, the bi-directional Buck/Boost
half-bridge converter has the least number of switches and passive components, the lowest
current stress for the switches. It can easily handle the wide voltage range of batteries
with PWM scheme. In a lot of battery/supercapacitor energy storage systems it is the
best suited topology. In some battery energy storage applications where extremely low
current ripple is required, the bi-directional Cuk converter with input and output inductor
magnetically coupled together is a better option [78].
Enhanced performance can be achieved with the derived non-isolated bi-directional
DC-DC converters. The cascaded Buck/Boost converter can either step down or step up
the battery voltage with the same power stage. The interleaved Buck/Boost converter
is suited for high current applications because the current handling capability of the
power stage can be easily scaled up by adding more modular Buck/Boost half-bridge
channels. Output current ripple mitigation can be achieved in the battery side with
interleaving. Smaller inductors can be used and the transient response is better. The
three-level bi-directional DC-DC converter is suited in high DC-link voltage applications.
The inductor size is much smaller than that in basic non-isolated Buck/Boost converter,
and the efficiency is better because lower voltage rating devices generally have much
lower switching loss.
41
For isolated bi-directional DC-DC converters, they are used in the energy storage
applications where galvanic isolation is required or high voltage difference exists between
the DC-link side voltage and battery side voltage. Isolated topologies use more switches
but generally they operate with soft switching such that they can be designed for higher
efficiency and/or higher power density at higher switching frequency. Voltage-fed and
current-fed full-bridge or half-bridge converters are better suited for energy storage systems with lower battery or supercapacitor voltage, because the voltage stress in the
current-fed side is relatively high. Additional clamping circuit is a hassle for high power
applications and the transformer leakage inductance should be minimized. Dual active
full-bridges or half-bridges have the minimum number of components in the isolated bidirectional DC-DC topologies. They can obtain high converter performance in narrow
voltage range. The major issue for them is decreased performance in the wide voltage
range of batteries or supercapacitors, such as high circulating current, lose of ZVS and
reduced efficiency. The performance of isolated bi-directional DC-DC converters should
be further improved for battery/supercapacitor energy storage systems, with alternative topologies, modulation techniques, magnetic integration and design optimization
approaches.
42
Chapter 3
A Novel Wide Voltage Range
Bi-directional Series Resonant
Converter with Clamped Capacitor
Voltage
3.1
3.1.1
The Power Stage

Conventional Uni-directional Series Resonant Converter
with Clamped Capacitor Voltage
The conventional uni-directional series resonant converter with clamped capacitor voltage is a phase-shift controlled clamping mode series resonant converter with auxiliary ZVS
inductors and switches [79][80][81]. The power stage of transformer isolated bi-directional
series resonant converter with clamped capacitor voltage is shown in Fig. 3.1. There are
43
four IGBTs (S1 S4) on the primary side to form a high frequency full-bridge inverter.
The high-frequency transformer primary winding is split into two equal parts and the
resonant inductors can utilize the leakage inductance of the high-frequency transformer.
The transformer turns ratio for two primary windings and one secondary winding is
N 1 : N 1 : N 2. Four diodes (D9 D12) are added to the circuit to clamp the maximum
voltage of the resonant capacitor to the primary side DC-link voltage Vdc , avoiding high
voltage stress across the capacitor. Four diodes (D5D8) are employed on the secondary
side to build a high frequency rectifier. IGBTs S1 S4 are controlled in the phase shift
manner. The phase-shift control gate signal is shown in Fig. 3.2, in which S1 and S2
are alternately switched on with 50% duty ratio, and S3/S4 are switched in the same
way, but the gate signal of S1 leads S4 by an angle of 1 .The secondary side output
voltage Vds is regulated by the phase-shift angle 1 . Its forward mode operation char-
D9
S1/D1
D11
Cr
N1
S3/D3
N1
A
Vdc
B
T1
C1
L1
T2
iL1
L2
iL2
D10
D12
S2/D2
S4/D4
D5
D7
C
iT3
N2
C2
Vds
T3
D6
D8
Secondary Side
Figure 3.1: Conventional uni-directional series resonant converter with clamped capacitor voltage
44
1
Figure 3.2: Phase-shift modulation gate signal in uni-directional operation
acteristics have been well studied and understood based on numeric simulation methods
[82][83]. The output V-I characteristic is a voltage source in normal operation and a
current source with high output current, which gives intrinsic current limiting capability
at fault conditions, e.g. load short-circuit fault, as a result of clamping the resonant capacitor voltage to the input voltage. ZVS is achieved in full load and voltage range with
auxiliary switches and inductors. High efficiency can be obtained in the wide voltage and
load ranges as well.
3.1.2
A Novel Bi-directional Series Resonant Converter with

Clamped Capacitor Voltage
The power stage of the transformer isolated bi-directional series resonant DC-DC converter with clamped capacitor voltage is shown in Fig. 3.3. In order to reverse power
from the secondary to the primary side, four IGBTs (S5 S8) are employed, rather than
a diode rectifier (D5 D8), in the secondary side. It is a fixed-frequency phase-shift
45
controlled clamping mode series resonant converter. Its forward mode characteristics
are well studied and understood based on the previous work [79]-[83]. In forward mode,
four clamping diodes D9-D12 ensure the control of internal voltage and current under
various conditions of line and load. The output V-I characteristic is dual-slope at small
phase-shift angles: a voltage source in normal load range and a current source at the
overload condition, providing intrinsic current limiting capability at fault conditions, e.g.
load short circuit, as a result of clamping the resonant capacitor voltage to input DC
link voltage. In addition, the maximum voltage stress of resonant capacitor is limited
to the input voltage and there is no risk of damaging the capacitor during overload or
short circuit conditions. Therefore, converter reliability is greatly enhanced even when
the feedback signal is lost. ZVS is achieved in the wide voltage and load range [79]. At
light load, ZVS can be maintained with auxiliary switches and inductors, which inject
more inductive current at light load condition [81]. High efficiency can be obtained in
the wide voltage and load range. There is little circulating current at light load because the phase shift modulation reduces the resonant tank input voltage. Therefore,
the clamped capacitor voltage series resonant converter is ideally suited for wide voltage
power conversion.
Despite the excellent forward mode characteristics, there is a major difficulty in reverse mode operation. The simple phase-shift modulation of the secondary side full-bridge
switches S5 S8, as used for S1 S4 in forward mode, cannot reverse the power flow
from secondary side to primary side, because the series resonant converter essentially
steps down voltage. Advanced modulation strategy based on three phase-shift angles is
proposed to enable the reverse mode operation and bi-directional power flow. All of the
8 active switches S1 S8 are modulated in reverse mode operation, as shown in Fig.
3.4. With full bridge in both primary and secondary side, there are three modulation
46
Primary Side
D9
S1/D1
D11
Cr
N1
A
Vdc
C1
T1
L1
T2
iL1
L2
iL2
D10
D12
S2/D2
S4/D4
S5/D5
S7/D7
C
iT3
N2
S3/D3
N1
C2
Vds
T3
S6/D6
S8/D8
Secondary Side
Figure 3.3: Power stage of bi-directional phase-shift controlled series resonant converter
with clamped tank capacitor voltage
variables to utilize: the primary side full bridge phase-shift angle 1 , the secondary side
full bridge phase-shift angle 2 and the phase shift angle between the secondary side and
the primary side bridges 21 .
2
21
Figure 3.4: Proposed modulation strategy based on three phase shift angles for reverse
mode operation: gate signals for 8 IGBTs
47
3.2
The Power Stage Design and Trade off for Wide

Voltage Range
No analytical model is available for either the conventional uni-directional or the proposed novel bi-directional series resonant DC-DC converter with clamped capacitor voltage. It is difficult and inefficient to derive complex analytical models for them because
there are 4 state variables associated with four energy storage components in the circuit and there are 9 possible conduction modes of the four clamping diodes in which at
least D11 and D12 conduct alternatively for some period in each switching cycle [83].To
illustrate the design and trade off of the power stage for wide voltage range in battery
energy storage applications, it is necessary to provide example specifications to study
the bi-directional series resonant DC-DC converter with clamped capacitor voltage, as
shown in Table 3.1. The output power is 35kW, the input DC-link voltage is 750V and
output voltage is in a wide voltage range from 300V to 600V. The switching frequency
is 50kHz. In addition, ZVS is required in full load range to reduce EMI and to improve
efficiency. At light load, ZVS can be realized with auxiliary switches and inductors [81],
but the auxiliary switches and inductors are not shown in Fig. 3.3.
Table 3.1: Specifications of the bi-directional series resonant DC-DC converter with
clamped capacitor voltage
Input voltage (Vdc ):
Output voltage (Vds ):
Rated power (Po ):
Switching frequency (fs ):
Load fault current limit:
Zero voltage switching (ZVS):
48
750V
300V-600V
35kW
50kHz
Required
Required
The power stage is designed and traded off based on forward mode operation. The
selection of transformer turns ratio N = 2 N 1/N 2, resonant inductance L = L1 + L2 =
2 L1 and resonant capacitance C = Cr should guarantee the required output voltage
and power range. In the meantime current stress in the power stage should be minimized to obtain high power conversion efficiency. In order to guide the design, analytical
equations which describe the characteristics of conventional phase-shift controlled series
resonant converter (without the clamping diodes D9-D12) are listed in equation (3.1) to
(3.8), although the behavior of series resonant converter with clamped capacitor voltage deviates from these equations, as a result of the conduction of at least two of the
clamping diodes alternatively. It is difficult to derive an analytical description for the
series resonant converter with clamped capacitor voltage because the conduction modes
of four clamp diodes are complex. However, the following equations are still useful and
can describe the behaviors of the converter at an extreme condition when phase-shift
angle 1 is zero and capacitor voltage does not exceed DC-link voltage.
The resonant frequency is defined as,
fo =
2 L C
(3.1)
where L = L1 + L2 = 2 L1 , L is the total series inductance, and C = Cr is the

capacitance in the series resonant tank.
The characteristic impedance is,
r
Zo =
L
1
= o L =
C
o C
where o = 2 fo .
The loaded quality factor is defined as,
49
(3.2)
Q 2
Total energy stored

Zo
=
energy dissipated per cycle
Re
(3.3)
where Re is the equivalent series resistance in the resonant tank.

The equivalent load resistance referred to primary side is,
Re = N 2
8
RL 0.81 N 2 RL
2
(3.4)
If only the fundamental component of tank voltage and current are considered, the
resonant tank impedance is,
p
Zt = Re2 + Zo2 (s /o o /s )2
(3.5)
where s = 2 fs , and fs is the switching frequency.

The peak resonant capacitor voltage is,
VCm =
4 Vdc cos2 ( 21 )
q
(s /o ) Q12 + (s /o o /s )2
(3.6)
The power delivered to the secondary side is,
Po =
2
8 Vdc2 cos4 ( 21 )
Re
Im
=
2
Re 2 [1 + Q2 (s /o o /s )2 ]
(3.7)
The voltage transfer function is,
Mv =
cos2 ( 21 )
Vds
= p
Vdc
N 1 + Q2 (s /o o /s )2
(3.8)
There are several considerations when selecting resonant tank parameters, such as L,
C and N . The first is the resonant frequency fo , while the switching frequency fs is fixed
50
to 50kHz. As described in references [79][80], this topology can efficiently operate within
a range of switching frequencies: 0.8 fo < fs < 1.5 fo . To achieve ZVS for high
efficiency and low EMI, the resonant frequency fo is selected to be lower than switching
frequency fs .
The second consideration is to ensure that the selection of L, C and N , or the selection
of fo , Zo and Q, can deliver the required maximal power of 35kW to output in the whole
300V-600V output voltage range, because from Equation (3.7) the maximal output power
is limited by resonant tank impedance. The worst scenario to output full power of 35kW
at zero phase-shift angle 1 is with 600V output which has largest load resistance RL
or equivalent resistance Re . It can also be inferred from Equation (3.7) that the output
specific power, here defined as the ratio of output power to the square of resonant tank
2
, which can be considered as an indication of converter efficiency, is
peak current, Po /Im
proportional to the equivalent load resistance Re . So, larger Re will reduce component
current stress and potentially improve converter efficiency. The maximal output power
corresponding to the zero phase-shift angle, with different combinations of resonant tank
characteristic frequency and impedance, is shown in Fig. 3.7. It can be discerned that
the maximal equivalent load resistance Re is should be lower than 8 such that the
converter can output up to 35kW. Based on this conclusion and Equation (3.4), the best
transformer ratio is N = 1, or N 1 : N 1 : N 2 = 1 : 1 : 2. If N is too large, Re is so high
that the converter cannot output the rated power; if N is too small, Re is so small that
the converter efficiency can be decreased.
The third consideration is the optimization of converter efficiency. The selection of
resonant inductor L and resonant capacitor C is important to determine the reactive
power in the circuit and then the converter efficiency. This can be equivalently described
as how to select the resonant frequency fo , and characteristic tank impedance Zo or
51
Figure 3.5: Maximal output power with different resonant frequency fo , characteristic
impedance Zo and equivalent resistance Re (DC-link voltage: Vdc = 750V , phase shift
angle 1 = 0)
quality factor Q to reduce power loss and improve conversion efficiency. The worst
scenario here is with 300V/35kW output, since the current stress of converter devices and
power loss are highest. From Fig. 3.5 and Equation (3.4), the equivalent load resistance
is 2.08 if 35kW output is required at 300V output. So the maximal frequency ratio
F = fs /fo is 1.4 and maximal characteristic impedance is 6 , or maximal Q is 2.8.
On the other hand, from Equation (3.6), higher quality factor Q will increase the peak
voltage of resonant capacitor. When capacitor voltage is higher than input DC-link
voltage, four clamp diodes D9 D12 start to conduct and clamp the capacitor voltage
to input DC bus. However, the clamping of capacitor voltage is only expected when
overload or output short circuit occurs.
Fig. 3.6 shows the simulation results of the peak voltage of resonant capacitor with
resonant frequency fo for 45kHz, 40kHz and 36kHz and with quality factor Q from 0.5 to
52
Figure 3.6: The maximal voltage of resonant capacitor with F = fs /fo : 1.10, 1.25 and
1.40 (DC-link voltage: Vdc = 750V )
2.5. With F = 1.1 or fo = 45kHz, the power stage circuit enters clamping mode, which
is not preferred in normal operation. So the practical range for F is from 1.1 to 1.4.
Figure 3.7: Weighted average rms current of power stage at 300V /35kW (DC-link voltage: Vdc = 750V , phase shift angle 1 = 40)
53
To minimize the current stress of devices and optimize efficiency for forward mode
operation, weighted average rms current is defined to represent the current stress of the
converter. Weighted average rms current is contributed by current from primary and
secondary side switches, clamp diodes, two primary windings and one secondary winding
of a high frequency transformer. Fig. 3.7 shows the simulation results of the weighted
average rms current of the series resonant DC-DC converter with clamped capacitor
voltage for 300V and 35kW output with resonant frequency fo from 36kHz to 45kHz
and with quality factor Q from 0.5 to 2.5. The minimal weighted average rms current is
obtained at F = 1.4 or fo = 36kHz, and quality factor Q = 2.5. It is possible to further
increase the quality factor such that higher impedance of resonant tank will decrease the
current stress of the converter. However, from Fig. 3.6 the quality factor higher than
2.5 will cause converter to enter clamping mode in normal operation. Therefore, based
on above analysis, the converter resonant tank parameters can be selected as shown in
Table 3.2: The simulated maximum boundary of output voltage and current region of
Table 3.2: The selected resonant tank parameters

Transformer turns ratio:
N1 : N1 : N2 = 1 : 1 : 2
Resonant inductor:
L1 = L2 = 11.6uH
Resonant capacitor:
Cr = 0.9uF
Characteristic frequency of resonant tank:
fo = 36kHz
Characteristic impedance of resonant tank:
Zo = 5.2W
Maximal loaded quality factor:
Qm = 2.5
Switching frequency:
fs = 50kHz
designed power stage at small phase-shift angle (1 = 3.6), output V-I curves with
different phase-shift angles and the required wide output region from specifications are
54
drawn in Fig. 3.8. When phase shift angle 1 is small, it can be seen that the output is
similar to a voltage source when output current is from low to medium level, and similar
to a current source with large output current. The output short-circuit current is limited
to 150A based on the selected power stage parameters and as the result of clamping
resonant capacitor voltage, which is only 25% more than the maximum rated current
at 300V output. The output V I region of converter covers the required wide output
voltage range from 300V to 600V and load range up to 35kW.
Figure 3.8: Output V-I characteristics and boundary (1 = 3.6) of the designed converter (input: Vdc = 750V ) and the required output region
3.3
Problem Statement for Reverse Mode Operation

and Methodology
It is difficult and inefficient to derive the complex analytical models for the series resonant DC-DC converter with clamped capacitor voltage because there are 4 state variables
associated with four energy storage components in the circuit and there are 9 possible
55
conduction modes of the four clamping diodes in which at least D11 and D12 conduct
alternatively for some period in each switching cycle [83]. The intrinsic voltage step-down
characteristic of the series resonant converter is described by Equation (3.9) [84],
Mv =
1
Vds
= p
Vdc
N 1 + Q2 (fs /fo fo /fs )2
(3.9)
Equation (3.9) represents the clamped capacitor topology maximum power output and
the voltage transfer ratio corresponding to the phase shift angle 1 of zero when none
of the clamping diodes conduct. It can be concluded from (3.9) that the series resonant
DC-DC converter with clamped capacitor voltage always steps down voltage with a 1:1
(N = 1) transformer turns ratio. The reverse mode operation of the series resonant
converter with clamped capacitor voltage is a challenge, because from (3.9) if the same
single angle phase-shift modulation strategy as forward mode operation is employed on
the secondary side, that is, all primary side IGBTs are turned off with their anti-parallel
diodes as rectifiers, then S5 and S6 are alternately switched on with 50% duty ratio, and
S7/S8 are switched in the same way, but the gate signal of G5 leads G8 by a phase-shift
angle 2 , it is impossible to reverse the power from the 300V-600V output back to the
750V DC-link or input side. The maximal voltage transfer ratio is at zero phase-shift
angle and always lower than 1 with N = 1. Since the primary side input voltage is higher
than the secondary side output voltage, one possible approach to address this issue is to
change the transformer turns ratio for reverse mode operation. However, this will add
more switches in the circuit and require a more complex transformer. It also increases
cost and decreases the power density of the converter. The transition between forward
and reverse mode operation is slow due to switching the transformer turns ratio, which is
not suitable for the battery energy storage applications. Therefore, control type approach
56
and seamless transition are preferred, and a more advanced modulation technique should
be proposed to realize reverse mode operation.
2
21
Figure 3.9: Proposed modulation strategy based on three phase shift angles for reverse
mode operation: gate signals for 8 IGBTs
With full bridge in both primary and secondary side, there are three modulation
variables to utilize: the primary side full bridge phase-shift angle 1 , the secondary side
full bridge phase-shift angle 2 and the phase shift angle between the secondary side
and the primary side bridge 21 , as shown in Fig. 3.4. The Fig. 3.4 is redrawn here,
as Fig. 3.9. Since there is no analytical model derived for the reverse mode operation
of the series resonant DC-DC converter with clamped capacitor voltage, a systematic
numeric simulation study has been conducted. To cover the entire converter operating
range, 36, 90 and 144 have been selected for each phase-shift angle giving a total of
27 combinations for three modulation variables as shown in Fig. 3.10. More points can
also be inserted if necessary. Simulations are performed to estimate the weighted average
rms current and the reversed power. The hard switching (HS) and zero voltage switching
(ZVS) of all IGBTs are observed and the specific reversed power, which is defined as the
57
ratio of reversed power to weighted average rms current of converter, are estimated as
well to find the optimum operation strategy. MATLAB programs of trivariate splines
which are based on theory of multivariate splines are used for interpolation to determine
the converter behavior between simulated points [85]. It was found that the programs
are excellent for fitting the simulation data.
21
144
90
36 36
36
90
144
90
144
Figure 3.10: Illustration of the selected numeric simulation points in the 3-dimensional
phase-shift modulation space
The weighted average rms current of the converter is defined as follows,
Irms =
(3 iT 1 + 3 iT 2 + 5 iT 3 + 2 iD9 + 2 iD11 )
15
(3.10)
where iD9 and iD11 are the rms current of the clamping diodes, iT 1 iT 3 is the rms current
of the transformer windings. Each gain represents the cumulative stress through the
components in the current path. Specifically, the weight 3 is used for iT 1 to represent
58
the current stress in S1, S2 and T 1. So is the weight 3 for iT 2 . The weight 5 is used
for iT 3 to represent the current stress in S5 S8 and T 3. The weight 2 for iD9 and
iD11 represent the current stress in four clamping diodes.
The specific reversed power PS is defined as,
PS =
Po
Irms
(3.11)
where Po is the reversed power and Irms is the weighted average rms current of the converter. The weighted average rms current defined in Equation (3.10) is a measurement
of the current stress of components in the circuit. At some combinations of the three
phase-shift angles, the reactive power in the circuit is very large which causes high component current stress or even damage. The specific reversed power defined in (3.11) is an
indication of the reactive power and current stress in the circuit. High specific reversed
power indicates lower current stress and potentially more efficient power conversion.
By evaluating the specific reversed power PS with systematic designed simulations,
and by adding additional constraints such as zero voltage switching (ZVS) of all IGBTs, monotonic change of reversed power and piece-wise linearity, etc. the optimum
modulation strategy with 3 modulation variables can be identified.
3.4
Modulation Technique to Reverse Power with

Low Output Voltage
Fig. 3.11 shows the specific reversed power when secondary side voltage Vds is 300V,
the lowest output voltage. The combination of three phase-shift angles is labeled in
the sequence as [2 , 1 , 21 ] with the unit of degree. The following criteria are used to
59
identify the trajectory of modulation variables in a three dimensional space.
Figure 3.11: The specific revered power for different combinations of three modulation
variables [2 , 1 , 21 ] (Vdc = 750V, Vds = 300V )
1. High specific reversed power;

2. Zero voltage switching (ZVS) if possible;
3. Monotonic change of power along the trajectory;
4. Piecewise linear trajectory for simplicity.
The first criterion is used to reduce the current stress of components and improve
efficiency in reverse mode operation. The second criterion, zero voltage switching, is
also important because in this study 1200V/300A IGBTs are used as switches. S1 S8
are actively controlled in reverse mode operation. The reverse recovery of anti-parallel
diodes is slow, which will cause high reverse recovery current and switching loss under
60
hard switching condition. On the other hand, the 50kHz switching frequency is high
for 1200V IGBTs in terms of the voltage and power rating of the converter. So hard
switching is not preferred, especially at high power levels. At lower power levels, if ZVS
is lost, it is easier to use snubber inductors and auxiliary switches to inject inductive
current and obtain ZVS again. The third criterion is used for simpler design of the
feedback control loop. If the power does not change monotonically along the trajectory,
the sign of small signal transfer function will change and cause some stability problem.
3.6
ZVS/HS Boundary
Selected trajectory
HS
Selected points defining

piecewise trajectory
21=36
HS
21
2=3.6
ZVS
1=144
HS
ZVS
21
Figure 3.12: The identified trajectory for reverse mode operation with low current stress
of converter components for 300V output (Vdc = 750V, Vds = 300V )
61
The modulation strategy for reverse mode operation is to find a trajectory to regulate the reverse power which meets all four criteria as mentioned above. In Fig. 3.11,
with 300V output the maximal reverse power of 40kW is obtained at [3.6, 36, 90]
([2 , 1 , 21 ]). Zero voltage switching is achieved for all IGBTs at this position. For
reverse power higher than 15kW, hard switching is not considered because the snubber
circuit needs to inject too much inductive current to obtain ZVS, even if the specific reversed power is high. As an alternative, the positions with lower reversed power per unit
current can be selected if they are near ZVS and HS boundary. Therefore, the trajectory
can then proceed to the second point [3.6, 90, 36] corresponding to highest specific
reversed power. The reversed power is 31kW and ZVS for all switches is achieved as
well. The next point on trajectory can either be [36, 144, 36] or [3.6, 144, 36] for
15kW output and it should be in ZVS region or near ZVS boundary, depending on the
third criterion. When reverse power is below 15kW, losing ZVS in modulation space is
not important because the current in IGBTs is low and it can be easily compensated
by auxiliary inductors and switches. So it is better to select points with higher specific
reversed power. Based on this consideration, at 7kW [90, 144, 36] is selected. At
light load condition, ZVS is lost for all the points. And there is no big difference for
the specific power, either. So for simplicity, just one of the three control variables will
be used to regulate reverse power at light load. Although the converter itself loses the
ZVS condition at light load, snubber inductor or/and auxiliary switches can be utilized
to inject additional inductive current at the moment of switching and facilitate the zero
voltage switching of IGBTs [81].
Finally, one trajectory for reverse power flow control is identified based on the four
criteria with 750V DC-link input and 300V output voltage, as shown in Fig. 3.12. The
solid contour lines represent reversed power and the dotted line is the boundary between
62
the soft switching (ZVS) and hard switching (HS) region. The key points defining the
trajectory are also marked based on the above analysis. Three adjacent and perpendicular
planes in the 3-dimensional modulation space, such as the plane with 2 = 3.6 in the
bottom left side of Fig. 3.12, 21 = 36 in the top right side and 1 = 144 in the bottom
right side, are expanded into a 2-dimensional plane for simpler illustration. To regulate
the reverse power from 40kW to 0 kW, the trajectory starts at [3.6, 36, 90], and then
goes to [3.6, 90, 36]. This section of the trajectory is on the plane of 2 = 3.6. The
rest of the trajectory goes to the plane of 21 = 36, starting at [3.6, 90, 36], through
[36, 144, 36], [90, 144, 36] and ending at [144, 144, 36]. A look-up table can be
used to store the trajectory coordinates.
3.5
Modulation Technique to Reverse Power with

High Output Voltage
A procedure similar to that which is outlined for low voltage operation is used to
determine the trajectory for 600V output voltage. From Fig. 3.13, with 600V output
voltage the maximum reversible power is more than 80kW compared to 40kW with 300V
Vds . However, the power range of interest is from 40kW to 0kW. Based on the same
trajectory selection criteria as those for 300V output, which are identified as strategy
1, for reversed power from medium load level (15kW) to heavy load such as 40kW,
only the points in ZVS region will be considered. Also, the points with as the highest
specific reversed power as possible should be selected. Therefore, the point [36, 144,
90] ([2 , 1 , 21 ]) is considered for a heavy load. At medium power level the points
located near ZVS and HS boundary can also be selected in addition to those points in
ZVS region. Then [90, 144, 90] or [90, 144, 36] for medium load can be considered.
63
Figure 3.13: The specific revered power for different combinations of three modulation
variables [2 , 1 , 21 ] (Vdc = 750V, Vds = 600V )
At light load in reversed mode, ZVS is lost for all the points. The points with higher
specific reverse power such as [144, 144, 90], [144, 144, 36] and [144, 144, 144] are
potential candidates. All the candidate points for strategy 1 are highlighted with circles
and corresponding coordinates for phase-shift angles in Fig. 3.13. It can be found that
all these points are on the plane of 1 = 144 in the three-dimensional modulation space.
The reversed power with 1 = 144 and different phase-shift angles 2 and 21 is
shown in Fig. 3.14. By simply selecting the key points with highest specific reversed
power in this plane among the candidate points, that are, [36, 144, 90] for 39kW, [90,
144, 90] for 19kW and [144, 144, 90] for 2kW load, the trajectory is a straight line
with 21 fixed at 90and only 2 being changed, as shown in Fig. 3.14. Above 20kW all
the IGBTs are turned on and off with ZVS conditions. Below that, auxiliary inductor
64
ZVS
HS
21
2
ZVS/HS
boundary
Selected
trajectory
Key points on
trajectory
Figure 3.14: The identified trajectory for reverse mode operation with strategy 1 for
600V output voltage (Vdc = 750V, Vds = 600V, 1 = 144)
snubbers or/and switches are required to generate ZVS for some of the switches. The
criterion for monotonically regulated power along the trajectory and piecewise linearity
are also guaranteed.
However, two points in hard switching region with much higher specific reversed
power than that of other points with same power level, [36, 36, 36] and [90, 90, 36],
which are marked with square and corresponding modulation angles in Fig. 3.11, raise
the question whether other better trajectories in the three-dimensional modulation space
with higher efficiency exist or not. These two points have much lower current stress
for converter components, so the conduction loss is expected to be low. Although they
are in the hard switching region, at 600V output the current in IGBTs is much lower
than that with 300V output at heavy load and then it is possible to utilize the snubber
inductors and auxiliary switches to achieve the ZVS condition for those IGBTs which
65
HS
1
HS
2
ZVS/HS
boundary
Selected
trajectory
Key points on
trajectory
Figure 3.15: The identified trajectory for reverse mode operation with strategy 2 for
600V output voltage (Vdc = 750V, Vds = 600V, 21 = 36)
lose soft switching. The auxiliary circuit will increase the conduction loss of the power
stage slightly but the IGBT turn-on and diode reverse recovery loss will be eliminated.
So the trajectory of strategy 2, which discards the requirement of converter nature ZVS
at higher reversed power level and simply focuses on highest specific power compared
with strategy 1, can be identified. It can be found that these two points are both on
the plane with 21 = 36. The reversed power with 21 = 36 and different phase-shift
angles of 2 and 1 is shown in Fig. 3.15. The trajectory starts at [36, 36, 36] for
35kW load, and then goes to [90, 90, 36] for 17kW, and ends at [144, 144, 36] at
light load.
The efficiency of the two trajectories with strategy 1 and 2 in the three-dimensional
modulation space was calculated and compared, as shown in Fig. 3.16. The power loss
model was built for each of the components in the power stage, such as IGBT conduction
66
Figure 3.16: The calculated efficiency for the reverse mode modulation trajectories based
on strategy 1 and 2 with 600V output (Vdc = 750V, Vds = 600V )
loss, switching loss (measured by test circuit), diode conduction and turn-off loss, winding
and core loss of inductors and transformer, driver loss, capacitor loss and cable loss. The
accuracy of the efficiency calculation can be verified by the 15kW experiment prototype
and the efficiency test resutls will be presented in the later sections. From Fig. 3.16,
at light load, the two strategies have similar efficiency. However, from medium to full
load in reverse mode operation, the power converter efficiency of strategy 2 is about 4-5%
higher than that of strategy 1. Therefore, with 600V output voltage, strategy 2 generates
a better trajectory in the three-dimensional modulation space for the reverse mode of
the bi-directional series resonant DC-DC converter with clamped capacitor voltage.
67
3.6
The Generalized Modulation Strategy for Reverse Mode Power Flow Control in Wide Voltage
Range
3.6.1
The Look-up Table to Store Three Modulation Phaseshift Angles
To control the reversed power flow of the series resonant DC-DC converter with
clamped capacitor voltage in wide voltage range of 300-600V in battery side, a twodimension look-up table (LUT) based modulator is necessary. The format of the look-up
table is shown in Table 3.3. There are two inputs. The first is a virtual phase shift angle
, which controls the reversed power Po . The relationship between and Po doesnt
necessarily to be linear. But for simplicity the linear relationship is defined in Equation
(3.12) for all Vds , where the unit of is degree and Pm is the maximal reversed power
(e.g. 40kW),
Po = Pm (1
)
180
(3.12)
The reversed power is controlled by only one variable. When is reduced, the reversed
power is decreased, and this is similar to the phase-shift angle 1 in forward mode
operation. The second entry is the output voltage Vds , which defines different trajectories
in three-dimensional modulation space in wide voltage range. Each row in LUT stores a
trajectory. The output of LUT is three phase-shift angles [2 , 1 , 21 ](i,j) corresponding
to the inputs Vi (1 i M ) and j (1 j N ), where M is the number of voltage
entries and N is the number of angle entries, i and j are integers.
68
Table 3.3: The format of the look-up table and corresponding reversed power
Po :
PP
PP
Vds :
:
PP
P
V1
V2
V3
V4
VM 1
VM
3.6.2
Pm
PP
Pm (N 2)/(N 1)
1 = 0
2 = 180/(N 1)
N = 180
[2 , 1 , 21 ](1,1)
[2 , 1 , 21 ](2,1)
[2 , 1 , 21 ](3,1)
[2 , 1 , 21 ](4,1)
[2 , 1 , 21 ](M 1,1)
[2 , 1 , 21 ](M,1)
[2 , 1 , 21 ](1,2)
[2 , 1 , 21 ](2,2)
[2 , 1 , 21 ](3,2)
[2 , 1 , 21 ](4,2)
[2 , 1 , 21 ](M 1,2)
[2 , 1 , 21 ](M,2)
[2 , 1 , 21 ](1,N )
[2 , 1 , 21 ](2,N )
[2 , 1 , 21 ](3,N )
[2 , 1 , 21 ](4,N )
[2 , 1 , 21 ](M 1,N )
[2 , 1 , 21 ](M,N )
The Procedure to Generate the LUT for Power Flow Reverse in Wide Voltage Range
A procedure to generate the LUT for reverse mode operation in wide voltage range of
300-600V was proposed. The LUT was filled for 300V, 400V, 500V and 600V Vds firstly.
For each of these voltages, systematic simulation described in Chapter 3.4 and 3.5 was
conducted and several key points on trajectory were identified to cover up to 40kW reversed power. Criteria in Chapter 3.4 were applied to 300V and 400V and the ones
with strategy 2 in Chapter 3.5 were applied to 500V and 600V cases. Each trajectory
is piecewise linear and defined by several key points. Then 15-20 reference points were
inserted with linearly interpolated coordinates from key points to cover the whole trajectory evenly. The actual reversed power at these reference points was calibrated such that
j or Po of each reference point could be found. The reversed power for these reference
points was simulated and then their coordinates were filled into LUT horizontally. The
69
coordinates of the rest of the points on the trajectory were generated by linear interpolation based on reference points. No simulation calibration is required for these points.
For illustration, the simulated reversed power of reference points, sampled interpolated
points and expected reversed power by Equation (3.12) at 300V Vds is shown in Fig. 3.17
as indication of good linearity of interpolation from reference points.
Figure 3.17: Simulated reversed power of generated trajectory at 300Vds
Secondly, the LUT was filled for 350V, 450V and 550V. No more systematic simulation
described in Chapter 3.4 and 3.5 is required. The coordinate of the reference point at j
was directly obtained by selecting the midpoint of two points with same j from adjacent
voltage trajectories. For example, 350V reference point at = 0 was the midpoint of
300V and 400V trajectory at = 0. 15-20 reference points were evenly distributed from
0 to 180 virtual angle range. However, the reversed power of these reference points
might be deviated from Po calculated by Equation (3.12) at the corresponding j . The
reversed power for reference points was calibrated again by high fidelity simulation and
they were shifted to the corresponding LUT cells to match Equation (3.12). Similarly,
70
the rest of the cells along the trajectory were linearly interpolated from reference points.
Figure 3.18: Simulated reversed power of generated trajectory at 325Vds
Figure 3.19: 2 of the generated trajectories in LUT by proposed procedure in wide

output voltage range
Thirdly, the LUT was filled for 325V, 375V, 425V, 475V, 525V and 575V. The same
71


method as 350V, 450V and 550V was repeated to generate the trajectories at these
voltages. For example, 325V reference points were obtained from existing 300V and 350V
trajectories. It is found that at these voltages the simulated Po of reference points at each
j is already very close to calculated value by Equation (3.12). To illustrate, the reversed
power of reference points without adjustment of j on 325V trajectory is shown in Fig.
3.18. Therefore, no more simulation calibration is necessary and the coordinates of all the
72
points on trajectory can be directly linearly interpolated based on voltage from adjacent
trajectories at each j . No more reference points and shift operations are required.
But for better linearity, reference points can still be generated first and thus simulation
calibration and horizontal cell position shift of reference points can be conducted for
325V, 375V, 425V, 475V, 525V, 575V, and then for 312.5V, 337.5V, 362.5V, 387.5V,
412.5V, 437.5V, 462.5V, 487.5V, 512.5V, 537.5V, 562.5V, 587.5V, resulting the total of
25 trajectories in LUT all of which match (3.12). This procedure can be programmed
and the generated trajectories with different Vds are shown in Fig. 3.19, Fig. 3.20 and
Fig. 3.21 for the phase-shift angle 2 , 1 and 21 , respectively.
The trajectory for the rest of the voltage can be obtained by linear interpolation from
the above 25 existing trajectories in LUT. The phase angles for the voltage Vds at j is
calculated by Equation (3.13),
[2 , 1 , 21 ] =K1 [2 , 1 , 21 ](i+1,j) (Vds Vi ) K1
(3.13)
[2 , 1 , 21 ](i,j) (Vds Vi ) + [2 , 1 , 21 ](i,j)

where
K1 =
(M 1)
VM V1
(3.14)
Vi < Vds < Vi+1 , i and j are integer.
3.6.3
A LUT-based Modulator to Simplify Reverse Power Flow

Control
The size of the look-up table is a trade off between the required memory size and the
computation time of the digital controller. Three configurations of the LUT are shown in
73
Table 3.4. Each angle is stored in a 16-bit memory cell. In configuration 1 and 2, 10-bit
resolution is required for the virtual phase shift angle so no online interpolation for
is needed. Linear interpolation for Vds is required from 25 existing trajectories generated
from the proposed procedure. It is calculated offline by Equation (3.13) and stored in the
LUT in configuration 1, and calculated by the same equation but online in configuration
2. In configuration 3, to reduce the size of the LUT, linear interpolation is performed
online for both and Vds by Equations (3.15)- (3.17),
[2 , 1 , 21 ]0 =K2 [2 , 1 , 21 ](i,j+1) ( j ) K2
(3.15)
[2 , 1 , 21 ](i,j) ( j ) + [2 , 1 , 21 ](i,j)
[2 , 1 , 21 ]00 =K2 [2 , 1 , 21 ](i+1,j+1) ( j ) K2
(3.16)
[2 , 1 , 21 ](i+1,j) ( j ) + [2 , 1 , 21 ](i+1,j)
[2 , 1 , 21 ] =K1 [2 , 1 , 21 ]00 (Vds Vi ) K1
(3.17)
0
[2 , 1 , 21 ] (Vds Vi ) + [2 , 1 , 21 ]
where
K2 =
N 1
180
(3.18)
K1 is defined in Equation (3.14). Vi < Vds < Vi+1 , j < < j+1 , i and j are integer.
Configuration 1 requires external memory but consume lowest amount of arithmetic
resources. Configuration 2 and 3 can utilize the on-chip memory of state-of-art microcontroller. Configuration 3 requires minimal memory size but consumes more arithmetic
resources. However, the pure computational time is 0.38uS and only a small portion of
20uS switching cycle.
The diagram of the LUT based modulator for configuration 3 is shown in Fig. 3.22.
74
Table 3.4: The required resources for LUT with different size
Number of trajectories: M
Number of points on trajectory: N
Required 16-bit memory size
Number of online interpolation:
Addition operations:
Multiplication operations:
Total mathematical operations:
Computational time (10nS clock):
[2, 1, 21](i+1, j)
[2, 1, 21]
PSPWM
Generator
[2, 1, 21](i+1, j+1)
Linear
Interpolation
[2, 1, 21](i, j)
LUT
Virtual phase
shift angle
Config. 2
25
1024
76800 (75k)
1
7
6
13
130nS
[2, 1, 21](i, j+1)
Vds
Config. 1
301
1024
924672 (903k)
0
0
0
0
0
Config. 3
25
128
9600 (9.375k)
3
20
18
38
380nS
G1
G2
G3
G4
G5
G6
G7
G8
Figure 3.22: The diagram of the LUT based modulator
The sensed battery pack voltage is sent to Vds entry and the controller output is sent to
. The synthesized angles [2 , 1 , 21 ] are sent to phase shift pulse width modulation
(PSPWM) module to generate the required IGBT gate signals of S1 S8 for required
reverse power Po(j) . It is noted that in energy storage applications such as batteries and
ultracapacitors, Vds changes in much slower rate than the speed of the power regulation
loop. So the two loops can be decoupled in the time domain.
75
3.7
Simulation and Experiment Validation for Reverse Mode Operation
3.7.1
The Experimental Prototype
A 750V input, 300-600V output and 50kHz switching frequency prototype with 15kW
scaled-down power rating is constructed to verify the forward and reverse mode operation
of the series resonant converter with clamped capacitor voltage. The picture of the
prototype is shown in Fig. 3.23.
Resonant
Capacitor Bank
IGBT Gate
Driver
IGBT Gate
Drivers
Transformer
Primary H-bridge
with Clamp Diodes
Resonant
inductor L1
Secondary
H-bridge
Phase-shift
modulator
Figure 3.23: The prototype of 15kW scaled-down series resonant converter with clamped
capacitor voltage to verify bi-directional operation
The components used in the prototype include,
IGBTs: AP T GF 300A120G;
76
Clamping diodes: two AP T DF 400AK60G in series;
Transformer turns ratio: N1 : N1 : N2 = 1 : 1 : 2;
Transformer primary winding leakage inductance: 0.6uH;
Transformer secondary winding leakage inductance: 7.5uH;
Transformer magnetizing inductance: 320uH (referred to secondary side T 3);
Resonant inductor: L1 = L2 = 11.0uH;
Resonant capacitance: C = 0.9uF ;
It should be noted that there is an additional 7.5uH leakage inductance in the high
frequency transformer secondary winding T 3, in series with the resonant tank adding
additional impedance to the 15kW prototype. This is the major difference between
the experimental implementation and the simulation discussed above where the leakage
inductance of the transformer winding T3 is assumed to be zero.
3.7.2
Comparison of Simulation and Experiment Test Results
The simulation waveforms and the experiment waveforms with 300V output voltage
and 12.8kW load for the forward mode operation are shown in Fig. 3.24 and 3.25 respectively. The primary side DC input voltage is 750V. Four secondary- side IGBTs are
shut down in forward mode operation and the primary bridge phase shift angle 1 used
in the experiment is 84. ZVS is achieved for all primary side IGBTs. The reference
direction of iL1 , iL2 and iT 3 for all the simulation and experiment waveforms is shown
in Fig. 3.3. The current in the first primary transformer winding T 1 or resonant inductor L1 doesnt overlap with that in the second transformer primary winding T 2 or
77
1000V
VAB: 500V/div
500V
0V
-500V
VCD: 500V/div
Time: 20uS
-1000V
100A
iL1: 50A/div
50A
0A
-50A
iL2: 50A/div
-100A
Figure 3.24: Simulation waveforms in forward mode with 300V output voltage and
12.8kW load (1 = 84)
VAB: 500V/div
500V
-500V
VCD: 500V/div
Time: 20uS
iL1: 50A/div
50A
-50A
Time: 4uS/div
iL2: 50A/div
Figure 3.25: Experiment waveforms in forward mode with 300V output voltage and
12.8kW load (1 = 84)
78
resonant inductor L2, due to the phase shift between the leading leg S1/S2 and lagging
leg S3/S4 and the alternative conducting of D11 and D12. The difference of iL1 and iL2
goes to clamp diode D11 or D12, and the summation of iL1 and iL2 is injected to the
secondary side transformer winding T 3. The major parasitics such as leakage inductance
and magnetizing inductance of the transformer, junction capacitance of clamp diodes and
IGBTs, equivalent series resistance, etc. are modeled in the simulation. The simulation
waveforms coincide well with the experiment waveforms. This also verifies that the simulation approach can accurately predict the behavior of the converter with proprietary
power stage component modeling.
1000V
VAB: 500V/div
500V
0V
-500V
Time: 20uS
VCD: 500V/div
-1000V
100A
iL1: 50A/div
50A
0A
-50A
iL2: 50A/div
-100A
Figure 3.26: Simulation waveforms in forward mode with 600V output voltage and
12.7kW load (1 = 41)
The simulation waveforms and the experiment waveforms with 600V output voltage
and 12.7kW load for the forward mode operation are shown in Fig. 3.26 and 3.27 re-
79
VAB: 500V/div
500V
-500V
Time: 20uS
VCD: 500V/div
iL1: 50A/div
50A
-50A
Time: 4uS/div
iL2: 50A/div
Figure 3.27: Experiment waveforms in forward mode with 600V output voltage and
12.7kW load (1 = 41)
spectively. The primary side DC input voltage is 750V. The primary bridge phase shift
angle 1 used in the experiment is 41. The ringing of inductor current can be observed.
This is because the conduction time for D11 or D12 is small in each switching cycle,
especially when 1 is small, and during the time interval where none of the clamp diodes
conducting the inductor L1 and L2 will be resonant with the junction capacitance of
clamp diodes.
The simulation waveforms and the experiment waveforms with 750V input voltage
(Vdc ) and 300V output voltage (Vds ) and 11.6kW load for the reversed mode operation of
the bi-directional series resonant DC-DC converter with clamped capacitor voltage are
shown in Fig. 3.28 and 3.29 respectively. The phase shift angles used in the experiment is
2 = 26, 1 = 125, and 21 = 36. The reverse power is lower than that predicted in the
Fig. 3.12 because additional 7.5uH leakage inductance exists in the 15kW transformer
winding T 3. However, if it is taken into account in simulation, both the simulation
waveforms in Fig. 3.28 and the reversed power are same as experiment test results.
80
1000V
VAB: 500V/div
500V
0V
-500V
Time: 20uS
VCD: 500V/div
-1000V
100A
50A
iL1: 50A/div
iT3: 50A/div
0A
-50A
-100A
iL2: 50A/div
Figure 3.28: Simulation waveforms in reversed mode with 300V output voltage and
11.6kW load (2 = 26, 1 = 125, 21 = 36)
VAB: 500V/div
500V
-500V
Time: 20uS
VCD: 500V/div
50A
iT3: 50A/div
iL1: 50A/div
-50A
iL2: 50A/div
Time: 4uS/div
Figure 3.29: Experiment waveforms in reversed mode with 300V output voltage and
11.6kW load (2 = 26, 1 = 125, 21 = 36)
81
1000V
VAB: 500V/div
500V
0V
-500V
VCD: 500V/div
Time: 20uS
-1000V
100A
50A
iL1: 50A/div
iT3: 50A/div
0A
-50A
iL2: 50A/div
-100A
11.6kW load (2 = 61, 1 = 41, 21 = 36)
VAB: 500V/div
500V
VCD: 500V/div
-500V
Time: 20uS
50A
iL1: 50A/div
iT3: 50A/div
-50A
Time: 4uS/div
iL2: 50A/div
11.6kW load (2 = 61, 1 = 41, 21 = 36)
The simulation waveforms and the experiment waveforms with 750V input voltage
(Vdc ) and 600V output voltage (Vds ) and 14.8kW load for the reversed mode operation of
82
the bi-directional series resonant DC-DC converter with clamped capacitor voltage are
shown in Fig. 3.30 and 3.31 respectively. The phase shift angles used in the experiment
is 2 = 61, 1 = 41, and 21 = 36. The reverse power is lower than prediction in Fig.
3.15 in that there is additional 7.5uH leakage inductance in the transformer secondary
side.
Vce4: 500V/grid
Vge4: 20V/grid
+15V
0V
-15V
iL2: 50A/grid
iL1: 50A/grid
Time: 2uS/grid
Figure 3.32: The experiment test waveforms to show ZVS operation lagging leg (S4) in
forward mode operation
The experimental waveforms of zero voltage switching (ZVS) operation of the bidirectional series resonant DC-DC converter with clamped capacitor voltage are shown
in Fig. 3.32 - 3.34. In forward mode operation, due to the phase-shift operation it is
more difficult for the lagging leg (S3 & S4) to achieve ZVS. The gate drive voltage Vge
and output voltage Vce of S4 are shown in Fig. 3.32 at 300V/10.5kW output in order
to verify the ZVS operation of the converter. Dual power supply voltages (+15V and
83
Vge1: 20V/grid
0V
Vce1:
500V/grid
+15V
-15V
Vge4: 20V/grid
Vce4: 500V/grid
+15V
0V
-15V
Time: 2uS/grid
Figure 3.33: The experiment test waveforms to show ZVS operation of primary side
bridge (S1 and S4) in reverse mode operation
Vge5: 20V/grid
Vce5:
200V/grid
0V
+15V
-15V
Vge8: 20V/grid
Vce8: 200V/grid
+15V
0V
-15V
Time: 2uS/grid
Figure 3.34: The experiment test waveforms to show ZVS operation of secondary side
bridge (S5 and S8) in reverse mode operation
84
-15V) are used for the gate driver. For reverse mode operation, ZVS can be achieved at
light load with inductor snubbers. ZVS operation of the reverse mode with 300Vds and
750Vdc /8.6kW reversed power is also shown. Fig. 3.33 shows ZVS of primary side bridge
(S1 and S4) and Fig. 3.34 shows that of secondary side bridge (S5 and S8).
3.7.3
Simulation Results for Transient Response In Reverse

Mode Operation
Vdc: 10V/grid
idc: 12.5A/grid
VAB: 500V/grid
iL1,iL2,iT3: 200A/grid
2: 50/grid
21: 50/grid
VCD: 500V/grid
1: 50/grid
: 50/grid
Figure 3.35: The simulated transient response of reverse mode operation for load change
in DC-link with proposed modulation technique (Vds =300V, Vdc =750V)
To verify the proposed modulation technique and LUT-based modulator, the converter
transient response in reverse mode operation was simulated in closed-loop control form.
The effectiveness of simulation platform can be verified by Fig. 3.24 - Fig. 3.31. For
simplicity the DC-link voltage (Vdc ) is sampled and regulated to be constant (750V) by
85
Vdc: 10V/grid
idc: 25A/grid
VAB: 500V/grid
iL1,iL2,iT3: 100A/grid
2: 50/grid
VCD: 500V/grid
1: 50/grid
21: 50/grid
: 50/grid
Figure 3.36: The simulated transient response of reverse mode operation for load change
in DC-link with proposed modulation technique (Vds =600V, Vdc =750V)
a PI controller whose output is connected to the phase angle input of the LUT-based
modulator as shown in Fig. 3.22. Vds is connected to a battery string. The load current
in DC-link side (idc ) switches between the half and full load. The waveforms of DClink voltage, load current, output voltage of primary and secondary bridges, current in
transformer primary and secondary windings, three phase-shift angles and the virtual
phase-shift angles at 300 Vds is shown in Fig. 3.35. The DC-link voltage can be regulated
with dynamic load change. The transient response at 600 Vds is shown in Fig. 3.36 and
Vdc is regulated as well.
3.7.4
The Efficiency and Loss Distribution Analysis
A power loss model was built for each component in the converter and the loss was
calculated based on the simulated waveforms, which will be used to predict the efficiency
86
Figure 3.37: The calculated efficiency and experiment tested efficiency in forward mode
with 300V and 600V output voltage Vds (Vdc = 750V )
of the series resonant DC-DC converter with clamped capacitor voltage in the 35kW full
load range. The calculated efficiency curves in forward mode operation with 300V and
600V output voltage are shown in Fig. 3.37. The experimental test efficiency points
with 15kW prototype in forward mode for 300V and 600V output are also shown in Fig.
3.37, which indicate good agreement with predicted efficiency in the power range of the
prototype. In the medium to heavy load range, the efficiency ranges from 94%-96% with
600V output voltage and 91%-92% with 300V output voltage. At light load condition,
efficiency drops below 90%. It can also be observed that the 300V output efficiency
decreases at high power output. One possible reason is the high loaded quality factor
Q with small load resistance at low output voltage, which causes large current in the
circuit. IGBT turn-off loss increases quickly at higher current with larger dv/dt, shorter
87
Figure 3.38: The calculated efficiency and experiment tested efficiency in reversed mode
with 300V and 600V output voltage Vds (Vdc = 750V )
Vce rise time (capacitor snubber is used) and more stored charge in the IGBT depletion
region. The larger phase-shift angle 1 is required for 300V output than that for 600V
output with the same output power. This will inject more current to D11&D12 and
result in higher clamping circuit loss at 300V. While for 600V output, the reactive power
and current in the circuit is kept in low level for full load and the phase-shift angle is
smaller as well.
The calculated efficiency curves in reversed mode operation with 300V and 600V
output voltage are shown in Fig. 3.38. The efficiency curve with 600V output voltage is
calculated based on the reverse modulation strategy 2. The experimental test efficiency
points with the prototype in reversed mode for 300V and 600V output are also shown
in Fig. 3.38. Compared to the forward mode efficiency, with 600V output voltage the
88
Figure 3.39: The power loss distribution for the 15kW prototype with 300V/12.8kW in
forward mode, total loss 1264W (Vdc = 750V, Vds = 300V )
Figure 3.40: The power loss distribution for the 15kW prototype with 300V/11.6kW in
reverse mode, total loss 2035W (Vdc = 750V, Vds = 300V )
reverse mode efficiency drops about 2% from the medium to high power level. This
is mainly due to the additional turn-off loss contributed by the secondary side IGBTs
89
S5 S8. With 300V output voltage, the efficiency drops about 2%-3% in medium to
heavy load range and more at light load condition. ZVS can be achieved without the
current injection from the auxiliary snubber circuits from medium to heavy load. The
efficiency drop at full load level can be observed as well for reversed mode operation at
300Vds . The DC-link voltage is fixed at 750V for both 300Vds and 600Vds with the same
DC-link load resistance. The reactive power can be indicated by phase-shift angles. With
300V battery pack voltage, it is more difficult to reverse the power flow because of higher
voltage gain. Therefore, the secondary side full bridge should lead the primary side full
bridge by a larger angle at full power level. And 21 increases to 90. However, this large
leading angle will also cause a higher ratio of reactive power in the circuit, which results
in more power loss and reduced efficiency in the circuit. While for 600Vds , it is easier to
reverse the power flow and 21 is kept as 36. The reactive power is much lower in the
circuit.
The power loss breakdown for the components of the series resonant DC-DC converter
with clamped capacitor voltage 15kW prototype for both forward mode and reverse mode
with 300V output voltage are shown in Fig. 3.39 and 3.40, respectively. Fig. 3.39 shows
the loss distribution with 300V output voltage and 12.8kW load in forward mode. The
loss distribution in reverse mode with 300V output voltage and 11.6kW reversed power
is shown in Fig. 3.40. It can be observed from Fig. 3.40 that the conduction and turn-off
loss of S3&S4 are larger than those of S1&S2. This is because based on Fig. 3.28 and
Fig. 3.29, the modulation strategy with 300Vds at 11.8kW output power in reversed
mode operation results in higher current stress (iL2 ) in T2, L2, S3/D3 and S4/D4 branch
than that (iL1 ) in T1, L1, S1/D1 and S2/D2 branch. In addition, at high reversed
power level with 300Vds , current stress imbalance of iL1 and iL2 is small and this issue
is mitigated. The loss analysis can be used to design the cooling system and estimate
90
components temperature rise, as well as to optimize the efficiency of the converter in the
future design, such as the loss reduction of IGBTs, transformer and resonant inductor,
etc.
3.8
Conclusion
A novel wide voltage range bi-directional series resonant DC-DC converter with clamped
capacitor voltage is proposed in this chapter. The design considerations and trade-offs
are presented. The converter exhibits excellent characteristics in forward mode such as
dual output V-I slopes, high reliability, short circuit fault current limit, high efficiency,
low EMI and wide operation voltage range. However, it cannot reverse the power flow
with conventional phase-shift modulation technique. As the major contribution of this
chapter, to enable bi-directional power flow, an advanced modulation strategy based on
three phase-shift angles is proposed to reverse the power flow and the optimum modulation trajectories with low and high output voltage in three-dimensional modulation space
are identified. The second contribution is the proposed methodology to identify optimum
operation trajectory for such a complex converter without analytical models, based on
the design of the experiment and the systematic numeric simulation approaches. The
third contribution is a look-up table based digital modulator to be able to interface with
conventional single-input single-output controller and to greatly simplify the close-loop
control of the proposed converter in wide voltage range. The bi-directional operation
of the series resonant DC-DC converter with clamped capacitor voltage is verified by a
scaled-down experimental prototype and the simulation waveforms coincide well with test
waveforms. The converter efficiency curves are calculated and tested for the bi-directional
operation. The converter loss distribution is analyzed.
91
Chapter 4
A Novel Multi-core Ultra-compact
and Efficient Bi-directional DC-DC
Converter
The objective of the novel multi-core ultra-compact and efficient bi-directional DC-DC
converter proposed in this chapter is to build an innovative intelligent integrated battery
module, in which the bi-directional power converter is mechanically packaged together
with a battery back, specifically, a low voltage and high current Li-ion battery pack. The
DC-DC converter boosts the module output voltage from low battery or supercapacitor
pack voltage to a required high system level DC-link voltage. This module serves as the
basic building block for the distributed energy storage devices (DESD). The distributed
energy storage device modularization enables the scalable capacity, fault tolerance, cell
imbalance tolerance and so on, which are big hassles for conventional series connected
high voltage battery packs, for the energy storage systems comprised of parallel connected
DESD modules [86]. The applications of DESD modules can be either in utility or in
92
electric vehicle industries. Despite so many advantages of the DESD modules, there are
demanding requirements for the bi-directional DC-DC converter in terms of the high
voltage gain to step up the battery pack voltage, high efficiency to obtain good round
trip efficiency of the module, high power density to reduce the volume and weight of the
module, and high current input to utilize low cost high capacity Li-ion batteries, etc.
The performance of high voltage gain bi-directional DC-DC converters is often limited
by their power density and efficiency due to the low voltage and high current input and
the large voltage difference between the battery pack and DC-link side. In order to
improve the performance of the distributed energy storage device (DESD) module, the
performance of the bi-directional DC-DC converter is critical. The performance of the
converter can be evaluated from several aspects for a distributed energy storage device:
Bi-directional power flow for charging and discharging operation;
High voltage gain: 32X (DC-link voltage is 400V and battery pack voltage is 12.8V);
High charging and discharging current: 100A (1C rate for 100Ah Li-ion battery
pack)
High power density: > 4kW/L (65.6W/in3 )
Low profile to achieve high DESD module energy and power density;
High power conversation efficiency:> 95% from medium to full load range.
The conventional dual active half bridge (DAHB) converter has the advantages of
minimal number of components. In [86] a dual active half-bridge converter was proposed
for DESD modularization. However, DAHB converter failed to meet the performance
93
targets for the integrated DC-DC converter as mentioned above. There are several limitations inhibiting the dual active half bridges bi-directional DC-DC converter to achieve
above objectives. The first limitation is the high frequency transformer leakage inductance. The transformer leakage inductance can be calculated by,
Lw =
0 c NH2 m a
3b
(4.1)
0 NH2 g c
b
(4.2)
Lg =
where a = D
.
2
D is the diameter of the round winding wire; NH is the number of turns
of high voltage winding; m is the number of winding layers; 0 is the air permeability; b,
c and g are core and winding geometry; Lw is the equivalent leakage inductance (referred
to high voltage side) accounting for the magnetic energy stored in winding space and
Lg (referred to high voltage side) is the equivalent leakage inductance accounting for the
energy stored in the space between primary and secondary windings. The total leakage
inductance corresponds to the sum of the magnetic energy stored in two winding spaces
and the space between two windings. Due to the high voltage gain, even when there is one
turn for the low voltage winding, there are 32 turns for high voltage winding (NH = 32).
The design and the test of the high frequency transformer show a leakage inductance
of 45uH because of the large number of turns in high voltage side [86]. On the other
hand, if the switching frequency is 200kHz, the calculated required leakage inductance
for 100A/12.8V input is only 10.9uH with 30 phase-shift angle. With conventional
transformer design with EE or ETD core structure, it is difficult to achieve such low
leakage inductance with a large number of turns. The high leakage inductance will block
the energy transferred through the converter and limit the output power.
Another disadvantage with convectional transformer design is that it is difficult to
94
obtain a low profile planar converter package which can be mechanically integrated with
the battery pack effectively and that doesnt have adverse impact on the DESD module
energy or power density, although it is still possible to achieve high power density for
DC-DC converter itself with conventional non-planar transformer core shapes and multiwinding structure [87]. A planar converter package is much more attractive in terms of
the module energy and power density.
The second limitation for DAHB is the low charging and discharging current. Due
to the skin and proximity effect, increasing the diameter or thickness of the high current
winding of the 1-turn low voltage winding doesnt help to reduce the winding loss. The
package thermal limit of the low voltage high current MOSFETs also imposes a limit on
the maximal current capability, which is far below 100A. To mitigate these issues, parallel
low voltage winding made of Litz wire and direct parallel of MOSFETs are one solution
[88]. However, parallel low voltage winding results in AC termination of the winding,
which causes additional termination loss at high frequency and high current conditions
[87].
The third limitation for DAHB is efficiency. The experiment tested full load charging/discharging efficiency is 88% [86], while the target efficiency is 95% for DESD modularization. The efficiency reported in [88] for a dual active full bridge (DAFB) converter
is 92% by the approach of direct hard parallel of low voltage winding and MOSFETs,
and there is still some efficiency gap.
The fourth limitation is the power density of the DAHB converter. The power density
of the prototype converter is 0.2kW/L due to the use of a conventional transformer and
200kHz switching frequency [86]. The target power density for DESD modularization is
4.0kW/L (65.6W/in3 ). Reference [88] reported the power density of 0.8kW/L for a 12V
to 336V and 1kW dual active full-bridge converter, which is still far below 4.0kW/L.
95
4.1
A Multi-core Bi-directional DC-DC Topology
To achieve high power conversation efficiency, it is important to minimize component

power loss on the low voltage and high current side of the power stage, which contributes
the major part of the loss. The low voltage and high power stage connects the battery
pack and consists of the transformer low voltage winding, battery side full bridge and
filter capacitors. To minimize the transformer low voltage winding loss, small length of
the high current winding is important. Despite the core geometry, using 1 turn in low
voltage winding results in the lowest winding resistance compare to multiple turns which
have longer length and additional AC termination loss. Therefore, the number of low
voltage winding is set to 1 (NL = 1). In addition, 1-turn low voltage winding simplifies
the layout of the high current power stage and helps to improve the power density of the
converter.
To achieve the high power density of the bi-directional DC-DC converter, increase of
the switching frequency is necessary. The number of the turns of the low voltage winding
is calculated by,
NL =
Vds
4 f Ae Bac
(4.3)
where Vds is the battery pack voltage, f is the switching frequency, Ae is the cross section
area of the magnetic core and Bac is the peak magnetic flux density. Since NL is fixed
at 1 to minimize the winding loss, and Bac is generally limited by the specific loss of
the transformer core at high frequency condition, the widely used method to reduce the
transformer core size (smaller cross section area) is to increase the switching frequency.
However, high frequency is not enough to achieve the high energy and power density
of the DESD module. A low profile and planar package of the bi-directional DC-DC
96
converter is necessary. The planar package can be easily integrated with the battery
pack module. In addition, the planar package has better thermal performance due to
the larger ratio of the surface area to the volume. Therefore, planar magnetic cores are
employed, instead of the conventional magnetic core shapes.
However, the window size of the planar transformer is smaller than that of the conventional transformer core shapes. Therefore, with either PCB winding or Litz winding,
it cannot accommodate a large number of turns for high voltage winding. In other words,
it cannot provide high voltage gain. For example, there is 1 turn for low voltage winding,
but the required number of turns for high voltage winding is 32. It is very difficult to
use planar magnetic cores to make such a transformer.
The multi-core transformer structure is proposed to utilize the planar magnetic cores
to achieve both low profile high power density package and high voltage gain. The large
number of high voltage winding turns can be divided into several groups and in each
group there are only several turns which can be acommodated by the planar transformer
window area. Then several windings in each planar transformer are series connected to
obtain the high voltage gain.
The multi-core structure also allows the use of multiple windings and more MOSFETs
on the low voltage and high current side. This is in accordance with the requirement to
process up to 100A charging and discharging current, because more silicon and copper
are necessary to reduce the power loss when high current is passing through. Each of
the multiple windings can be connected to a full bridge and results in a distributed high
current winding and full bridge layout. This type of structure has two advantages. The
first is to minimize the length of the high current path. Each low voltage and high current
winding can be connected locally to the transformer secondary winding, where the high
frequency AC current path is minimized, since the low voltage winding is selected to be
97
Section 1
L1
S3a
S5a
S4a
S6a
S3b
S5b
S4b
S6b
S3c
S5c
S4c
S6c
S3d
S5d
S4d
S6d
N:1:1
T1
C3a
C3b
1
1
C3c
T2
L2
N:1:1
Vd
C3d
S3e
L3
Vb
S5e
N:1:1
T3
C3e
S4e
S6e
S3f
S5f
S4f
S6f
S3g
S5g
S4g
S6g
S3h
S5h
S4h
S6h
C3f
2
2
C3g
T4
L4
N:1:1
Section 2
C3h
Figure 4.1: The novel multi-core based bi-directional DC-DC converter
one turn. It is much easier to handle high current in DC side by increasing the geometry
of the conductor because there is no skin effect. The second advantage is to eliminate
the AC termination of the low voltage high current winding. AC termination causes
additional termination loss which may be comparable to the winding loss under some
high frequency and high current conditions [87].
The proposed multi-core based bi-directional DC-DC converter topology is shown in
Fig. 4.1. Vdc = Vd is the DC-link voltage (high voltage side) and Vds = Vb is the battery
pack voltage (low voltage side). The high voltage side or the primary side consists of
a half bridge. There are two advantages for the half bridge configuration on the high
voltage side. The first is that it is also a voltage doubler in discharging mode. This will
reduce the total number of turns for series connected high voltage winding (the primary
98
transformer winding) by half, which fits more easily into the small planar transformer
window. The second advantage is that the capacitor half bridge blocks the DC current
path of the transformer primary winding and helps to balance the magnetic flux in the
transformer core.
Several planar magnetic cores are employed. For each of the planar transformer, 1 turn
is used for the secondary low voltage and high current winding. The 1-turn high current
winding can be implemented by the PCB winding with large copper track thickness.
Since each low voltage winding is connected to its full bridge with minimal distance,
the secondary side low voltage and high current full bridge can also be implemented by
PCB. Therefore, low cost two-layer PCBs are enough each planar transformer, and it can
accommodate two secondary windings and the corresponding full bridges. In addition,
only two-layer PCB is used to layout the power stage, which is more cost effective.
As a result, for each planar transformer, there are three windings magnetically coupled
together. One primary winding with several turns and two 1-turn secondary windings.
The output of the secondary winding is directly connected to a full bridge converter
locally. In the layout, the full bridge is put as close as possible to the planar transformer
to minimize power loss. The DC port of all the secondary side full bridges are parallel
connected with each other. To handle the large battery pack charging and discharging
current, parallel of transformer secondary windings and MOSFETs is necessary. Parallel
of the full bridge in DC port is better than parallel of the transformer winding in AC
port and the parallel MOSFETs directly, since it avoids the winding AC termination loss,
and more important, it is a modular and scalable structure. The two 1-turn secondary
windings and full bridges can be symmetrically placed from the electromagnetic point
of view. The current through each low voltage high current winding and full bridge is
balanced.
99
The primary windings of several planar transformers are series connected to increase
the voltage gain. The high voltage winding configuration is flexible. In addition to series
connection, the primary windings can also be divided into several paralleled groups. In
each group the windings are series connected and the terminals of different groups can be
connected in parallel to the high voltage side half bridge. Two groups of the high voltage
windings are shown in Fig. 4.1 as an example. The advantage of this configuration is
that it is possible to turn off half of the secondary side full bridges (turn off one group)
to improve the power conversion efficiency at light load condition.
4.2
Minimizing Parasitics Inductance
The battery side power stage has extremely large high-frequency AC current. The
di/dt during switch commutations is so high that the parasitic inductance due to the
MOSFET package and PCB layout has significant impact on the converter performance.
The energy trapped in parasitic inductance may cause additional power loss and the
associated ringing issue introduces severe EMI to the system.
4.2.1
Selection of Low Voltage High Current MOSFET Package
The low voltage and high current side MOSFETs are exposed to significant current
stress. Improvements in silicon technology over the years have significantly reduced MOSFET RDS(on) and the amount of heat generated by power semiconductors to the point
where packaging becomes the limit to higher performance devices. Reference [89] summarized and compared the state-of-the-art low voltage and high current MOSFET package
technology. Conventional wire-bonded SO-8 packages have four serious limitations:
1. High die free package resistance (DFPR): the package resistance is up to 1.6m
100
typical and 50% of total RDS(on) is due to the internal source to lead bonding wires;
2. Package inductance: internal wirebonds introduce parasitic inductance on the gate,
drain and source terminals. Source parasitic inductance will slow down the switching speed of MOSFET and generate significant ringing;
3. High junction-to-PCB thermal resistance: the MOSFET drain is attached to the
lead frame, which is molded into a plastic;
4. High junction-to-case (top) thermal resistance.
In addition to SO-8 package, some often used low voltage and high current MOSFET
packages include,
DPAK package: solves some of the thermal limitations of traditional SO-8 package,
but it still has large size, high package resistance and source inductance.
CopperStrap SO8 (PowerConnect) package: replaces the wirebonds connecting the
source to the leadframe by a solid copper strap that covers the surface of the die. 10-20%
thermal resistance reduction can be obtained and source resistance decreases from 1.0m
to 0.4m. It has the same footprint with the traditional SO-8 package (now it is the
standard SO-8 package).
PowerPak package: improves the thermal contact between the die and the PCB board
by removing the molding compound below the lead frame and placing the metal of the
lead frame in direct contact with the PCB. It also results in a lower profile device (1mm
thickness). Similar packages include M LP , LF P AK T M , SuperSO8T M , W P AK T M ,
P owerF latT M and Bottomless SO 8T M , etc.
DirectFET package: there is an increasing demand not to dump heat onto the motherboard. Top-side cooling through a heatsink becomes increasingly popular. The silicon
101
die is mounted in a copper housing. The bottom of the package consists of a die specifically designed with source and gate contact pads that can be soldered directly to the
PCB. The copper can forms the drain connection from the other side of the die to
the board. This package eliminates the conventional lead frame and wirebonds that are
the main source of package resistance and eliminates the plastic packaging that limits
the thermal performance of most SMT packages. The high frequency switching performance of DirectFET is exceptionally good. DirectFET is such an ultimate package
that the silicon once again becomes the limiting factor in further MOSFET performance
improvement [89].
The package of Infineon Super SO8T M and IR DirectF ET are among the packages
with the minimal parasitic inductance, which is far below 1nH, and low package resistance
as well. They are considered for the low voltage and high current full bridges in the
battery pack side.
4.2.2
Minimize Layout Parasitic Inductance
The layout of one of the multi-core transformers and its two low voltage high current
full bridges are shown in Fig. 4.2.
There are two 1-turn low voltage and high current windings for this planar transformer. Two-layer PCB technology is used. One PCB winding is on the top layer and
the other is on the bottom layer. Four MOSFETs with low package inductance are put
next to the PCB winding to reduce the winding resistance. The filter capacitors are
put next to the MOSFETs. The PCB winding, four MOSFETs and filter capacitors are
put as close as possible to minimize the high frequency AC loop area such that both
the loop resistance and parasitic inductance can be minimized. It is also the case that
the use of 1-turn low voltage and high current winding facilitates the compact layout of
102
Top
Layer
Capacitors MOSFETs Winding
Driver
Bottom
Layer
Drivers
Winding
MOSFETs Capacitors
Figure 4.2: The layout of one planar transformer with 2 low voltage winding and 2 full
Topside
bridges in low voltage
View
secondary side transformer windings and full bridges. The MOSFET gate drive should
also be put as close as possible to the MOSFET. To meet this requirement, the driver
ICs are soldered to the back side of the MOSFETs layer. For the MOSFETs on the top
layer, gate drivers are placed to the bottom layer at the same position. Similarly, for
the MOSFETs on the bottom layer, the drivers are placed to the corresponding position
on the top layer. The layout of the two PCB windings, two full bridges and their gate
drivers are completely symmetrical, helping to balance the current of two bridges.
4.3
4.3.1
Transformer Design and Trade Off

High Frequency Core Material
Several types of magnetic core materials can be considered for the high frequency
transformer of DC-DC converters, as shown in Table 4.1.
103
Table 4.1: High frequency soft magnetic core materials

Material
Series
Silicon steel
Arnold Arnon5
Amorphous
Metglas 2605SA1
Nano-crystalline Hitachi Finemet FT-3M
Nano-crystalline
VAC Vitroperm500F
Nano-crystalline
Magmet Namglass 4
Ferrite
Ferroxcube 3C96
Ferrite
Epcos N97
Ferrite
Ferroxcube 3F35
Ferrite
Epcos N49
Bsat (T )
@ 25C
1.48
1.56
1.23
1.20
1.23
0.44
0.41
0.48
0.48
Strip thickr
ness (um)
127
High
25
High
18
High
N/A
High
25
High
N/A
Medium
N/A
Medium
N/A
Low
N/A
Low
An important consideration for high frequency transformer design is core loss. At

low frequency such as 50Hz or 60Hz line frequency condition, the design will generally
be limited by the saturation flux density of the core materials. But at high frequency,
the design will be limited by the core loss. A widely used calculation of specific core loss
is the Steinmetz equation,
Pcv = K f Bac
(4.4)
where Bac is the peak flux density amplitude, Pcv is the time-average power loss per unit
volume, and f is the frequency of sinusoidal excitation, and K, , and are constants
found by curve fitting [90]. The Steinmetz equation coefficients were extracted for the
magnetic core materials listed in Table 4.1 based on the core loss graph from manufacturer
datasheets. These coefficients are listed in Table 4.2, where the unit for Pcv is mW/cm3 ,
and f and Bac use kHz and Tesla respectively [91].
Silicon steel materials have high saturation flux density (about 1.5T) and high per-
104
Table 4.2: Extracted Steinmetz equation coefficients for different magnetic core materials
Core materials
Silicon steel
Amorphous
Finemet FT-3M
Vitroperm500F
Namglass 4
3C96
N97
3F35
N49
K (mW/cm3 )
278.4
46.7
8.03
2.48
3.75
42.8
44.0
0.0087
0.025
1.39
1.51
1.62
1.80
1.71
1.53
1.36
2.95
2.54
1.80
1.74
1.98
2.08
1.97
2.98
2.72
2.94
2.55
meability. Some manufacturers provide laminations with gauges as low as 1mil or 25um.
However, compared with other transformer magnetic materials such as ferrite, nanocrystalline and amorphous cores, their specific loss is relatively high when the frequency
increases to several kHz range. So silicon steel materials are used in the low frequency
range such as from line frequency to 1 kHz.
Amorphous cores also exhibit high saturation induction (1.56T) and high permeability. The core is laminated with 1mil amorphous tape. The specific core loss is several
times lower than that of silicon steel but still higher than that of nanocrystalline and
ferrite cores. However, the cost of amorphous core is relatively low and the performance
to cost factor is excellent in several kHz frequency range. The mechanical strength is
strong to build larger transformers. In addition, cut C-core with large geometry and
I-core formers are commercially available, offering more design flexibilities. For low frequency applications, the peak magnetic flux density is one of the major limiting factors.
High peak flux density can be potentially selected for amorphous materials in several
kHz range.
105
The nanocrystalline core materials are very promising for higher frequency range. The
nanocrystalline core is metallic tape-wound core made of nanocrystalline soft magnetic
material. It exhibits high saturation flux density (1.2T) and extremely low specific loss
up to about 100 kHz frequency. Table 4.2 shows the specific core loss from several
nanocrystalline core manufacturers, which exhibit the lowest core loss up to 100kHz
frequency. On the other hand, 1.2T saturation flux density allows the selection of high
operating peak flux amplitude. Therefore, with nanocrystalline core materials, the high
frequency transformer can be potentially designed to be more compact and efficient
in 1kHz-100kHz frequency range than the ferrite core design. However, there are also
several disadvantages for nanocrystalline cores. The first is the relatively high material
cost. Secondly, although special shapes in oval or rectangular design with or without cut
can be produced, the standard off-the-shelf core shape is toroidal uncut tape-wound core.
One typical soft magnetic core material used from several tens kHz to several MHz
frequency range for high-frequency transformers is ferrite. It can be seen in Table 4.2 that
the ferrite core loss is very low. And the cost of ferrite core materials is also relatively
low. However, there are two major disadvantages for ferrite materials. The first is the
low saturation flux density. At room temperature, it is around 0.4T and it becomes
worse when core temperature increases. This can potentially result in a larger core size
in low frequency range due to the limited peak flux density. The second disadvantage
is that ferrite cores are brittle. It is difficult to build a large transformer with ferrite.
However, when the frequency is higher than 100kHz, generally the ferrite materials will
be the choice, because in the high frequency range, the size is limited by the specific core
loss which limits the peak magnetic flux density to lower level, not by saturation flux
density. Ferrite core materials provide lowest specific core loss from 100 kHz to several
MHz frequency range.
106
Since there is only one turn for the secondary side low voltage and high current
winding, the frequency must be boosted to several hundred kHz to obtain reasonable
magnetizing current and core size. Several ferrite soft magnetic core materials such as
3C96, 3F3, 3F35, 3F4 and 3F45 from Ferroxcube can be considered for the multi-core
bi-directional DC-DC converter design in the switching frequency range of 100kHz to
1MHz.
4.3.2
Magnetizing Inductance and Core Size
The magnetizing inductance (referred to the low voltage side) is calculated by,
Lm =
0 NL2 Ae
lm
+ lg
r
(4.5)
where 0 is the air permeability and r is the relative permeability of the core. NL is the
number of the turns of low voltage winding, if the magnetizing inductance is referred to
the low voltage side. Ae is the cross section area of the core. lm is the length of the core
magnetic path and lg is the thickness of the air gap and no fringing effect is considered
by Equation (4.5).
For the transformer, the core cross section area is,
Ae =
Vds
4 f NL Bac
(4.6)
where f is the switching frequency, Vds is the battery pack terminal voltage and Bac is
the peak magnetic flux density in the core.
Substitute Equation (4.6) into Equation (4.5), one obtains,
107
Lm =
0 NL Vds
4 ( lmr + lg ) f Bac
(4.7)
The peak-to-peak magnetizing current is,
im =
Vds
2 Lm f
(4.8)
Substitute Equation (4.7) to Equation (4.8), one obtains,
im =
2 ( lmr + lg ) Bac
0 NL
(4.9)
If r is assumed to be independent of frequency and lm is fixed, the magnetizing

current is propotional to the peak flux density Bac .
Figure 4.3: The magnetizing current, core loss and volume with different Bac based on
3F35 materials and EQ core series
The magnetizing current and the core loss are plotted in Fig. 4.3 as a function of
108
Figure 4.4: The layout area for the low voltage side with different core sizes and correspondint Bac
Bac . The frequency for the calculation is 500kHz. The magnetic path length, relative
permeability and the size are obtained from the datasheet of the commercial Ferrite EQ
series cores. The EQ shape has both low height and a circular center leg cross section
shape with the minimal mean length per turn for the winding. It is assumed that all
the magnetizing current is provided by the low voltage side with Vds = 12.8V . 1m air
gap thickness is used to represent the imperfect match of the two-core pair. The core
material used for calculation and comparison is 3F35.
It can be seen in Fig. 4.3 that when core size is reduced, the magnetizing inductance
also decreases because of the smaller core cross section area and the magnetizing current
increases. If the output current of 1 planar transformer with two low voltage windings
and full bridges is 25A, 5A peak-to-peak magnetizing current is 20% of the load current.
The magnetizing current contributes to the ZVS of secondary side MOSFETs but large
109
magnetizing current causes additional conduction loss. It should be below 20% of load
current from a practical point of view. When the load is reduced below 20% of the full
load, magnetizing current provides major inductive current for ZVS at light load. It can
also be observed in Fig. 4.3 that when core size reduces, Bac increases greatly such that
the core generates substantially more power loss, although the core volume Ve becomes
smaller. This is not preferred because it decreases the converter efficiency and has the
potential to thermally run away. If one planar transformer with two low voltage windings
and full bridges outputs 25A DC current or 320W power,typically the core loss should
be below 0.3% of the full load power for a high efficiency transformer design, which is
approximately 1W.
The layout area of the one planar transformer and two low voltage and high current
windings and full bridges, illustrated in Fig. 4.2, is plotted in Fig. 4.4 with different
core sizes. The layout area is defined by a rectangle which includes all of the components
for the low voltage side power stage of one channel. It can be seen in Fig. 4.4 that the
cores with size smaller than EQ30 dont have big impact on the layout area of the low
voltage side power stage, which is the indication of the power density. However, when
the core size is larger than that of EQ30, the layout area begins to increase rapidly. This
is because the width of the core is larger than the width of the full bridge and results in
more unused area.
Based on the above analysis, in order to control the magnetizing current and core loss
to a reasonable level, it is better to select smaller Bac and larger core size. The larger
core size also provides larger window area for the primary winding. On the other hand,
the larger core size will not cause a drastic increase of the layout area if it is smaller than
EQ30. As the result, EQ30 core size is a good tradeoff.
Several ferrite soft magnetic materials from Ferroxcube were tested for the magnetiz-
110
Figure 4.5: Tested magnetizing loss with different core material for one EQ30 core size
ing loss excited by the low voltage side full bridge. The test was conducted at 500kHz
switching frequency with Vds = 12.8V . The power loss includes the core loss and the full
bridge loss. The test results are shown in Fig. 4.5.
The test results show that at 500kHz switching frequency, 3F35 material provides
the lowest magnetizing loss, including the loss of MOSFET full bridges. 3F35 material is
optimized for 500kHz while 3F4 and 3F45 materials are better suited for higher frequency
range such as 1MHz. They have lower specific loss than that of 3F35 in a higher frequency
range than 500kHz. Therefore, EQ30 core pair with 3F35 material is selected.
4.3.3
High Current PCB Winding
The transformer secondary side low voltage and high current PCB windings are implemented by PCB (printed circuit board). The PCB windings conduct high frequency
(e.g. 500kHz) AC current and the current through the windings are significantly higher
than that in conventional applications. So the thicker copper trace on PCB should be
111
Figure 4.6: The current distribution of the transformer based on 2D FEA simulation
results
considered. The optimal winding thickness is analyzed in this section.
Figure 4.7: The current distribution in PCB windings based on 2D FEA simulation
results at 500kHz
The cross section of the transformer window with 10-turn Litz-wired primary winding
and two 1-turn secondary PCB windings is shown in Fig. 4.6. The transformer is modeled
112
in the 2-dimensional FEA (finite element analysis) software in the R-Z coordinate (polar
coordinate) system. Simulations were conducted to find the current distribution in the
windings and calculate the winding AC resistance as the result of the skin and proximity
effects under high frequency condition.
Figure 4.8: The winding AC resistance accounting for skin and proximity effects based
on 2D FEA simulation
The current distribution in the transformer windings at 500kHz is shown in Fig. 4.7.
The Litz wire is not sensitive to the skin and proximity effect due to its multi-strand
and twisted configuration. So the current in the 10-turn primary winding is distributed
evenly in the winding cross section area. The PCB winding is a thin solid copper.
The thickness of the copper trace may be larger than the skin depth of copper at high
frequency condition. So the PCB winding AC resistance is sensitive to the skin and
proximity effect. It can be determined from Fig. 4.7 that the current density at the trace
edge is larger than that in the inner part. Due to stronger magnetic field in the space
between the primary winding and secondary windings, the current density is also larger
113
at the surface adjacent to the primary winding than that at the surface adjacent to the
other secondary winding. The PCB winding resistance at high frequency is significantly
higher than the DC resistance.
Figure 4.9: The winding AC resistance at 500kHz with different PCB track thickness
based on 2D FEA simulation
The PCB winding resistance with different copper thickness (1oz = 35m) and with
different frequencies based on the EQ30 core geometry is plotted in Fig. 4.8. In low
frequency range, the winding resistance is not sensitive to the frequency but is sensitive to
the copper thickness. The thickness of the copper has great impact on winding resistance.
But in the high frequency range, winding resistance is not sensitive to the copper thickness
and is sensitive to the frequency. There is little difference for the winding resistance at
extremely high frequency range.
The dominant component of the transformer current harmonics comes from the fundamental frequency component. For example, the fundamental frequency component
is 500kHz sinusoidal current if the switching frequency is 500kHz. The PCB winding
114
resistance at 500kHz with different copper thicknesses is plotted in Fig. 4.9. In small
copper thickness range, the PCB winding resistance decreases quickly with increased
copper thickness. In large copper thickness range, the winding resistance no longer decreases with increased copper thickness. In other words, the winding resistance cannot
be further reduced by an increase in the thickness of copper. The optimal PCB trace
copper thickness is 4oz (140m), which is also a practical value for the conventional PCB
manufacture process.
4.3.4
Series Inductor Integration
Figure 4.10: Insert of the FPC film layers increases the leakage flux between primary
and secondary windings
Generally the magnetic integration approach is employed to achieve the high power
density package for the power electronic converters. The fundamental operating principle
of the multi-core based bi-directional DC-DC converter, as shown in Fig. 4.1, is similar
to the operating principle of the dual active bridges (DAB) converter. For each planar
115
transformer, two low voltage high current windings and full bridges can be considered
hard paralleled on DC side and operated as one full bridge in low voltage side. The
primary side half bridge is shared by several planar transformers through the combination
of series and parallel connections. But for the high voltage primary winding of each planar
transformer, the voltage is still a square wave. The power flow is controlled in the phase
shift manner between the primary and secondary bridge gate signals. There is an inductor
connected in series with the transformer primary winding. This series inductor will be
implemented by controlled leakage inductance of the planar transformer. The leakage
inductance is shown in Fig. 4.1 as L1 to L4 for planar transformer T1 to T4 , respectively.
Figure 4.11: The required leakage inductance with different switching frequency based
on multi-core bi-directional DC-DC converter configuration
Generally the intrinsic leakage inductance of the planar transformer is very low due
to the low profile window shape, low number of turns or winding layers, and small space
116
between the primary winding and secondary winding. The leakage inductance can be
increased by insertion of magnetic shunt layers in the space between the primary winding
and secondary winding. Fig. 4.10 shows the flux distribution with inserted low permeability soft magnetic films based on the 2D FEA simulation. The leakage inductance can
be calculated by,
Llk =
N
ip
(4.10)
where N is the number of turns for the high voltage winding, ip is the high voltage winding
current, and is the magnetic leakage flux between the high voltage and low voltage
windings. From Equation 4.10, the leakage inductance can be increased by insertion of
low permeability shunt layers and increase of the magnetic flux in the shunt layers. The
shunt layers consist of ferrite polymer films (FPC) with the material relative permeability
equal to 9. The thickness of the magnetic shunt layers can be controlled by the number
of film layers.
The required series inductance of each planar transformer can be calculated by,
Llk =
Vp N Vds ( )
2 2 Pi f
(4.11)
where Llk is the required leakage inductance, Vp the amplitude of the square-wave voltage
of the high voltage winding of the planar transformer, N is the number of turns for the
transformer high voltage winding (the low voltage winding is 1 turn), Vds is the battery
pack voltage, is the phase shift angle between the primary winding and the secondary
winding voltage. Pi is the power transferred by one planar transformer. f is switching
frequency. For illustration, the required leakage inductance is plotted in Fig. 4.11 with
the following configuration and this configuration is considered as optimal configuration
117
Leakage Layers
Top Half
Core
Bottom Half
Core
Insulation Layers
Figure 4.12: The construction of the planar transformer with integrated inductor
by the analysis in the Chapter 4.4, and the architecture is shown in Fig. 4.1.
The number of planar transformers: 4;
The number of turns for primary winding in each core: N = 8;
The number of series connected primary winding: 2;
The number of parallel connected primary winding groups: 2;
The amplitude of square-wave voltage for primary winding of each transformer:

Vp = 100V ;
The amplitude of square-wave voltage for secondary winding: Vds = 12.8V ;
The power transferred by each planar transformer: Pi = 320W ;
At 500kHz switching frequency, the required leakage inductance (referred to the high
voltage winding) is around 3uH.
118
The construction of the planar transformer is also shown in Fig. 4.10, except that
the number of turns for the high voltage windings is 8. The prototype is shown in Fig.
4.12. All the stacked insulation layers and magnetic shunt FPC layers are spread out for
illustration. The insulation layer is made of 0.25mm Nomex paper. There are total 8
FPC film layers installed into one planar core. 4 layers were put above the top-layer PCB
winding and the other 4 layers were put below-bottom layer PCB winding. Insulation
layers were also inserted between the FPC layers and PCB winding.
Figure 4.13: The test results of the controlled leakage inductance with FPC film layers
(referred to the high voltage winding side)
The experimental test results for the generated leakage inductance (referred to the
high voltage winding of the transformer) with different thickness of the magnetic shunt
layers are shown in Fig. 4.13. 8-turn primary winding and 10-turn primary winding
were used for the test, respectively. 10-turn high voltage winding generates more leakage
inductance than 8-turn winding. The leakage inductance also increases with thicker
119
magnetic shunt layers. It can be seen that 8 turns of the primary side winding with 8
0.2mm-FPC-film layers generate around 3H leakage inductance.
4.4
Multi-core Architecture Optimization
The multi-core based bi-directional DC-DC converter provides flexibility for selecting
the number of planar transformers and low voltage high current full bridges to achieve
high power density and high efficiency. As discussed at the beginning of this chapter,
power density and efficiency are the objectives for optimization. For distributed energy
storage device (DESD) modularization, design objective for power density is higher than
4kW/L(65.6W/in3 ) and the objective for full load efficiency is higher than 95%.
Figure 4.14: The calculated low voltage side power loss and the distribution with different number of full bridges
120
The loss of the low voltage high current PCB winding, the conduction loss of MOSFETs, the switching loss of MOSFETs, the gate drive loss of MOSFETs, the loss of filter
capacitors and the total low voltage side loss are calculated and plotted in Fig. 4.14 with
different number of low voltage full bridges. Two low voltage and high current full bridges
share one planar transformer. When the number of paralleled full bridges increases, the
PCB winding loss, the conduction loss of MOSFETs and the filter capacitors loss are
reduced. The gate drive loss due to the gate charge cannot be ignored at high frequency
conditions. When more and more MOSFETs are used, the gate drive loss increases linearly with the number of devices. The switching loss decreases at the beginning and then
increases with more full bridges in parallel. As a result, the total low voltage side loss
decreases fast at the beginning when more full bridges are paralleled. However, when the
number of full bridges is larger than 12, there is little reduction for the total low voltage
side loss. The total loss even increases slightly as more full bridges are used.
Figure 4.15: The single LV side MOSFET loss and the thermal limit
121
The power loss of a single MOSFET is calculated and plotted in Fig. 4.15. The
gate drive loss is not included. When more devices are used, the loss of single device is
reduced. The PCB copper traces are used as heat sinks for the MOSFETs. The allowed
power loss of each MOSFET is 1.5W due to the thermal limit. Because of the thermal
limit of MOSFETs on PCB, the minimal required number of paralleled full bridges is 7.
Figure 4.16: The power density of the multi-core based bi-directional DC-DC converter
with different number of LV side full bridges
It is shown in Fig. 4.14 that the total low voltage side loss cannot be further reduced
by increasing the number of full bridges when more than 12 bridges are used. On the other
hand, more devices used in the converter will increase the cost. In the meamtime, the
power density of the converter decreases when more full bridges are used. The calculated
power density of the multi-core based bi-directional DC-DC converter is shown in Fig.
4.16. It can be found that to meet the power density objective of 4kW/L the number
122
of paralleled full bridges cannot begreater than 10. It adds another constraint for the
optimization of the number of full bridges.
Figure 4.17: Optimization of the number of low voltage side full bridges based on the
defined FOM
In order to select the optimal number of low voltage side full bridges, the figure of
merit (FOM) is defined as,
F OM
P ower density
Low voltage side total loss
(4.12)
Since the low voltage side total loss is the dominant component of the converter loss, and
high voltage side loss is the minor part and independent of the number of low voltage full
bridges, the low voltage side total loss is used to define the FOM. The optimal number
of paralleled bridges is to maximize the FOM.
The figure of merit (FOM) with a different number of full bridges is plotted in Fig.
123
4.17. With the constraints from the thermal limit and the power density, the number of
full bridges is between 7 and 10. The unit for the power density used here is W/in3 and
the unit for loss is W . It can be determined from Fig. 4.17 that when 8 full bridges are
selected, the maximal FOM is obtained.
4.5
Deadtime Optimization
Figure 4.18: The gate signals of one bridge leg and AC port output of the full bridge in
low voltage side with large deadtime
The battery side is with low voltage and high current. Synchronous rectification (SR)
of low voltage side MOSFETs is generally used to improve the converter efficiency. Since
the fundamental operational principle of multi-core based bi-directional DC-DC converter
requires the active control of all the MOSFETs in the converter, synchronous rectification
is naturally realized due to the active gate drive of the low voltage and high current side
MOSFETs. However, during the deadtime period both the MOSFETs in the high side
124
and the low side of the full bridge leg are turned off, the anti-parallel diode of the
MOSFET conducts. The AC terminal voltage of the low voltage side full bridge is shown
in Fig. 4.18. The period when the MOSFET body diodes conduct can be easily observed.
This will add more losses and reduce the power converter efficiency.
Figure 4.19: The no load loss of one full bridge in low voltage side with different deadtime
settings
On the other hand, the small deadtime will cause the potential shunt through between
the high side and the low side MOSFETs and damage the devices. The deadtime of the
low voltage side full bridges is optimized at no load condition. The magnetizing current
is circulating in the low voltage side full bridges.
The no load loss of one full bridge in low voltage side with different deadtime is shown
in Fig. 4.19. The bridge loss decreases when the deadtime is reduced because the diodes
conduct for less time. When the deadtime is smaller than 110nS, the full bridge loss
increases drastically because of the shunt through of the leg. The optimal deadtime used
125
Figure 4.20: The gate signals of one bridge leg and AC port output of the full bridge in
low voltage side with optimal deadtime
in the circuit is 120nS for the low voltage side full bridge.
The gate signals of one low voltage side full bridge leg and the AC port output voltage
of the full bridge with optimal deadtime are shown in Fig. 4.20. The conduction of the
anti-paralleled diode of MOSFET is not obvious.
The optimal deadtime may change with the direction and amplitude of the power
flow. In that sense, the adaptive deadtime compensation based on the power flow can
further improve the converter efficiency.
4.6
The Experimental Verification
The picture of the prototype of multi-core based bi-directional DC-DC converter is

shown in Fig. 4.21. The dimensions of the converter are also labeled in the Fig. 4.21.
The converter is mounted on a copper busbar. The copper busbar is used as the current
collector to aggregate the DC output port of all the low voltage side full bridges. The
126
16mm
(0.63in)
130mm
(5.12in)
121mm
(4.76in)
Figure 4.21: The prototype of the multi-core based bi-directional DC-DC converter
converter can be mounted to the 12.8V/100Ah Li-ion battery pack through the busbar.
The busbar also serves as the heat sink for the two high voltage side MOSFETs.
The total volume of the prototype is 0.252L or 15.4in3 and the power density of the
prototype is 5.1kW/L or 83W/in3 . The height of the converter is only 16mm and the
low profile and planar package of the converter is realized which helps it to be integrated
with the battery pack in a compact way.
The specifications of the converter are listed in Table 4.3. The corresponding topology
is shown in Fig. 4.1. The switching frequency is 500kHz. Based on the optimization
results, the number of the low voltage side full bridges is 8. 4 EQ30 planar transformer
core pairs were used and each of the core has two full bridges. The primary side windings
were divided into two groups. In each group, the two 8-turn primary winding were series
connected to improve the converter voltage gain. The two groups of primary windings
were parallel connected to the high voltage side half bridge. Litz wire was used to build
127
Table 4.3: Specifications of the multi-core based bi-directional DC-DC converter

Battery pack nominal voltage (Vds )
DC bus voltage (Vdc )
Battery pack capacity
1C charge/discharge power rating (Po )
Bi-directional topology
Switching frequency (f )
High voltage side MOSFETs:
Low voltage side MOSFETs:
High frequency transformer core size:
Number of turns for high voltage winding NH (per core)
Number of turns for low voltage winding NL (per core)
Magnetizing inductance (referred to NH ) (per core)
Leakage inductance (referred to NL ) (per core)
Number of planar transformers (EQ30)
Number of low voltage winding and full bridges
Total number of low voltage full bridges
12.8V
400V
100Ah
1280W
Multi-core based
500kHz
STW45NM50FD
BSC014N03LS G
EQ30
8
1
3uH
3.5uH
4
2
8
the high voltage windings.
Figure 4.22: The tested charging mode waveforms at full load
128
Figure 4.23: The tested efficiency curve for charging mode
The experiment tested waveforms for the charging mode operation at full load is shown
in Fig. 4.22. The waveforms of the AC port terminal voltage of two low voltage side full
bridges in one planar transformer, the AC port terminal voltage of the high voltage side
half bridge, and the current waveforms in one group of the high voltage winding were
measured. Due to the selection of the components with low parasitic inductance and the
layout with minimal loop area, both the voltage and the current waveforms are clean.
The experiment tested efficiency for the charging mode operation from light load to
full load is plotted in Fig. 4.23. The full load output current is 100A. The efficiency from
40A to 100A is higher than 95%. The maximal efficiency of 96.0% is achieved at around
60A output. At light load of 20A output, the efficiency drops to 91.6%. The efficiency
design objective for DESD modulariztion is achieved.
129
4.7
Conclusion
In order to enhance the performance of a distributed energy storage device consisting

of a low string of high capacity batteries and an ultra-compact and high efficiency bidirectional DC-DC converter, a multi-core bi-directional DC-DC converter was proposed
to fulfill the requirements such as high voltage gain, high charging and discharging current, high power density, high efficiency and planar package, as the major contribution
in this chapter. The advantages of the multi-core topologies are discussed. Parasitic
inductance is minimized by selection of a proper MOSFET package and maintaining
minimal loop area of PCB layout. Another contribution in this chapter is the proposal
of a multi-objective optimization method for the multi-core converter. The planar transformer design is optimized in terms of the core material, the power loss, the PCB layout
area and the thickness of the low voltage high current PCB winding. A magnetic integration approach is used to improve the power density of the converter. The series
inductance in the topology is provided by the controlled leakage inductance of the planar transformer with inserted low permeability magnetic shunt films. The number of
planar cores and the low voltage side full bridge is selected based on a multi-objective
optimization approach to simultaneously achieve high power density and high efficiency.
Deadtime is also optimized to reduce conduction loss of the low voltage side MOSFET
anti-parallel diodes. An experimental prototype was developed which achieved the power
density of 5.1kW/L (83W/in3 ). The power conversion efficiency from 40A to 100A is
higher than 95% and the maximum efficiency is 96.0%.
130
Chapter 5
Advanced Modulation Techniques to
Enhance Multi-core Converter
Performance
5.1
The Modulation Technique to Obtain Full-load

and Wide Voltage Range ZVS for the Multi-core
Topology
With the increased use of energy storage devices in a variety of applications, there is a
growing need for bi-directional power conversion. The applications of particular interest
are electric vehicles, electric vehicle charging infrastructure, renewable power generation
systems, hybrid power sources. Particularly challenging are the applications where the
energy storage system voltage varies substantially during normal operation as it does
for batteries, supercapacitors or fuel cells. In most applications, high power conversion
131
efficiency is required for all operating conditions.

The dual active bridges (DAB) DC-DC converter, shown in Fig. 5.1, is a widely used
isolated bi-directional DC-DC converter. Conventional modulation strategy uses a phase
shift between two full bridges to control the direction and amplitude of the power flow,
while both bridges output square-wave voltage at the switching frequency. However, the
optimal operating voltage and load range is limited, making it unsuitable for wide voltage
range applications. Advanced modulation strategies based on two variables can improve
the DAB performance [74][73][77][76][75].
S1/D1
A
Vdc
C1
S2/D2
S5/D5
Xfmr
S3/D3
Llk
B
S4/D4
S7/D7
C
N:1
S6/D6
C2
Vds
S8/D8
Figure 5.1: The conventional dual-active-bridge (DAB) bi-directional DC-DC converter
As described in Chapter 4, the multi-core based high voltage gain bi-directional DCDC converter can be optimized to achieve very high efficiency. However, when the voltage
of the battery energy storage devices varies, or when the output is under light load
conditions, zero voltage switching (ZVS) is lost and efficiency drops in a similar manner
as the DAB converter. In this chapter, a novel modulation technique is proposed for the
multi-core based high voltage gain bi-directional DC-DC converter topology as discussed
in Chapter 4, and the topology is shown here again in Fig. 5.2. Vb represents the low
voltage battery pack and Vd represents the system DC-link voltage (high voltage side).
132
Section 1
L1
S3a
S5a
S4a
S6a
S3b
S5b
S4b
S6b
S3c
S5c
S4c
S6c
S3d
S5d
S4d
S6d
N:1:1
T1
C3a
C3b
1
1
C3c
T2
L2
N:1:1
Vd
C3d
S3e
L3
Vb
S5e
N:1:1
T3
C3e
S4e
S6e
S3f
S5f
S4f
S6f
S3g
S5g
S4g
S6g
S3h
S5h
S4h
S6h
C3f
2
2
C3g
T4
L4
N:1:1
Section 2
C3h
Figure 5.2: The multi-core based high voltage gain bidirectional DC-DC converter
The high voltage side consists of a half bridge inverter or a voltage doubler rectifier. The
low voltage side consists of eight full bridges with the DC terminals in parallel to process
high current. Four high frequency transformers, which have one high voltage winding and
two low voltage windings coupled together, are used to achieve high voltage gain. Two
high voltage windings are connected in series to further increase the voltage gain. The
transformers and low voltage full bridges are grouped into two same sections. In each
section, there are two transformers with their high voltage windings series-connected and
with four magnetically coupled full bridges. The two sections are parallel connected at
terminal a and o. The operation principle of the two sections can be exactly the same.
For two full bridges coupled by two low voltage windings of the same transformer,
the gate signals of MOSFETs at the corresponding positions are same. For example, the
133
gate signals of S3a and S3b are the same. So the device voltage and current are same for
these two full bridges. Therefore, to simplify the analysis, one section of the proposed
topology in Fig. 5.2 can be simplified to the topology shown in Fig. 5.3, in which the
two low voltage windings and two full bridges of each transformer are lumped into
one low voltage winding and one full bridge, because they are just hard paralleled to
increase the current rating. In order to illustrate the proposed modulation strategy in
a clear and simple way, the description and analysis are based on the topology in Fig.
5.3. L represents the total equivalent inductance seen by the high voltage winding side
of the transformers. For the multi-core based bi-directional DC-DC converter, based
on the proposed modulation strategies zero voltage switching (ZVS) can be obtained in
both wide voltage range and full load range. The operation principle of the converter
is analyzed in this paper. The modulation strategy and optimum operation region are
addressed. A 400kHz 14.4V to 360V/450W prototype was used to verify the analysis
and the operation of the proposed modulation technique.
iR1
iL
iS1
31
iS31
N:1
1
1
41
a
Vd
31
61
iR2
32
iS32
N:1
52
Vb
ib
iS2
Figure 5.3:
converter
51
42
32
62
The simplified multi-core based high voltage gain bi-directional DC-DC
134
5.1.1
The Discharging Mode Operation
The discharging mode operation is defined here as the power transferred from the low
voltage battery side Vb to the high voltage DC-link side Vd , when a low string battery
pack is connected to the low voltage side.
The proposed converter operation waveforms for the discharging mode operation are
illustrated in Fig. 5.4. V1 is the amplitude of the square-wave voltage between a and o
in the high voltage side, as shown in Fig. 5.3. In steady state, V1 is equal to the half
of the DC-link voltage Vd , or the capacitor voltage VC1 or VC2 . V2 is the amplitude of
the three-level voltage between b and o in the high voltage side. It is the sum of the
voltage across the high voltage winding of two transformers T1 and T2 . Vcd , Vef are the
square-wave voltage across the low voltage winding of two transformers respectively. The
amplitude of Vcd and Vef is equal to the battery pack voltage Vb . V2 should be designed
to be higher than V1 for the proposed modulation technique to operate correctly. The
low voltage side current waveform iR is defined by,
iR = iR1 + iR2
(5.1)
where iR1 and iR2 are shown in Fig. 5.3. The voltage reference polarity and current
reference direction are labeled in Fig. 5.3 as well. In discharging mode operation, Vbo
should lead Vao by a phase-shift angle . The phase-shift angle is defined in Fig. 5.4,
where the center points of the voltage pulse of the waveforms of Vbo and Vao are used as
the reference time instant to calculate the phase-shift angle . For the low voltage side,
Vcd and Vef are modulated in the phase-shift manner as well, where Vcd leads Vef by an
angle of (1 m) such that a three-level voltage waveform with pulse duty cycle m
can be generated for Vbo , and I call m modulation index.
135
V1=Vd /2
ao
V2
bo 31
(1-m)
cd
Vb
ef
Vb
I1
L
I0
I3
I2
S1
S31
S32
R
Figure 5.4:
technique
2 3
4 5 6
7 8
The discharging mode operation waveforms of the proposed modulation
From Fig. 5.5, at the time instant t0 , the current in the equivalent series inductor L
is negative and S1 is turned on with zero voltage switching (ZVS). In the time interval
136
iR1
iL
iS1
31
iS31
N:1
1
1
41
a
Vd
51
31
61
iR2
32
iS32
N:1
52
Vb
ib
iS2
42
32
62
Figure 5.5: The discharging mode operation interval t0 - t1
t0 - t1 , Vao is equal to Vd /2, while Vcd is Vb and Vef is -Vb . Vbo is zero, since it is the sum
of these two voltages multiplied by the transformer turns ratio N . Therefore, the energy
stored in L is discharged to C1 and the inductor current decreases. The energy stored in
the filter capacitor C31 is discharged into C32 .
iR1
iL
iS1
31
iS31
N:1
1
1
41
a
Vd
51
31
61
iR2
32
iS32
N:1
52
iS2
42
32
62
137
Vb
ib
In the time interval t1 - t2 , Vao is still equal to Vd /2 and Vbo is zero. The current in
L becomes positive and continues increasing, as shown in Fig. 5.6. The inductor L is
charged such that S32 and S62 will be turned on with ZVS next. The energy stored in
the capacitor C32 is discharged back to C31 .
iR1
iL
iS1
31
iS31
N:1
1
1
41
a
Vd
51
31
61
iR2
32
iS32
N:1
52
Vb
ib
iS2
42
32
62
In Fig. 5.7, at the instant t2 , S32 and S62 are turned on with ZVS. Then Vef becomes
positive (Vb ). Therefore, Vbo is equal to 2 N Vb (=V2 ) and is higher than Vd /2 (=V1 ).
The energy stored in the inductor L is discharged to the output capacitor C31 and C32 .
At the time instant t3 , the current in the inductor L becomes negative. In the time
interval t3 - t4 (Fig. 5.8), the inductor L is charged and the energy is transferred from
the output capacitor C31 and C32 to the DC-link side C1 such that S41 and S51 will be
turned on with ZVS next. The time interval t3 - t4 is a longer interval such that it is the
major period in discharging mode operation for the energy being transferred from the
low voltage battery side to the high voltage DC-link side.
138
iR1
iL
iS1
31
iS31
N:1
1
1
41
a
Vd
51
31
61
iR2
32
iS32
N:1
52
Vb
ib
iS2
42
32
62

iR1
iL
iS1
31
iS31
N:1
1
1
41
a
Vd
51
31
61
iR2
32
iS32
N:1
52
Vb
ib
iS2
42
32
62
At the time instant t4 , S41 and S51 are turned on with ZVS. Then Vcd is equal to -Vb
and Vbo becomes zero again. The energy stored in the inductor L is discharged into C1
and the current decreases. The energy stored in the capacitor C32 is discharged into the
capacitor C31 , as shown in Fig. 5.9.
In the time interval t5 - t6 , the inductor L is charged again by the DC-link capacitor
139
iR1
iL
iS1
31
iS31
N:1
1
1
41
a
Vd
51
31
61
iR2
32
iS32
N:1
52
Vb
ib
iS2
42
32
62
C1 and the current in L becomes positive (Fig. 5.10). The energy stored in L will be used
to turn on the high voltage side switch S2 with ZVS next. In this interval, the energy in
C31 is discharged back into C32 .
iR1
iL
iS1
31
iS31
N:1
1
1
41
a
Vd
51
31
61
iR2
32
iS32
N:1
52
iS2
42
32
62
140
Vb
ib
In Fig. 5.11, at the time instant t6 , S2 is turned on with ZVS and Vao becomes
negative (-Vd /2). The other half cycle of one switching period begins. After S2 is on, the
energy stored in the L is discharged into C2 and the current in the inductor L decreases.
Since Vbo is still zero, the energy in C31 continues discharging into C32 in the time interval
t6 - t7 .
The second half cycle operation of the proposed modulation technique is similar to
the first half cycle operation described above, since the topology is symmetrical. In Fig.
5.4, it can be concluded from the switch current waveforms of S1 , S31 and S32 that ZVS is
obtained for all the switches in the multi-core based high voltage gain bi-directional DCDC converter in discharging mode operation with the proposed modulation technique.
5.1.2
The Charging Mode Operation
The charging mode operation is defined as the power transferred from the high voltage
DC-link side Vd to the low voltage battery side Vb , when a low string of batteries are
connected in the low voltage side.
The proposed converter operation waveforms for the charging mode operation are
illustrated in Fig. 5.12. Again, V1 is the amplitude of the voltage between a and o in
the high voltage side, as shown in Fig. 5.3. In steady state, V1 is equal to the half of
the DC-link voltage Vd , or the capacitor voltage VC1 or VC2 . V2 is the amplitude of the
voltage between b and o in the high voltage side. It is the sum of the voltage across the
high voltage winding of two transformers T1 and T2 . Vcd , Vef are the voltages across the
low voltage winding of two transformers. The amplitude of Vcd and Vef is equal to the
battery pack voltage Vb .
The voltage reference polarity and current reference direction are labeled in Fig. 5.3.
In charging mode operation, Vao should lead Vbo by a phase-shift angle . The phase-
141
V1=Vd /2
ao
31
V2
bo
(1-m)
cd
Vb
ef
Vb
I1
L
I3
I2
I0
S1
S31
S32
R
0 1
4 5 6
Figure 5.12: The charging mode operation waveforms of the proposed modulation technique
shift angle is defined in Fig. 5.12, where the center points of the voltage pulse of the
waveforms of Vao and Vbo are used as the reference time instant to calculate the phase-
142
shift angle. For the low voltage side, Vcd and Vef are also modulated in the phase-shift
manner, where Vcd leads Vef by an angle of (1 m) such that a three-level voltage
waveform with voltage pulse duty cycle m can be generated for Vbo .
In charging mode operation, the time intervals of operation principles are similar to
the discharging mode operation. The figures of different time intervals for discharging
mode operation can also be used to describe charging mode operation, but the charing
mode operation waveforms are shown in Fig. 5.12. From Fig. 5.5, at the time instant t0 ,
the current in the equivalent series inductor L is negative and S1 is turned on with zero
voltage switching (ZVS). In the time interval t0 - t1 , Vao is equal to Vd /2, while Vcd is Vb
and Vef is -Vb . Then Vbo is zero, since it is the sum of these two voltages multiplied by
the transformer turns ratio N . Therefore, the energy stored in L is discharged to C1 and
the inductor current decreases. The energy stored in the filter capacitor C31 is discharged
into C32 .
In the time interval t1 - t2 , Vao is still equal to Vd /2 and Vbo is zero. The current in
L becomes positive and continues increasing, as shown in Fig. 5.6. The inductor L is
charged such that S32 and S62 will be turned on with ZVS next. The energy stored in
the capacitor C32 is discharged back to C31 .
In Fig. 5.7, at the time instant t2 , S32 and S62 are turned on with ZVS. Then Vef
becomes positive (Vb ). Therefore, Vbo is equal to 2N Vb (=V2 ) and is higher than Vd /2
(=V1 ). The energy stored in the inductor L is discharged to the output capacitor C31
and C32 . In the meanwhile the energy is transferred from the DC-link side capacitor C1
to the output capacitor C31 and C32 . The interval t2 -t3 is longer than that in discharging
mode and is the major period to charge the battery pack.
At the time instant t3 , the current in the inductor L becomes negative. In the time
interval t3 - t4 (Fig. 5.8), the inductor L is charged and the energy is transferred from
143
the output capacitor C31 and C32 back to the DC-link side C1 such that S41 and S51 will
be turned on with ZVS next.
At the time instant t4 , S41 and S51 are turned on with ZVS. Then Vcd is equal to -Vb
and Vbo becomes zero again. The energy stored in the inductor L is discharged into C1
and the current decreases. The energy stored in the capacitor C32 is discharged into the
capacitor C31 , as shown in Fig. 5.9.
In the time interval t5 - t6 , the inductor L is charged again by the DC-link capacitor
C1 and the current in L becomes positive (Fig. 5.10). The energy stored in L will be used
to turn on the high voltage side switch S2 with ZVS next. In this interval, the energy in
C31 is discharged back into C32 .
In Fig. 5.11, at the time instant t6 , S2 is turned on with ZVS and Vao becomes negative
(-Vd /2). The other half cycle of one switching period begins. After S2 is on, the energy
stored in the L is discharged into C2 and the current in the inductor L decreases, since
Vbo is still zero. The energy in C31 continues discharging into C32 in the time interval t6
- t7 .
The second half cycle operation of the proposed modulation technique is similar to
the first half cycle operation described above, since the topology is symmetrical. In Fig.
5.12, it can be concluded from the switch current waveforms of S1 , S31 and S32 that ZVS
is obtained for all the switches in the proposed multi-core based high step-up ratio bidirectional DC-DC converter with the proposed modulation technique in charging mode
operation.
144
5.1.3
The Steady State Analysis of the Converter with the Proposed Modulation Strategy
Based on Fig. 5.4 and Fig. 5.12, in the time interval t0 - t2 , Vao =V1 =Vd /2 and Vbo =0,
so the inductor current is,
iL (t) = I0 + V1
1
(t t0 )
L
(5.2)
In time interval t2 - t4 , Vbo =V2 =2 N Vb , let V1 < V2 , the inductor current decreases,
iL (t) = I1 (V2 V1 )
1
(t t2 )
L
(5.3)
In time interval t4 - t6 , Vbo = 0 and the inductor current increases again,
iL (t) = I2 + V1
1
(t t4 )
L
(5.4)
In steady state, I3 = I0 , and also substitute the high voltage bridge to low voltage
bridge phase-shift angle and the phase-shift angle between the two low voltage side
bridges (1 m) into (5.2) - (5.4), one obtains,
V1 + m V2
4 L fs
(5.5)
m V2 m V1 2 V1
4 L fs
(5.6)
m V2 + m V1 2 V1
4 L fs
(5.7)
I0 =
I1 =
I2 =
where fs is the switching frequency, m is the modulation index of Vbo . Define the voltage
ratio d,
145
d=
V2
V1
(5.8)
and since V2 is designed to be higher than V1 , d > 1. The power transferred by the
converter is,
2 V1
P =
Ts
t6
iL (t)dt =
t0
V12 m d
||
2 L fs
(5.9)
where Ts is the switching cycle period and the unit of is rad. The rms current of the
inductor is,
irms
Z
2 t6 2
=
i (t)dt
Ts t0 L
p
V1 3(3md 2 + m3 d 2 + 3m2 d2 2 2m3 d2 2 + 2 + 12md2 )
=
12 L fs
(5.10)
Define the reactive power of the converter as,
Q = i2rms XL = 2 i2rms fs L
(5.11)
Substitute (5.10) into (5.11) and the ratio of the output power to the reactive power
is,
Rpq =
P
Q
12 m d ||
=
2
3
2
3md + m d + 3m2 d2 2 2m3 d2 2 + 2 + 12md2
For the high voltage side switch S1 and S2 to obtain zero voltage switching,
146
(5.12)
I0 =
V1 + m V2
< 0,
4 L fs
or m <
V1
1
=
V2
d
(5.13)
It can be seen that the ZVS of high voltage side switches is only controlled by the
phase-shift angle of the two low voltage full bridges (1 m) , or the modulation index
m. It is not related to .
In order to obtain the ZVS for the low voltage side switches, (5.14) must be satifsfied,
m V2 m V1 2 V1
>0
I1 =
4 L fs
,
m V2 + m V1 2 V1
I2 =
<0
4 L fs
Figure 5.13: The optimum modulation index m to minimize Rpq
147
(5.14)
By simplifying (5.14), one obtains
<
(d 1)
2
,
> m (1 d)
2
or || <
m
(d 1)
2
(5.15)
Therefore, in order to obtain ZVS for the low voltage side full bridges, there is an upper
limit for the value of phase-shift angle . In addition, there is also a limit for the maximun
low voltage side to high voltage side phase-shift angle for the proposed modulation
strategy in this section. From Fig. 5.4 and Fig. 5.12, the proposed modulation technique
requires (t2 t0 ) > 0. Therefore, the phase-shift angle should meet,
|| < (1 m)
and |max | = (1 m)
(5.16)
In order to find the optimum modulation index m for given V1 , V2 or d, the maximum
ratio of the output power to reactive power can be obtained by solving,
Rpq = 0
dm
dR =0
pq
dd
(5.17)
and then selecting the result which simultaneously meets (5.13), (5.15) and (5.16). The
optimum m is shown in Fig. 5.13 with different ratio of V1 to V2 . Since the DC-link voltage
is generally fixed, the different voltage ratio can represent the change of low voltage side
battery pack voltage. It can be concluded that when the optimum modulation index m
or the phase shift between the two low voltage side full bridges is selected based on given
V1 and V2 , ZVS for high voltage side switches S1 and S2 can be guaranteed, regardless of
the load conditions in wide voltage range.
To find the optimum operation region of the proposed converter, the ratio of the
148

Figure 5.14: The ratio of the output power to reactive power and low voltage side ZVS
region
output power to the reactive power, defined by (5.12), is plotted in Fig. 5.14. The ZVS
boundary for switches defined by (5.15) and maximal phase-shift angle defined by (5.16)
are also shown in Fig. 5.14. By operating the converter in the region with optimum
modulation index m and small range, ZVS can be obtained for full load range and
wide voltage range for all the switches, and high efficiency can be potentially obtained.
5.1.4
Experiment test results
The experiment test is conducted with the prototype described in Chapter 4. In order
to guarantee V2 > V1 and to verify the operation of proposed modulation technique for
multi-core based bi-directional DC-DC converter with wide voltage and full-load range
149
ZVS, Vb is selected as 14.4V, and Vd is selected to be 360V. The specification of this

prototype is listed in Table 5.1.
Table 5.1: The test conditions for the multi-core based bi-directional DC-DC converter
to verify the proposed modulation technique
Parameters
Value and Unit
Low voltage side voltage Vb
14.4V
High voltage side voltage Vd
360V
Switching frequency fs
400kHz
Transformer turns ratio N : 1 : 1
8:1:1
Number of transformers in each section
2
Equivalent series inductance in each section
12uH
Optimum modulation index m
0.665
cd
ef
ao
Figure 5.15: Test waveforms of the prototype with d = 1.28, m = 0.665, = 15
150
cd
ef
ao
Figure 5.16: Test waveforms of the prototype with d = 1.28, m = 0.665, = 0 (no load)
The test waveforms of the prototype in charging operation with d = 1.28, m =

0.665, = 15 are shown in Fig. 5.15. The inductor L current waveform is measured in the high voltage side of the transformer in one section. In this case, the high
voltage side output Vao leads the amplified low voltage side output Vbo by .
The test waveforms at no load condition are shown in Fig. 5.16 with d = 1.28, m =
0.665 but = 0. The ZVS is obtained for all the switches even at no load condition.
With conventional single-angle based modulation technique, ZVS at no load is generally
lost. Fig. 5.17 shows the ZVS of high voltage side switch S1 and Fig. 5.18 shows the
ZVS of low voltage side MOSFETs S41 and S42 from the two phase-shifted low voltage
full bridges.
The tested efficiency of the proposed modulation technique for the multi-core based
high voltage gain bi-directional DC-DC converter is shown in Fig. 5.19 for both charging
151
Figure 5.17: Test waveforms of ZVS for HV side MOSFET S1 at no load
ds42
gs42
gs41
ds41
Figure 5.18: Test waveforms of ZVS for LV side MOSFETs S41 and S42 at no load
152
Figure 5.19: The efficiency test results for the proposed modulation technique
and discharging mode operation. At 450W, the measured maximum efficiency of the
prototype is 94.1%.
5.1.5
Conclusion
A novel modulation technique to achieve wide voltage range and full load range ZVS
operation with the multi-core based high voltage gain bi-directional DC-DC converter
is proposed for battery or ultra-capacitor energy storage applications. By shifting the
square-wave output voltage of low voltage side full bridges and coupling multi-core transformers, ZVS can be obtained for all the switches in the converter. The direction and
magnitude of the power flow is controlled by the phase shift angle between the high voltage half bridge and low voltage full bridges. An experiment prototype was used to verify
the analysis as well as the operation of proposed modulation technique. High voltage
gain and ZVS are proved experimentally. 94.1% efficiency is achieved at 450W.
153
5.2
A High Resolution Digital Phase-shift Modulation Technique
5.2.1
The Effective Operation Range of the Phase-shift Angle
To illustrate the effective operation range of the phase-shift angle for the multi-core
based bi-directional DC-DC converter, the simplified topology shown in Fig. 5.3 is used.
As mentioned before, two modulation techniques can be used for the multi-core topology.
The first one is shown in Fig. 5.20 and is similar to the conventional dual active bridges
(DAB) converter, where both Vao and Vbo are switching-frequency square waves applied
to the inductor L. The amplitude and direction of the power flow is controlled by the
phase-shift angle . I call it single-angle phase-shift technique. The second modulation
technique is proposed in this chapter and discussed above, as shown in Fig. 5.20, where
two phase-shift angles are used. Vao is a sqaure wave and Vbo is a three-level voltage
waveform. The amplitude and direction of the power flow is still controlled by the high
voltage side to low voltage side phase-shift angle , whereas the low voltage side phaseshift angle (1m) between two full bridges or the modulation index m is used to handle
the wide operating voltage range and ZVS. I call it dual-angle phase-shift technique.
For the single-angle phase-shift technique, the power transferred by the the multi-core
converter in Fig. 5.3 is,
Po =
Vd N Vb ( )
2 2 L fs
(5.18)
where Vd is the system DC-link voltage, Vb is the low voltage battery pack terminal
voltage, N is the transformer turns ratio of the high voltage winding to the low voltage
winding for each transformer, L is the total equivalent series inductance which is lumped
154
Vao
Vbo
Vgs1
Vgs2
Vgs31,
Vgs61
Vgs41,
Vgs51
Vgs32,
Vgs62
Vgs42,
Vgs52
Figure 5.20: The single-angle phase-shift modulation technique for multi-core converter
Vao
Vbo
Vgs1
Vgs2
Vgs31,
Vgs61
Vgs41,
Vgs51
(1-m)
Vgs32,
Vgs62
Vgs42,
Vgs52
Figure 5.21: The dual-angle phase-shift modulation technique for multi-core converter
155
to the high voltage winding side, fs is the switching frequency, and is the phase-shift
angle between the high voltage side half bridge and the low voltage side full bridges as
defined in Fig. 5.20.
To evaluate the reactive power in the circuit, the parameter D is defined as,
D=
Vd
Vd /2 NL
=
2 Vb NH
4 N Vb
(5.19)
where NH is the number of turns of the transformer high voltage winding, NL is the
number of turns of the transformer low voltage winding, and N = NH /NL . Substitute
Equation (5.19) into Equation (5.18), one obtains,
Po =
Vd2 ( )
8 D 2 L fs
(5.20)
The ratio of the reactive power Q to output power P for the multi-core converter
based on single-angle phase-shift modulation technique is calculated as,
Q/P =
p
1
12 D + 3 (1 D)2
6 D ( )
p
(1 + D)2 2 (3 2) + (1 D)2 ( )2 ( + 2)
(5.21)
The ratio of the reactive power to output power Q/P is shown in Fig.5.22, where the
reactive power is defined by the product of rms current through the series inductance L
and rms voltage across it, described by (5.21).
Based on Fig.5.22, minimum ratio of reactive power to output power is obtained
with D = 1 at any phase-shift angle , and the ZVS range is maximized. It can also
be concluded from Fig.5.22 that, the smaller the phase-shift angle is, the lower the
ratio of the reactive power Q to the output power P can be obtained when D is 1. On
156
D=0.5, 2
Q/P
D=1.5
D=0.75
D=0.9, 1.1
D=1.0
Phase shift angle (rad)
Figure 5.22: The ratio of Q to P with single-angle phase-shift technique
the other hand, practically neither of the transformer turns ratios N can be selected to
match (5.19) perfectly, nor the battery pack voltage is constant. For example, even 10%
variation of D (D = 0.9 or D = 1.1) can result in otherwise increased Q/P in the small
phase-shift angle range. This increase is not preferred at full load condition and then
the maximum phase-shift angle corresponding to the full power cannot be too small.
In the meanwhile, large phase-shift angle also results in high Q/P . Therefore, as a
trade off, typically the maximum phase-shift angle m (corresponding to the full load) is
limited to 20 30 or /9 /6 rad range.
Based on this conclusion, the transformer turns ratio is,
N=
NH
Vd
=
NL
4 Vb
The required total series inductor is obtained by,
157
(5.22)
L=
Vd2 ( )
8 2 Po f s
(5.23)
For the dual-angle phase-shift modulation technique, from (5.9), the output power
for the topology shown in Fig. 5.3 is,
Po =
Vd2 mopt d
8 L fs
(5.24)
d=
V2
4 N Vb
=
V1
Vd
(5.25)
where,
mopt is the optimal modulation index for a given d, as shown in Fig. 5.13. Vd is the DClink voltage and Vb is the battery pack voltage. L is the total equivalent series inductance
lumped to the transformer high voltage windings. fs is the switching frequency.
The ratio of the output power P to the reactive power Q for the dual-angle phaseshift modulation technique is shown in Fig. 5.14. It can be concluded from Fig. 5.14
that the maximum limit for the phase-shift angle , as defined in Fig. 5.21, is 15 or
/12 rad. In this operating range, the wide voltage range and full load range of ZVS can
be guaranteed. The limit of for dual-angle phase-shift modulation technique is even
smaller than that for single-angle phase-shift modulation.
5.2.2
Low Resolution Issue of Digital Phase-shift Control at

Ultra-high Frequency
The state-of-the-art digital micro-controller unit (MCU) or digital signal processor

(DSP), like TI TMS320F28335, has powerful integrated enhanced pulse width modulation
158
(ePWM) modules to generate multiple-channel PWM signals or phase-shift pulse width

modulation (PSPWM) signals. These modules work well until reaching the high switching
frequency range (e.g. 100kHz) for most of the standard industrial applications. The DSP
clock frequency is up to 150MHz which generates a 6.67nS clock period.
TBPRD
Vgs1
Carrier,
Counter 1
Vgs1
TBPRD
TBPHS2
Vgs3,4
Carrier,
Counter 2
CMPA2
Vgs31,61
Vgs41,51
Figure 5.23:
Phase-shift modulation signal generated by ePWM module from
TMS320F28335
One method to generate phase-shift modulation signals from the digital controller is
shown in Fig. 5.23. The counter is used as the carrier signal, where TBPRD is the period
register for the counter 1 and 2. Since the counter is configured as up-and-down mode,
the switching frequency fs of the gate signals is,
fs =
fclock
2 TBPRD
(5.26)
where fclock is the DSP clock frequency. Vgs1 is the gate signal for S1 with 50% duty cy-
159
cle. It can be set to high when the counter reaches zero and set to low when the counter
reaches TBPRD. Vgs31 &Vgs61 and Vgs41 &Vgs51 are gate signals to drive the low voltage
side full bridge. They are also with 50% duty cycle but complementary with each other.
The deadtime can be generated automatically by ePWM modules. These gate signals
are generated by comparing the counter register value with the comparator register value
(see Fig. 5.23). The comparator register is configured as,
CMPA =
TBPRD
2
(5.27)
The phase-shift control is implemented by the phase register TBPHS. The clocks
for counter 1 and counter 2 are synchronized. Each time when counter 1 reaches zero,
the counter 2 is updated by TBPHS value. Therefore, by controlling TBPHS value,
the phase-shift modulation is implemented. From Fig. 5.23, when TBPHS=0, the low
voltage side lags the high voltage side by 90; when TBPHS=TBPRD/2, the phase-shift
angle = 0; when TBPHS=TBPRD, the low voltage side leads the high voltage side by
90.
The resolution of the phase-shift modulation implemented with above conventional
technique can be calculated by,
Re =
100%
TBPRD max
(5.28)
where max (rad) is the maximum operating phase-shift angle. Substitute (5.26) into
(5.28), one obtains
Re =
2 fs
100%
fclock max
160
(5.29)
Figure 5.24: The resolution of digital phase-shift modulation with ePWM modules
The resolution of the digital phase-shift modulation signals generated with conventional standard ePWM modules from TMS320F28335 is shown in Fig. 5.24, with different
maximum phase-shift angle max at different switching frequency. The lower the Re is,
the better the resolution. At 500kHz switching frequency for the multi-core based bidirectional DC-DC converter, when max = 30, the resolution is 4.0%. Whereas in
digital control, typically 0.1% resolution is considered as high resolution.
5.2.3
High Resolution Digital Phase-shift Modulation Scheme
A state-of-the-art digital signal processor (DSP) such as TI TMS320F28335 provides

high resolution micro-edge positioning (MEP) technology which can generate a clock
cycle with 150pS. However, these signals are not available for ePWM modules. Microedge positioning should be programmed for insertion into each counter step and it is used
as the triangle carrier signal. The automatic deadtime generation unit is not available
and the deadtime should also be synthesized by the proposed scheme.
161
Vgs1
Carrier,
Counter 1,
Master
Vgs1
CMPA2
CMPA3
Vgs3-6
Carrier,
Counter 2, 3
Slaves
TBPHSHR
Vgs31,61
Vgs41,51
Figure 5.25: The high resolution digital phase-shift modulation scheme
One scheme to generate the high resolution phase-shift modulation signals for the
ultra-high frequency multi-core based bi-directional DC-DC converter is shown in Fig.
5.25. The counter 1 is used to generate the synchronous clocks for the other slave counters,
and to generate complementary gate signals Vgs1 and Vgs2 for the high voltage side half
bridge with standard ePWM module.
However, for the other side bridges, which are here as low voltage side full bridges, the
gate signals cannot be generated from ePWM modules due to the low resolution issue.
First of all, the high resolution phase-shift modulation scheme needs to generate the
deadtime for the two complementary switches in one bridge leg. This can be implemented
162
by adding some bias value to the comparator register value,
TBPRD
CMPA2 =
+ DB
2
,
CMPA3 = TBPRD DB
2
and DB =
TDB fclock
2
(5.30)
where TDB is the required deadtime, CPMA2 and CPMA3 are comparator register values
for the counter 2 and 3 respectively.
Instead of the ePWM modules, the high resolution phase angle register TBPHSHR
is used to generate the phase-shift signals with the time resolution of 150pS. The clock
generated by the MEP together with counter clock is shown in Fig. 5.26. The number
of the MEP clocks that can be inserted into each CPU clock is calculated by,
Figure 5.26: The clock generated with micro-edge positioning (MEP) for high resolution
phase-shift modulation
163
SF =
1
fclock TM EP
(5.31)
where fclock is the DSP CPU clock or the counter clock, TM EP is the time resolution of
the micro-edge positioning. For TMS320F28335 TM EP is about 150pS. The resolution
of the proposed high resolution phase-shift modulation scheme can be calculated by,
RHR =
2 fs
100%
SF fclock max
(5.32)
Figure 5.27: The improvement of the resolution with the proposed high resolution phaseshift modulation scheme
Based on (5.32), the improved resolution of the proposed high resolution phase-shift
modulation scheme is plotted in Fig. 5.27 and compared to the resolution of the con-
164
ventional ePWM modules. It can be concluded from Fig. 5.27 that with max = 30 at
500kHz, the resolution of the phase-shift modulation is improved to less than 0.1%.
5.2.4
The Gate Signal Loss Issue in Dynamic Feedback Control

and the Solution
When the close-loop feedback control is applied to the proposed high resolution phaseshift modulation scheme as shown in Fig. 5.25, there is the issue of gate signal loss for
the low voltage side full bridges with the dynamic feedback control where the phase-shift
angle is adjusted in real-time mode. The gate signal loss is illustrated in Fig. 5.28.
Vgs1
Carrier,
Counter 1,
Master
Vgs1
CMPA2
CMPA3
Vgs3-6
Carrier,
Counter 2, 3
Slaves
TBPHSHR
TBPHSHR
Vgs31,61
Vgs41,51
Figure 5.28: The loss of the low voltage side gate signal in dynamic feedback control
As shown in Fig. 5.28, at the beginning the high resolution phase-shift register
TBPHSHR is lower than the value of CPMA3. Then the controller updates the phase-
165
shift angle or TBPHSHR register value, which is larger than CPMA3. At the instant
highlighted by the circle, the counter 1 reaches zero and the new phase-shift register value
is updated for both counter 2 and counter 3. Since the new TBPHSHR value is higher
than CPMA3, the counter 3 and CPMA3 loses an event to set Vgs41 & Vgs51 to zero in
the next switching cycle, resulting in all the switches in a low voltage full bridge being
turned on simultaneously. This is an error or fault state because it shorts the battery
pack and also shorts the low voltage winding of the transformer for at least one and a
half switching cycle.
Figure 5.29: The tested waveforms for Vgs41 and Vgs51 loss in dynamic feedback control
The experiment tested waveforms for the loss of the low voltage side full bridge gate
signal Vgs41 and Vgs51 in the close-loop feedback control are shown in Fig. 5.29. Because
TBPHSHR jumps from below CPMA3 to above CPMA3, Vgs41 and Vgs51 are not set
to low when Vgs31 and Vgs61 are high, causing high fault current in the high frequency
166
Figure 5.30: The tested waveforms for Vgs31 and Vgs61 loss in dynamic feedback control
Vgs1
Carrier,
Counter 1,
Master
CMPB1
CMPA1
Vgs1
=0
CMPA2
CMPA3
Operating range of
TBPHSHR
Vgs3-6
Carrier,
Counter 2, 3
Slaves
TBPHSHR
Vgs31,61
Vgs41,51
Figure 5.31: The improved high resolution phase-shift modulation scheme to avoid gate
signal loss in dynamic feedback control
167
transformer.
A similar phenomenon occurs for Vgs31 and Vgs61 when TBPHSHR jumps around
CPMA2. The experiment tested waveforms for the loss of the low voltage side full bridge
gate signal Vgs31 and Vgs61 in the close-loop feedback control are shown in Fig. 5.30.
Because TBPHSHR jumps from below CPMA2 to above CPMA2, Vgs31 and Vgs61 are
not set to high when Vgs41 and Vgs51 are low. In this scenario, none of the switches
conducts current in the next switching cycle. Although there is no high fault current
in the high frequency transformer, this can still generate unexpected disturbance for the
close-loop feedback control.
To address these issues, the improved high resolution phase-shift modulation scheme
to avoid the loss of low voltage side full bridge gate signals is shown in Fig. 5.31.
To prevent TBPHSHR from jumping around CPMA2 or CPMA3, the used range of
TBPHSHR is limited between zero and CPMA3. To obtain a unified high resolution
phase-shift modulation scheme for both charging and discharging operation, the gate
signals for = 0 are re-aligned and shown in Fig. 5.31. In this scenario, both CPMA1
and CPMB1 are required to generate a complementary gate signals Vgs1 and Vgs2 for the
high voltage side half bridge.
5.2.5
Experimental Validation of High Resolution Phase-shift

Scheme
The experimental test results for the proposed high resolution phase-shift modulation
scheme, which is implemented with TMS320F28335 and the multi-core bi-directional
DC-DC converter prototype, are shown in Fig. 5.32. With conventional phase-shift
modulation scheme generated by ePWM modules, when the phase-shift angle varies
168
Figure 5.32: The experimental test results for the proposed high resolution phase-shift
modulation scheme
Vd: 50V/grid
id: 0.5A/grid
iL: 2A/grid
Vb: 5V/grid
Figure 5.33: The experimental test results of transient response of the proposed high
resolution phase-shift modulation scheme
between 1.2 and 0, or between 0 and 1.2, there is no phase time change between
the gate signals of Vgs31 and Vgs1 . But around 0, there is a large step change of 6.7nS.
With the proposed high resolution phase-shift modulation scheme, the resolution with
169
max = 30 is improved to lower than 0.1% and a linear correlation between the phaseshift angle and time delay is obtained, as illustrated in Fig. 5.32 from -1.2 to 1.2.
Fig. 5.33 shows the experimental test results of the transient response of the multicore bi-directional DC-DC converter prototype with the proposed high resolution phaseshift modulation scheme. The single angle phase shift scheme is used in the test and
implemented with the high resolution technique as shown in Fig. 5.31 and Fig. 5.32.
The test is conducted in discharging mode and the DC-link voltage is regulated by a
digital PI controller. The load change is applied in the DC-link side and the DC-link
voltage is well controlled with the help of the proposed high resolution digital phase-shift
modulator.
5.3
Conclusion
To address the issue of the voltage variation over a relatively large range for most of
the battery or supercapacitor energy storage device, and the issue of the limited zero
voltage switching range of the single-angle phase-shift modulation strategy for the multicore based high voltage gain bi-directional DC-DC converter, a dual-angle phase-shift
modulation strategy for multi-core bi-directional DC-DC converter is proposed as the
first contribution in this chapter. With the dual-angle scheme, zero voltage switching of
all the switches in the multi-core converter can be obtained in wide voltage range and full
load range. The optimum operation range for dual-angle modulation scheme is analyzed.
The experiment test result verifies the operation.
At ultra-high switching frequency, e.g. > 250kHz, the resolution of the phase-shift
modulation angle is not acceptable for close-loop control, because of the digital quantification error. The second contribution in this chapter is to propose a high resolution
170
phase-shift modulation scheme to improve the resolution of the phase-shift angle by

around 50 times. The implementation issues such as the deadtime generation and gate
signal loss are discussed and solutions are provided. The experimental measurement of
the gate signal delay time validates the high resolution of the phase-shift angle. When
the maximum phase-shift angle is 30, the resolution of 0.1% is obtained and is good
enough for close-loop feedback control.
171
Chapter 6
A Novel Distributed Energy Storage
Device
6.1
Conventional High Capacity Battery String
The battery is one of the most important energy storage devices in high power or
high capacity energy storage applications such as electric vehicles and renewable energy
integration (wind, PV, etc.). It is also a key component in future renewable electric
energy delivery and management (FREEDM) systems to smooth the intermittent power
generated from distributed sources and to make them dispatchable. Major challenges
for todays battery packs include cost, cycle life and calendar life, power density, energy
density, safety, etc.
A typical conventional battery energy storage system is shown in Fig. 6.1. In conventional high power battery packs, battery cells are connected in series to increase the string
voltage such that it is easier and more efficient to interface with a high voltage system DC
bus. However, variations of battery cell capacity and internal resistance are inevitable
172
both in manufacturing process and during operation. Manufacturing process with higher
consistency will also increase the battery cost. Furthermore, even small dispersion at the
beginning will grow during operation due to a positive feedback mechanism. For example, voltage of battery cells with lower capacity increases faster than those with larger
capacity in charging process and reaches maximal cell voltage first. But at the same time
the stronger cells are not fully charged. Further charging the battery string will cause
overcharging of weaker cells and irreversible damage to the electrodes. Then the capacity
of damaged battery cells decreases. This mechanism makes weaker battery cells degrade
much faster than strong ones and thus reduces the operational capacity and lifetime of
the whole battery string due to the series connection. A similar phenomenon occurs in
the discharging process as well. In addition, the reliability of the battery string is prone
to be limited by the failure of any weak cell.
Figure 6.1: Conventional battery energy storage system with bi-directional DC-DC,
voltage equalizer and BMS
There are two conventional approaches to mitigate these issues and improve battery
pack performance. The first is the battery management system (BMS), which acquires
173
and processes operational cell parameter data and then initiates further action. Typical parameters under monitor include cell voltage, cell temperature, operating current,
and the typical functionalities include over voltage and under voltage protection, over
temperature protection and over current or short circuit protection. The major issue for
this approach is that only part of the rated battery pack capacity is usable, in order to
minimize cell damage and extend battery life. Due to the unbalance of cell voltage, the
battery string will lose at least 25-30% of its rated capacity without cell equalizer circuits
[92].
S1
R1
S2
R2
Sn
Rn
Cell Equalizer
Figure 6.2: Conventional dissipative battery cell equalizer
The second approach is cell equalizer technology. The basic idea of a cell equalizer
is to divert charging current from weaker cells when they reach maximal cell voltage
during charging or minimal cell voltage during discharging, in order to avoid over charge
174
Cell Equalizer
C11
B1
C12
B2
C21
B3
C22
Cell Equalizer
Figure 6.3: Battery cell equalizer based on switched capacitor
Cell Equalizer
B1
B1
B3
Cell Equalizer
Bn
Figure 6.4: Battery cell equalizer based on DC-DC converters
or over discharge of weaker cells. Early equalizer technology employs dissipative balance
circuits in low power applications such as resistors and transistors, as shown in Fig. 6.2.
Since there is high power loss in a dissipative equalizer, the diverted current is usually
very small compared with the battery current rating, and they can balance cell voltage only during trickle charging. At the end of the charging process, trickle charging
175
B1
B1
Bn
Cell Equalizer
Figure 6.5: Battery cell equalizer based on magnetic coupling
with very low current is employed to further charge stronger cells with larger capacity
and divert current from weaker cells. Trickle charging is generally used in lead-acid and
NiHM battery strings but not for Li-ion battery string because it is very sensitive to
overvoltage. Non-dissipative cell voltage equalizers were proposed for high power applications based on power electronic converters. These cell voltage equalizers can be
categorized into several types: switch inductors [93][94] or switch capacitors [95][96],
non-isolated DC-DC converters such as Buck/Boost converter [97][98][99][100] and Cuk
converter [101][102][103], transformer isolated DC-DC converters or magnetic coupling
[104][105][106][107][108][109][110][111], relay matrix [92][112][113], re-distribution of energy through a common DC-bus [114][115][116][117][118], etc.
Some typical circuit diagrams of the battery cell equalizers include the switched capacitor [96] as shown in Fig. 6.3, DC-DC converter [98] in Fig. 6.4, coupled inductor
or high frequency transformers [106] in Fig. 6.5. The diverted current flow can be either unidirectional dedicated to charging equalization, or bidirectional for both charging
and discharging equalization. There are several issues for nondissipative cell equal-
176
izers, typically, DC-DC converters. For example, there is tradeoff between the cost of
the equalizer and equalization speed. Higher current rating of the equalizer can provide
faster equalization speed and balance voltage dynamically with inrush current (e.g., regenerative braking of electric vehicle). But it will generate additional cost, volume and
weight for the energy storage system. Most equalization time reported in the literature
is in the order of magnitude of minutes, which is difficult for transient voltage balance
of high power battery cells. The second issue is reliability. When one battery cell fails,
the cell equalizer circuits must provide a bypass branch to isolate the failed cell, such
that the entire battery string can still operate. However, it is difficult to utilize equalizer
circuits directly to provide bypass branches. In addition, the current rating of bypass
branches should be the same as the maximal output current of the battery string. Such
branches are not cost effective because they are standby during normal operation. The
third issue is the control algorithm. The equalizer circuits basically reallocate energy
among battery cells and determining how to allocate energy efficiently and quickly will
result in a complex control system.
6.2
Analysis on Battery String Capacity Loss Due

to Cell Inconsistency
It is reasonable to assume that the battery cell capacity follows the normal distribution
with mean c and standard deviation c . Then the probability density function of the
battery cell capacity is,
fxi (x) =
c 2
177
(xc )2
2
2 c
(6.1)
where xi is an independent identically distributed random variable with the unit of Ah

and represents the ith battery cell capacity and i = 1, 2, , N . N is the total number
of battery cells in series.
The probability distribution function of the battery cell capacity is,
Fxi () = F (xi ) =
c 2
(xc )2
2
2 c
dx
(6.2)
where Fxi () represents the probability that the battery cell capacity xi is smaller than
.
When N battery cells are series connected in a battery string, without the aid of the
voltage equalizers and without overvoltage or undervoltage, the maximal usable string
capacity is,
Xs = min(x1 , x2 , x3 , , xN 1 , xN )
(6.3)
where Xs is the maximal usable string capacity, x1 , , xN are the battery cell capacity
of the 1st , , N th cell, and N is the number of series connected cells in the battery
string.
The probability distribution function of Xs is calculated by,
FXs () = F (Xs ) = F (min(x1 , x2 , x3 , , xN 1 , xN )
= 1 F (x1 > ) F (x2 > ) F (xN > )
(6.4)
= 1 [1 F (xi )]N
Therefore, the probability density function of Xs is,
fXs =
d
FX ()
d s
178
(6.5)
Substitute Equation (6.2) and Equation (6.4) into Equation (6.5), one obtains,
fXs (x) =
(xc )2
N
(1 Fxi (x))(N 1) e 2 c2
c 2
(6.6)
Therefore, the mean value of Xs is,

Z
x fXs (x)dx
Xs =
(6.7)
For the purpose of illustration, the capacity of the battery string with N cells in series
is calculated. In scenario 1, the mean value of the battery cells is assumed as 100Ah,
and the rated variation is assumed as 10%. The battery cell quality is represented by the
standard deviation of the capacity. For example, if the standard deviation is 3 sigma,
then the standard deviation of capacity is 3.33Ah and 99.74% of the cells are within the
10% of 100Ah. The calculation results are listed in Table 6.1, based on the Equations
(6.1) - (6.7). The mean capacity of the battery string is also plotted in Fig. 6.6.
Table 6.1: The mean capacity of the battery string with different standard deviation
c (Ah)
10
5.0
3.3
2.5
1.7
1
100
100
100
100
100
2
94.36
97.18
98.12
98.59
99.06
4
89.71
94.85
96.57
97.43
98.28
8
85.76
92.88
95.26
96.44
97.63
N
16
32
64
100
200
82.34 79.3 76.56 74.92 72.54
91.17 89.65 88.28 87.46 86.27
94.11 93.1 92.19 91.64 90.85
95.59 94.83 94.14 93.73 93.13
97.06 96.55 96.09 95.82 95.42
In scenario 2, the mean value of the battery cells is assumed as 100Ah, and the
standard deviation is 3 sigma, which indicates that 99.74% of the cells are within the
179
# of
Figure 6.6: The mean capacity of the battery string with different standard deviation
Table 6.2: The mean capacity of the battery string with different standard deviation
% of variation
1
2
5
10
20
1
100
100
100
100
100
2
99.81
99.62
99.06
98.12
96.24
4
99.66
99.31
98.28
96.57
93.13
8
99.53
99.05
97.62
95.26
90.5
N
16
32
64
100
200
99.42 99.32 99.23 99.17 99.04
98.82 98.61 98.43 98.32 98.16
97.05 96.54 96.09 95.82 95.41
94.11 93.1 92.19 91.64 90.85
88.22 86.2 84.37 83.27 81.68
10% of 100Ah. The battery cell quality is represented by the percentage of the variation
of battery cells. The calculation results are listed in Table 6.2, based on the Equations
(6.1) - (6.7). The mean capacity of the battery string is also plotted in Fig. 6.7.
The probability density function of the cell capacity and string capacity are plotted
in Fig. 6.8, which describes the capacity reduction due to the series connection and
unbalance. It can be concluded from the above analysis that due to the series connection
of the battery cells and the inconsistent capacity (and internal resistance) either during
manufacture or during operation, the maximal usable string capacity is always smaller
180
% of
Variation
Figure 6.7: The mean capacity of the battery string with different percentage of variation
Probability
density function
of string capacity
Probability
density function
of cell capacity
Figure 6.8: The probability density function of the cell capacity and string capacity
(c = 100Ah, c = 3.33Ah, N = 100)
than that of the individual cells due to the series connection. The larger the number of
cells is in series, the lower the maximum usable capacity. In addition, without the proper
management of the battery cells, the capacity of the weaker cells degrades quickly. The
decline of the usable string capacity is much faster than the individual cell capacity
181
if they are charged and discharged separately at cell level. Therefore, to improve the
performance of the battery pack which consists of expensive battery cells, e.g., Li-ion
batteries, to eliminate or reduce the number of cells in series is very important. The
battery string capacity loss analyzed above does not include the unbalance of the stateof-charge (or cell voltage). The unbalance issue will cause more loss like 25%-30% without
the use of cell equalizers [92].
However, the battery cell voltage is generally very low compared to the energy storage
system DC-link voltage. The cell voltage for Li-ion battery is typically from 2.5V to 4.2V,
which is much smaller than the 400V DC bus voltage in FREEDM systems or the plug-in
electric vehicle drive train. Therefore, a high voltage gain, high efficiency, and high power
density bi-directional DC-DC converter is necessary.
6.3
A Novel Distributed Energy Storage Device
The proposed advanced battery module integrated with distributed high voltage gain,
high power density, high efficiency, bi-directional DC-DC converter and management system can fundamentally eliminate the series connection of battery cells and the associated
issues. The proposed system diagram is shown in Fig. 6.9. In high power applications,
a conventional battery energy storage system generally consists of battery cells, battery
management subsystem, cell equalizers, and bi-directional DC-DC converter which allows
for the voltage change of the battery string and regulates the system DC-link voltage.
In this chapter, the centralized high power bi-directional DC-DC converter is split into
a few low power bi-directional DC-DC converters which are distributed and integrated
with battery cells or small packs. The distributed converters enable direct charging and
discharging individual cell or small pack and a battery management subsystem having
182
the same function as todays battery management system (BMS) can be assembled with
the integrated converter. The distributed converters can boost low battery cell/ small
pack voltage up to the required system DC-link voltage level. These advanced battery
modules can be paralleled at the output to form a battery energy storage system. Series
connection of modules and the combination of series and parallel configurations are also
possible for the battery energy storage system with DESD modules.
Distributed
Converter and
Management 1
Battery Cell
or Small
Pack 1
DESD
Module
1
Distributed
Converter and
Management 2
Battery Cell
or Small
Pack 2
DESD
Module
2
Distributed
Converter and
Management n
Battery Cell
or Small
Pack n
DESD
Module
n
High-frequency high-efficiency
bi-directional DC-DC
High voltage
DC Bus
Low voltage battery

cell or pack
Figure 6.9: Proposed paralleled modular DESD with high-density high-efficiency DC-DC
converters
The battery energy storage system with distributed energy storage device (DESD)
modules is shown in Fig. 6.10. The battery energy storage system consists of a positive
power terminal and a negative power terminal. There is a communication unit in each
DESD module which exchanges information with the system master controller and initiates the operation mode of the battery energy storage system. A few DESD modules
are parallel connected inside the battery energy storage system. The operation modes
183
of the battery energy storage system include voltage regulation mode, current regulation
mode or power regulation mode. In some scenarios the DESD modules are required to
regulate the DC bus voltage, for example, when it is used as the energy storage system
in PHEVs. The 400V constant output voltage can be regulated by the DC-DC converter
in the battery module in such applications. In other scenarios, the system DC bus may
be regulated by other converters and power sources and the DESD modules will provide
required current or power injection or absorption based on the system command. With
distributed and integrated high frequency DC-DC converters, no external charger or high
power DC-DC converter is required. The DESD modules can be directly connected to
the system DC bus. With DESD modules, the capacity of the battery energy storage
system can be easily scaled based on the customer requirement by selecting the number
of modules which are paralleled in the DC bus. Battery cell voltage equalizers are not
required in the DESD module if single battery cell is used in the module, since the integrated DC-DC converters enable direct cell level management. A battery management
system is also integrated into the module to provide and communicate the module state of
charge (SoC), state of health (SoH) and state of function (SoF) information with system
master controllers, in addition to monitor the cell voltage, current and temperature.
There are many advantages for the proposed battery energy storage system with
DESD modules. Cell level management can tolerate a large variation of battery cell
parameters, which helps to reduce the manufacturing cost. The DESD modules can
even accommodate multiple types of battery cells and super capacitor cells in one energy
storage system. The operational life of battery packs can be potentially extended because
there is no cell damage due to over charge or over discharge as a result of cell imbalance.
The battery pack capacity can potentially be fully utilized because each cell can be
charged and discharged with full capacity within the safe operating range by its integrated
184
Figure 6.10: Advanced battery pack with DESD modules
converter and management system. While in a conventional battery string, the available
capacity (Ah) is limited by the weaker cells to a lower value because of cell imbalance.
The reliability of the proposed battery energy storage system is greatly improved due
to the parallel structure rather than a series structure. When one DESD module fails,
its integrated converter can isolate it from the DC bus. Only the failed module is offline and the rest of the modules remain on-line. As a result, the battery energy storage
system loses only a small portion of its energy storage capacity. The safety of battery
packs is improved as well. For example, some weaker cells might have a higher internal
resistance. It is easy for its integrated converter and BMS to allocate smaller charging
or discharging current to this cell, in order to prevent thermal runaway or explosion.
Since there is no longer a cell unbalance issue if the single battery cell is used in the
module, cell equalizers are not necessary. Because of the distributed DC-DC converters,
the output voltage of the battery pack can be regulated in a wide voltage range based
on customer requirement. Finally, the plug and play function of the proposed advanced
battery modules can be realized with intelligent module management.
185
6.4
Test of the State-of-the-Art High Capacity Liion Batteries
Currently high capacity Li-ion batteries are commercially available and their cost becomes increasingly lower. Their charge capacity ranges from several tens of ampere-hours
up to several hundreds of ampere-hours. These high capacity Li-ion batteries are good
candidate for the distributed energy storage system. Their capacity is large enough for
the distributed energy storage devices and there is no need to series connect a long string
of batteries. As discussed above, a short string of battery cells has fewer problems with
cell unbalance, thus there is a higher potential utilization of battery capacity and a very
simple BMS system is required.
Figure 6.11: The Arbin BT2000 Battery Test System (left) and commercial 100Ah
LiFePO4 Batteries (right)
Fig. 6.11 shows an experimental bench to characterize and test the battery cells or
supercapacitors. The state-of-the-art high capacity (100Ah) and low cost Li-ion batteries
(LiF eP O4 ) are tested to study their characteristics.
186
Figure 6.12: The 0.2C constant current (CC) and constant voltage (CV) charging test
profile for 100Ah Li-ion battery
Figure 6.13: The charge capacity with 0.2C CC-CV charging for 100Ah Li-ion battery
187
Figure 6.14: The 0.2C constant current (CC) discharging test profile for 100Ah Li-ion
battery
Fig. 6.12 shows a constant-current (CC) and constant-voltage (CV) charging profile
for a 100Ah state-of-the-art Li-ion battery. The cell voltage, current and temperature
are recorded during the charging process. Cell voltage increases from 3.0V with 0.2C CC
charging. When the cell voltage reaches 4.0V , it enters the CV mode and the charging
current decreases. When the charging current is lower than the 1% of the capacity
rating, CV charging stops. The cell temperature increases during charging process and
the maximum temperature is 35C.
The charge capacity and energy capacity of the 100Ah Li-ion battery in the CC-CV
charging process are plotted in Fig. 6.13. It can be seen that 118Ah is charged in the
CC stage, whereas only 3Ah is charged in the CV stage. Therefore, from application
point of view, it is not necessary to design a CV charging stage for these high capacity
Li-ion batteries. This simplifies the bi-directional DC-DC converter operating modes.
188
For example, the converter can be designed to only regulate the output DC-link voltage
and the DC-link voltage variation controlled by the other power sources and converters
will either charge or discharge the battery based on the DC bus voltage.
A 0.2C constant current discharging profile of the Li-ion battery is shown in Fig. 6.14.
During the discharging process, cell temperature also increases. From the 90% to 10%
state of the charge (SOC) range, the battery cell voltage variation is small. This helps
the bi-directional DC-DC converter to achieve better round trip efficiency.
6.5
Design of the Droop Controller for DESD Modularization
Figure 6.15: The DC droop control for DESD module current share
The droop out V-I characteristic is preferred for the DESD module, because with droop
characteristic the equivalent circuit of the DESD module is an ideal voltage source in
series with a virtual output resistance. At steady state, the output resistance is very useful
189
to balance the module output current without the requirement of fast communication,
as illustrated in Fig. 6.15. Without output droop, the module output voltage-current
curve is very flat. Then a system master controller is required to communicate with each
DESD module real-time and to send the output current command.
From Fig. 6.15, the current distribution among the paralleled DESD modules can
be controlled by the droop of each module. If the DESD module status is identical, for
example, they have very close state of the charge (SOC) and state of the health (SOH),
they can use the same V-I droop or virtual output resistance such that the module current
is balanced. However, it is also possible to use the different droop for the modules with
different SOC and/or SOH. If one module has a weaker battery pack, it can use high
virtual output resistance such that lower charging and discharging current is allocated
to this weak module.
6.5.1
A Droop Controller Based on the Regulated DC Output

Impedance
Vref
Gc (S)
Gvd(S)
Vd
Hv (S)
Figure 6.16:
impedance
The diagram for the droop regulator based on the controlled output
190
60
T: Ro=2500
T: Ro=500
T: Ro=250
40
20
Gain / dB
Gvd: Ro=2500
0
Gvd: Ro=500
Gvd: Ro=250
-20
-40
100m200m400m
10
20
40
100 200 400
1k
2k
4k
10k 20k 40k
100k 200k 400k
1M
freq / Hertz
simplis_ac14 (C:\Documents and Settings\ydu4\Desktop\Simplis\Droop\DESDv2.sxsch) - 12/5/2011
Figure 6.17: The converter small-signal transfer function from to Vd and the loop gain
T after compensation
60
50
Zo: Ro=2500
Zo: Ro=500
40
Zo: Ro=250
Gain / dB
30
20
10
Zoc: Ro=250
Zoc: Ro=500
Zoc: Ro=2500
-10
-20
100m200m400m
10
20
40
100 200 400
1k
2k
4k
10k 20k 40k
100k 200k 400k
1M
freq / Hertz
Figure 6.18: The converter output impedance with and without the compensation
191
The droop characteristic can be achieved with the proper controller design. The output
impedance is a virtual impedance and there is no loss with it. In ideal case, the output
virtual impedance is a resistor and its frequency response is flat. This is also used for
the active voltage positioning (AVP) in voltage regulation module (VRM) applications.
Since the controller is only effective below the cross-over frequency and the high frequency
output impedance is equal to the equivalent series resistance (ESR) of filter capacitors.
Therefore, the close-loop impedance in low frequency range should be designed to be
same as the ESR. However, capacitor ESR is too small for a DESD module because
the module output voltage is high and current is low. Therefore, the design target of
the droop controller for DESD module is to control the DC or low frequency close-loop
output impedance and to maintain the stability of the control.
The diagram of a droop regulator based on the controlled output impedance is shown
in Fig. 6.16, where Gvd is the small signal transfer function from the phase-shift angle to
the DC-link voltage Vd , Hv represents the transfer function of the sensor and conditioning
circuits, and Gc is the compensator which controls the output impedance of the converter.
The design is conducted with simulation in SIMPLIS platform, which linearizes the
switching power circuit and extracts the frequency responses of the converter. The converter small-signal transfer function of phase-shift angle to converter DC-link output is
plotted in Fig. 6.17. The multi-core based bi-directional DC-DC converter with singleangle phase-shift modulation technique can be simplified as the first-order system, because the series inductor is very small and inductor current changes drastically within
each switching cycle. The inductor current dynamics is very fast. The pole of the transfer
function is contributed by the output filter and load. Therefore, the small signal transfer
function can approximately written as,
192
Gvd =
K1 Ro
1 + s Ro C
(6.8)
where the unit of the phase-shift angle is degree, K1 is gain, Ro is DC-link load
resistance, C is the output capacitance of the converter and C = C1 //C2 = C1 /2.
The open-loop output impedance (DC-link side) of the converter is shown in Fig.
6.18. The small-signal output impedance of converter is obtained by perturbing output
current at the DC output point. Therefore, at DC or in low frequency range, the output impedance should be equal to the load resistance on the DC link. The small-signal
transfer function of the output impedance can be approximately written as,
Zo =
Ro
1 + s Ro C
(6.9)
Zo
1+T
(6.10)
The close-loop output impedance is,
Zoc =
where T is the loop gain,
T = Gc Gvd
(6.11)
where Gvd is the converter small signal transfer function from the phase-shift angle to
the DC-link voltage Vd . Gc is the transfer function of the compensator.
Based on the assumptions that the battery voltage variation is small and the battery
internal resistance is negligible, a simple P-compensator can be used to control the converter output impedance. By adjusting the gain of the compensator, the close-loop low
frequency impedance is controlled to be roughly constant. The loop gain T is plotted in
193
Vd / V
390
380
370
360
350
Vao / V
200
100
0
-100
-200
I(L) / A
4
2
0
-2
-4
2
I(Id) / A
1.6
1.2
0.8
0.4
0
0.6
0.8
1.2
1.4
1.6
time/mSecs
1.8
2
200uSecs/div
simplis_tran11 (C:\Documents and Settings\ydu4\Desktop\Simplis\Droop\DESDv2.sxsch) - 12/5/2011
Figure 6.19: The simulation results of the droop controller design
Fig. 6.17 and close-loop output impedance is plotted in Fig. 6.18. From Fig. 6.18, the
close-loop low frequency resistance is controlled to be about 10 with different load.
The transient simulation with load change is used to verify the droop controller design,
as shown in Fig. 6.19. Initially the load current is zero and Vd is 400V . At 0.8mS the
load current increases to 1.5A. Due to the 10 virtual close-loop output impedance
controlled by the P compensator gain, the DC-link voltage Vd drops from 400V to 385V .
At 1.6mS the load current is turned off and Vd increases to 400V again. The droop
output characteristics of the multi-core based bi-directional DC-DC converter is verified.
6.5.2
A Droop Controller Based on the Output Current Feedback
Although the droop controller based on the controlled output impedance, as discussed
in the last section and called method 1 here, is very simple (i.e., only one output voltage
194
Vref
Gc (S)
Gvd(S)
Vd
Hv (S)
Gdrp (S)
Io
1/Ro
Figure 6.20: The diagram for the droop controller based on the output current feedback
sensor and one proportional compensator are required) and the stability is good because
of the first-order system, the output V-I slop is not constant if the battery voltage varies
in a larger range. In some scenarios this is not inevitable when the battery internal
resistance is large and battery output current is high. On the other hand, when the
phase-shift angle of the multi-core bi-directional DC-DC converter varies in a larger
range at different load conditions, it also changes the gain of the converter small signal
transfer function Gvd . Therefore, a consistent closed-loop output impedance cannot be
guaranteed.
To address these issues, an improved droop controller based on the output current
feedback, which is called method 2, is proposed with its diagram shown in Fig. 6.20. The
dual-loop control is used to improve the droop controller performance. The inner loop
is a voltage loop, which regulates the output voltage Vd based on the inner-loop voltage
reference. The inner-loop voltage reference is generated by the outer-loop controller. The
outer-voltage loop generates the reference signal for the output voltage Vd , based on the
sensed output current.
Based on the Fig. 6.20, a PI controller is used for Gc (S) in the droop controller
proposed in this section, instead of a P controller in the last section, such that the
195
200
150
Loop Gain T
Gain / dB
100
50
PI Controller Gc
0
Gvd
-50
10m 20m 40m 100m
400m
10
20
40
100 200 400
1k
2k
4k
10k 20k 40k
100k200k400k
1M
freq / Hertz
Figure 6.21: The bode plots for the inner voltage loop compensation with a PI controller
20
0
-20
Phase /
-40
Ro=250
-60
-80
Ro=500
-100
-120
-140
Ro=2500
-160
140
Ro=2500
120
100
Gain / dB
80
60
40
Ro=500
20
0
Ro=250
-20
-40
10m 20m 40m 100m
400m
10
20
40
100 200 400
1k
2k
4k
10k 20k 40k
100k200k400k
1M
freq / Hertz
Figure 6.22: The stability of the inner voltage loop with a PI controller
gain variation caused by the change of the battery state-of-charge, voltage drop across
battery internal resistance and the change of the phase-shift angle can be compensated
by the PI controller, since it has infinite DC gain. Therefore, the output voltage Vd will
follow the inner-loop voltage reference exactly and there is no error between them. The
design of the inner voltage loop regulation can be illustrated in Fig. 6.21. As previously
196
discussed, the converter transfer function Gvd is a first-order plant. The bode plot of
the PI controller is also shown in Fig. 6.21, labeled as Gc (S). It provides a pole at zero
frequency such that the DC gain is infinite. It also provides a zero and it is used to obtain
the sufficient phase margin for better stability. The loop gain T after compensation is
also shown in Fig. 6.21.
The major objectives for the inner voltage loop design are to obtain enough phase
margin for good stability and to obtain reasonable voltage control bandwidth based on the
system requirement. As an example, the loop gains T and their phase margins are shown
in Fig. 6.22 with different load resistances from light load to heavy load. The cross-over
frequency ranges from 4kHz to 8kHz and the phase margin is about 80. Therefore, the
inner voltage loop is stable.
420
Vd / V
410
400
390
380
370
Vb / V
360
13.5
13
12.5
12
11.5
11
10.5
10
I(L) / A
6
2
-2
-6
-10
I(Id) / A
1.6
1.2
0.8
0.4
0
time/mSecs
9
1mSecs/div
simplis_tran34 (C:\Documents and Settings\ydu4\Desktop\Simplis\Droop\DESDv3.sxsch) - 12/8/2011
Figure 6.23: The transient response for the droop controller based on output current
feedback
As discussed above, the inner voltage loop is designed to follow the reference generated by the outer loop exactly. Therefore, the objective for the outer-loop design is
197
to generate the droop V-I slope for output voltage and current such that a virtual low
frequency output impedance is obtained. To achieve the droop control objective, the
second compensator Gdrp is used. I call Gdrp a droop compensator.
Gdrp (S) =
Rdrp
1 + S/i
(6.12)
where Rdrp is the objective virtue output resistance at low frequency, and i is a pole to
slow down the change of the output voltage reference voltage. i should be selected at a
much lower level than the inner voltage loop cross-over frequency, if the output current
sensor bandwidth is high. Vref is the converter no-load output voltage.
The simulated transient responses of the droop controller based on the output current
feedback are shown in Fig. 6.23. Initially the output current is zero. So the inner-loop
voltage reference signal, as the output of the outer loop, is 400V . From the simulation
waveform of Vd , the PI controller regulates the output voltage to be 400V . At 3mS, the
load current increases to 1.5A. Rdrp used in the simulation is 10. The steady state value
for the inner-loop voltage is 385V . The transient process can be observed after the load
switches on, since the droop characteristic or the 10 output virtual impedance is only
obtained in the low frequency range. After the dynamics, the steady state output voltage
Vd is observed as 385V . It should be noted that the battery pack output voltage decreases
due to the load current increase and large ESR. However, Vd is still regulated to be 385V
despite the sag of Vb . At 7mS the load current switches off. After some dynamic period,
the output voltage Vd is regulated back to 400V . The simulation waveforms verify the
design of the droop controller based on the output current feedback.
198
6.6
Experimental Test and Comparison of Two Droop

Controllers
An experimental prototype was built with digital controller to test the droop compensator, as shown in Fig. 6.24. The converter topology is the multi-core based high
voltage gain bi-directional DC-DC converter which is used for DESD modularization.
The experiment was conducted with Vb = 6.4V , Vd = 180V and fs = 500kHz. High
resolution digital phase-shift modulator is employed. The droop controller with method
1 and method 2 are implemented in the DSP controller respectively and the performance
of the two droop controllers are tested.
Figure 6.24: The multi-core based high voltage gain bi-directional DC-DC converter
prototype
For the droop controller developed with method 1, the transient responses of the DClink voltage Vd when the load current steps up and steps down are shown in Fig. 6.25.
199
Vd: 50V/grid
id: 0.5A/grid
iL: 2A/grid
Vb: 5V/grid
Figure 6.25: The test results of the droop controller with method 1 when the module
output load changes
Vd: 50V/grid
id: 0.5A/grid
iL: 2A/grid
Vb: 5V/grid
Figure 6.26: The test results of the droop controller with method 2 when the module
output load changes
It can be observed from the test waveforms that the DC-link voltage decreases when
the load increases, and increases back when the load is removed, indicating the droop
output characteristic. The test waveforms verifies the droop controller design based on
the method 1.
For the droop controller developed with method 2, the transient responses of the DC-
200
OutputVICharacteristicsofDESDModule
210
ModuleOutputDCVoltage(V)
205
y=10.486x+200.4
200
195
y=20.329x+200.16
190
185
180
175
170
0
0.1
0.2
0.3
0.4
0.5
0.6
ModuleOutputDCCurrent(A)
Method1(Ro=10)
Method2(Ro=10)
Linear(Method2(Ro=10))
Linear(Method2(Ro=20))
Method2(Ro=20)
Figure 6.27: The test results of the two droop controllers for the steady state output
V-I characteristic
link voltage Vd when the load current steps up and steps down are shown in Fig. 6.26.
It can be observed from the test waveforms that the DC-link voltage decreases when
the load increases, and increases back when the load is removed, indicating the droop
output characteristic. The test waveforms verifies the droop controller design based on
the method 2.
The steady state output voltage and current are measured and plotted in Fig. 6.27,
for both method 1 and method 2. For both methods, It can be found that when the load
current increases, the steady state module output voltage decreases correspondingly,
which indicates droop characteristic. However, it is difficult for the droop controller
developed with method 1 to obtain good linearity in large load range because of the
battery voltage change and converter gain change. It can be observed from the output
201
V-I characteristics that the droop controller designed with method 2 achieved better
linearity. In other words, a constant virtual output resistance is obtained. The output
resistance can also be well controlled by method 2. The output V-I curves with 10 and
20 output resistance are also measured in Fig. 6.27. The slope of the curve is equal
to the virtue DC output resistance of the converter, which is controlled by the proposed
droop controller method 2.
6.7
Conclusion
The contributions in this chapter include the proposal of a novel distributed energy
storage device (DESD) and the control technology for the converter. The issues of conventional battery string with series connected cells and the conventional approaches to
mitigate these issues and their limitations are described first. A novel concept of distributed energy storage device (DESD) with modularized battery pack and high frequency
DC-DC converter is proposed. The state-of-the-art high capacity Li-ion batteries, which
are suited for the DESD modularization, are tested and the charging/discharging curves
are provided. Based on the test results, the constant voltage charging mode may not
be necessary and the module controller can be designed simply to regulate the DESD
module output voltage. Two droop control methods are proposed to regulate the DESD
module output voltage, and at the same time to balance the current from different parallel connected modules for the ease of modularization without fast communication. The
droop controller design is discussed in detail. The controlled virtual low frequency output
impedance is validated in both the simulation and the experiments. The droop controller
based on the module output current feedback achieves better performance.
202
Chapter 7
Summary and Future Work
7.1
Summary of the Work
The electric power and transportation industries are two major sectors for primary
energy consumption on Earth. The majority of energy sources such as petroleum, natural
gas, coal are nonrenewable or not environment-friendly. The associated energy shortage,
green house gas emission and energy security issues are well known. It is also known that
greater utilization of renewable energy resources can help mitigate the issues with fossil
fuels. However, due to the intermittent nature of the renewable energy resources such
as wind and solar energy, it is difficult to enable higher penetration of renewable energy
generation in todays grid. One major challenge to the wide spread adoption of renewable
energy is the ability to store and control the wide variety of different energy resources.
The future electric distribution grid must address the issues of storage and complex
control. Recently, the battery and supercapacitor energy storage systems have begun to
be integrated into PV, wind and fuel cell power generation. The battery energy storage
system is also the on-board energy source for plug-in hybrid electric vehicle (PHEV) and
203
plug-in electric vehicle (PEV). Bi-directional converters, as the power electronic interface
between the battery/supercapacitor and the system, have a vital role of improving the
performance of the energy storage systems.
In Chapter 2, conventional non-isolated and isolated bi-directional DC-DC converters
are reviewed and their performance is evaluated for energy storage application.
In Chapter 3, a novel bi-directional series resonant DC-DC converter with clamped
capacitor voltage is proposed. The series resonant DC-DC converter with clamped capacitor voltage exhibits excellent characteristics in forward mode operation, such as the
dual output V-I slopes, high reliability, soft switching, high power density and load
short-circuit fault current limit capability. But the conventional single angle phase-shift
modulation of output full bridge cannot reverse the power flow. Limited study has been
performed for reverse mode operation that enables bi-directional power flow. In this
chapter, modulation strategies for reverse mode operation based on three phase-shift angles for both low and high output voltage are proposed and investigated in detail. The
optimum modulation trajectories in three-dimensional modulation space are identified.
A look-up table based modulator for reversed power flow control in wide voltage range
is discussed. A 750V input, 300V-600V output, 50kHz and 15kW (scaled down) IGBTbased prototype of the series resonant DC-DC converter with clamped capacitor voltage
was constructed to verify the bi-directional operation based on the proposed modulation
strategies and to evaluate the converter performance. The simulation waveforms are verified by experiment results, and the efficiency is calculated for the full load range (35kW)
and validated below 15kW by prototype in both forward and reverse mode. The power
loss distribution was also analyzed.
In Chapter 4, in order to enhance the performance of distributed energy storage
devices, which consists of a low string of high capacity batteries and ultra-compact and
204
high efficiency bi-directional DC-DC converters, a novel multi-core bi-directional DC-DC

converter was proposed to fulfill requirements such as high voltage gain, high charging
and discharging current, high power density, high efficiency and planar package. The
advantages of the multi-core topologies are discussed. Parasitic inductance is minimized
by selection of proper MOSFET package and maintaining minimal loop distance of PCB
layout. The planar transformer design is optimized in terms of the core material, the
power loss, the PCB layout area and the thickness of the low voltage high current PCB
winding. A magnetic integration approach is used to improve the power density of the
converter. The series inductance in the topology is provided by the controlled leakage
inductance of the planar transformer with inserted low permeability magnetic shunt films.
The number of planar cores and the low voltage side full bridge is selected based on a
multi-objective optimization approach to simultaneously achieve high power density and
high efficiency. Deadtime is also optimized to reduce the conduction loss of the low
voltage side MOSFETs anti-parallel diodes. An experimental prototype was developed
which achieved the power density of 5.1kW/L (83W/in3 ). The power conversion efficiency
from 40A to 100A is higher than 95% and the maximal efficiency is 96.0%.
In chapter 5, to address the issue of the voltage variation in relatively large range
for most battery or supercapacitor energy storage devices, and the issue of limited zero
voltage switching range of single-angle phase-shift modulation strategy for multi-core
high voltage gain bi-directional DC-DC converter, a dual-angle phase-shift modulation
strategy is proposed. With the dual-angle scheme, zero voltage switching of all switches
in the multi-core converter can be obtained. The optimum operation range for dual-angle
modulation is analyzed. The experiment test result verifies the operation. Also in this
chapter, a high resolution phase-shift modulation scheme to improve the resolution of
the phase-shift angle by a factor of 50 is proposed for the multi-core converter. The
205
implementation issues such as deadtime generation and gate signal loss are discussed
and solutions are provided. The experimental measurement of the gate signal delay time
validates the high resolution of the phase-shift angle. When the maximum phase-shift
angle is 30, the resolution of 0.1% is obtained and is sufficient for close-loop feedback
control.
In Chapter 6, the issues of conventional long battery string with series connected
cells and the conventional approaches to mitigate these issues and their limitations are
described first. A novel concept of distributed energy storage device with modularized
short string of battery pack and high frequency DC-DC converter is proposed. The
advantages of the parallel connected DESD modules include capacity scalability, high
reliability, better battery utilization, elimination of external DC-DC converter and direct
interface to DC microgrid or inverter, tolerance of large pack variation and integrated
management, etc. The state-of-the-art high capacity Li-ion batteries, suited for the
DESD applications, are tested and the charging/discharging curves are given. Two droop
control methods are proposed to regulate the DESD module output voltage, and in the
meantime to balance the current from different modules for the ease of modularization.
The droop controller design is discussed in detail. The controlled virtual low frequency
output impedance is validated in both the simulation and the experiments.
7.2
The Future Work
For the novel bi-directional series resonant DC-DC converter with clamped capacitor
voltage, the future work can be on the large-signal and small-signal modeling of the
converter. Due to the four clamping diodes D9-D12, the conduction of clamping diodes
depend on the current in two resonant inductors, the voltage across the resonant capaci-
206
tor and output DC capacitor. These factors make the modeling and analytical analysis of
the converter very difficult. So the methodology used in this work to study the converter
characteristics is based on the design of experiment (DOE) and systematic numeric simulations. However, the theoretical modeling work and associate methodology are also
important. One potential way for this is to build different models for different operating
modes. With analytical model, the converter design can be optimized and small-signal
model gives insights on the stability and transient behavior of the converter.
For the novel multi-core ultra-compact and efficient bi-directional DC-DC converter
for distributed energy storage device modularization, the converter has been designed and
optimized to achieve high power density, high efficiency, high current and high voltage
gain in terms of the topology structure, power stage layout and minimizing parasitics,
magnetic trade off and inductor integration, channel number optimization, converter
package, multi-variable and high resolution modulation, soft switching, etc. In addition
to these, one future work is that the converter performance can be further improved with
advanced cooling approaches and thermal design. For example, the aluminum substrate
can potentially be used to substitute FR4 substrate of the power stage PCB to obtain
better cooling effect.
The DC droop controller has been designed in this work to balance the current among
different distributed energy storage device modules without fast communication, since
these modules are parallel connected on the system DC bus. The work mainly focused
on achieving controllable and linear equivalent virtual output resistance in steady state
operation. The stability of the converter and DC bus under the condition when multiple
modules are connected has not been studied. The transient current balance among the
modules has not been studied, either. These are interesting topics for the future research
on integrating these innovation battery energy storage modules into the DC grid systems.
207
The stability of the DC grid system may have some issues when multiple power electronic
converters and multiple power sources are connected.
208
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ABSTRACT

Advanced Bi-directional Converters for

A dissertation submitted to the Graduate Faculty of

Dr. Subhashish Bhattacharya

Dr. Srdjan Lukic

Dr. Xiangwu Zhang

Dr. Alex Huang

I dedicate this dissertation to my wonderful family. Particularly to my father, Jiajiong

List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii

Chapter 2 Review and Evaluation of Bi-directional DC-DC Converters

Chapter 3 A Novel Wide Voltage Range Bi-directional Series Resonant

The Procedure to Generate the LUT for Power Flow Reverse in

Chapter 4 A Novel Multi-core Ultra-compact and Efficient Bi-directional

High Resolution Digital Phase-shift Modulation Scheme . . . . . .

Chapter 6 A Novel Distributed Energy Storage Device . . . . . . . . . . 172

Specifications for bi-directional DC-DC converters for comparison

Specifications of the bi-directional series resonant DC-DC converter

High frequency soft magnetic core materials . . . . . . . . . . . . 104

The test conditions for the multi-core based bi-directional DC-DC

The mean capacity

The primary energy flow by source and sector of United States in

The bi-directional Buck/Boost DC-DC converter . . . . . . . . . 16

Figure 2.21 Bi-directional DC-DC converter based on a voltage-fed half bridge

Conventional uni-directional series resonant converter with clamped

The novel multi-core based bi-directional DC-DC converter . . . 98

The conventional dual-active-bridge (DAB) bi-directional DC-DC

Figure 5.16 Test waveforms of the prototype with d = 1.28, m = 0.665, = 0

Conventional battery energy storage system with bi-directional

The mean capacity of the battery string with different percentage

Unit for supply sources and demand sectors: Quadrillion BTU

Energy Storage for Grid Applications

Energy Storage for Electric Vehicle Applications

Fast Charge Port

The Scope of the Work

In summary, battery and supercapacitor energy storage systems become increasingly

Basic Non-isolated Bi-directional Converters

Non-isolated bi-directional DC-DC converters have the advantages of simple structure,

Figure 2.1: The bi-directional Buck/Boost DC-DC converter

Figure 2.2: The bi-directional Cuk DC-DC converter

Figure 2.3: The bi-directional SEPIC/Luo DC-DC converter

Derived Non-isolated Bi-directional Converters

Figure 2.4: The interleaved bi-directional Buck/Boost DC-DC converter

Figure 2.5: The cascaded bi-directional Buck/Boost DC-DC converter

Figure 2.6: The three-level bi-directional DC-DC converter

Performance of Non-isolated Bi-directional DCDC Converters in Battery Energy Storage Applications

The performance of the non-isolated bi-directional DC-DC converters is evaluated for

Performance of Buck/Boost, Cuk and SEPIC/Luo Converters

The example specifications for comparison of basic non-isolated bi-directional DC-DC

Table 2.1: Specifications for bi-directional DC-DC converters for comparison

Table 2.2: Calculated inductor size for comparison

Buck/Boost Cuk SEPIC/Luo

Buck/Boost Converter Efficiency Improvement

Figure 2.10: Switching frequency dependency on battery pack voltage of VFPWM

Figure 2.11: Experimentally tested converter efficiency of PWM and VFPWM

bridge converter in both Buck/Charge mode and Boost/Discharge mode is improved by

Performance of the Derived Non-isolated Bidirectional Converters in Battery Energy Storage

Three derived non-isolated bi-directional DC-DC converters, such as the interleaved

Figure 2.14: Test waveforms of three-level DC-DC converter in Buck mode

Table 2.3: Comparison of inductor size of Buck/Boost and three-level converter

Figure 2.15: Test waveforms of three-level DC-DC converter in Boost mode

Summary for the Non-isolated Bi-directional DCDC Converters

Review of Isolated Bi-directional DC-DC Converters

A few of transformer isolated bi-directional DC-DC converters were reported in the