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THE PROJECT

ENTITLED

Design And Analysis Of Input Power Factor Correction


Techniques In Uncontrolled Rectifier System
SUBMITTED IN
PARTIAL FULFILLMENT FOR THE DEGREE OF

BACHELOR OF TECHNOLOGY
IN

ELECTRICAL and ELECTRONICS ENGINEERING


SUBMITTED BY

MAULIK.R.DHANDHARA
(ROLL NO)

GUIDED BY
Mr. S.R. ARYA
(DESIGNATION)

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING


SCHOOL OF ENGINEERING AND TECHNOLOGY
NAVRACHANA UNIVERSITY,
VADODARA- 391410, INDIA
DECEMBER - 2014

University,

Department of Electrical and Electronics


Engineering,
School of Engineering and Technology, Navrachana
Vadodara-391410, INDIA.

CERTIFICATE
This is to certify that the project entitled DESIGN AND ANALYSIS OF INPUT POWER
FACTOR CORRECTION TECHNIQUES IN UNCONTROLLED RECTIFIER SYSTEM has
been carried out by Mr. Maulik R. Dhandhara , student of B.Tech. Electrical and Electronics
Engineering under my supervision. They completed their work within a period prescribed under the
ordinances governing the course leading to the Bachelors Degree in Electrical and Electronics
Engineering in School of Engineering and Technology, Navrachana University, Vadodara.
This is to further certify that the report embodies the result of the work carried out by them in the
period July 2014 to Dec 2014.
Date: _________
Place:_________

S. R. ARYA
( Faculty Supervisor )

SNEHA PATEL
(Head of Department)

EXAMINERS CERTIFICATE OF APPROVAL

The project entitled DESIGN AND ANALYSIS OF INPUT POWER FACTOR

CORRECTION TECHNIQUES IN UNCONTROLLED RECTIFIER SYSTEM


submitted by Mr. Maulik R. Dhandhara (P06EL852) in the partial fulfillment of the requirement for
the award of the degree in BACHELOR OF TECHNOLOGY IN ELECTRICAL AND
ELECTRONICS ENGINEERING of the Navrachana university, Vadodara.

Date : _________
Place : _________

Examiner

DECLARATION

I hereby declare that the project report entitled DESIGN AND ANALYSIS OF INPUT

POWER FACTOR CORRECTION TECHNIQUES IN UNCONTROLLED


RECTIFIER SYSTEM being submitted in the partial fulfillment for the award of the degree of
Bachelor of Technology in Electrical and Electronics Engineering to School of Engineering and
Technology, Navrachana University, Vadodara is authentic record of my own work done under the
guidance of Mr. S. R. ARYA (Lecturer) in Electrical and Electronics Engineering Department.

Date : __________
Place : _________

MAULIK.R.DHANDHARA
( Enrolment No.: P06EL852)

ACKNOWLEDGEMENTS
It is He, who is instrumental in all that happens; and guides us towards the ultimate goal, we just being
mere means. We thank the Almighty for his presence in each and every moment, delivering the
outcome, which I was supposed to give.
I am highly obliged to Mr. Vinod Gupta, Head of Section, Power Electronic Dept., ERDA, Vadodara,
who inspired me to work in power quality and embedded system area. I am thankful to him for his
timely guidance & suggestions. It is only his inspiration to introduce me to front end research.
With a deep sense of gratitude, I acknowledge here, the motivation, guidance & inspiration I received
from Prof. Varsha A Shah who shows full confidence in my abilities and encouraging me to perform
to the best of my capabilities.
I thank Shri A R Jariwala, Head of Department, SVNIT, Surat for sponsoring & taking the initiating
to send me at ERDA for the dissertation.
I am sincerely thankful to Mr. Suraj Pardeshi and..Mr Kamlesh Keharia for providing me with
work in which my technical skills were at test and had to be honed and blended with my analytical
approach, to facilitate my entry into the Professional Engineering..industry, jumping from Student life.
With due sense of respect and gratitude, I would like to extend my heartiest thanks to all those people
helped me in successful completion of my project, which was a highly educative experience to work at
ERDA. This industry interaction was a pleasant experience for me a student.
I am very much thankful to family inspiring me to reach this acme.
Finally I would like to thank all faculty of Saradar Vallabhbhai National Institute of Technology,
Surat and my friends who were always cordial and helpful.
Sneha

ABSTRACT
he term 'Power Quality' refers to the degree with which an electric power supply deviates
from its nominal, sinusoidal waveform, steady state voltage condition; a larger deviation
denoting poorer power quality. Although the term covers a wide range of parameters,

characterizing the voltages and currents at particular points in power supply systems, it can be
conveniently categorized into a number of quite distinct disturbance patterns. While all of these
disturbance patterns cause problems of one form or another, it is the Voltage Dips which is a major
concern at the present time and will be increasingly so in the future. Why then are voltage dips of such
importance? In the answer to this question, it must first be recognized that unlike other voltage
disturbances, when there is a voltage dip, there is a momentary and at times substantial loss of power.
This is also true, and even more so, for voltage short interruptions. It is clear that voltage dips cause
widespread and serious operational and economic problems to a very wide range of industrial,
commercial and service operations. Over the last few years, it has become widely recognized that
power quality is compatibility issue between the supply system and the load. In other words, it is the
tolerance or sensitivity of electrical loads compared to the quality that the supply system has to offer.
Solution to voltage dips and short interruption is either to use proper mitigation method or to increase
immunity of system. To implement any of the above solution we first need to check the voltage dips
and short interruption immunity of the equipment.
This project deals with the development of Voltage Dips and Short Interruption Immunity Test
Generator as per IEC 61000 4 11 , to check the immunity of a equipment against the voltage dips
and short interruption, which occurs widely in low voltage mains and interface with electrical and
electronics equipment connected to the mains. The output voltage waveforms of the immunity test
generator are in full compliance with the standard IEC 6100 4 11. IEC 6100 4 11 is a common
reference used to evaluate immunity of equipment while subjected to voltage dips or short
interruptions. The 3 phase generator is designed for immunity testing of equipment operating at low
voltage (not exceeding 240 V) and power frequency (50 Hz). Current rating of the generator is 32
amps. Generator is having user interface facility HMI (human machine interface) through which user
can generate the voltage dips or short interruption of any level and duration defined in IEC 61000 4
11. Experiment towards energy meter has been done to testify the equipments feasibility. The resulting
waveform can show that generator can work properly.

CONTENTS
List of Figures
List of Tables
List of abbreviation
1
Introduction & overview
1.1 Power Quality
1.2 Interest In Power Quality
1.3 Voltage dips & Short Interruption Power Quality Issues
1.4 Voltage Dips & Short Interruption: Everywhere and unavoidable
1.5 Effect of Voltage Dips and Short Interruption
1.6 Remedial Measures
1.7 Checking Voltage Dips Immunity: The Process
1.8 The Project
1.9 Dissertation Outline
2
Literature Survey
3
IEC 61000 - 4 11: Voltage dips and interruption immunity test standard
3.1 Standards associated with voltage dips & short interruption:
3.2 Definitions
3.3 Distinguishing Between Voltage Dips and Short Interruption
3.2 Rated voltage selection
3.3 Preferred Test Levels and Durations for Voltage Dips
3.4 Preferred Test Levels and Durations for Short Interruption
3.5 Voltage Dips and Interruption Immunity Test Methodology
4
Voltage Dips & Short Interruption Immunity Test Generator
4.1 MATLAB simulation
4.2 Voltage Dips and Interruption Immunity Test Generator Features
4.3 Test generator block diagram
4.4 Test Generator Specification
5
Power Circuit Implementation
5.1 Motorized variac
5.2 Transformer
5.3 Switches bidirectional igbt
5.4 Power supply
5.5 Driver card
6
Control Circuit Implementation
6.1 Introduction
6.2 PIC controller unit
6.3 HMI (Human Machine Interface)
6.4 RMS to DC converter
6.5 Zero crossing detector (ZCD)
7
Testing And Results
7.1 Testing of Driver Card
7.2 Bidirectional switching device testing
7.3 Control system testing
7.4 Voltage dips waveform
Conclusion
Future Work
References
Appendix A
PIC 16f737
89C51
7

1
3
4
5
6
7
7
8
9
10
11
11
13
16
17
21
22
22
23
23
25
27
27
28
29
30
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40
44
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51
53
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55
57
62

SK60GM123 IGBT module


M57962l driver IC

64
66

System connection
Control circuit connection

67
68

Appendix B

LIST OF FIGURES
Sr.
No.
1
2
3
4
5
6
7

Figure

Page

Power Quality A Compatibility Issue between Supply and Load


Immunity test generator of Noiseken and EMC Partner
RMS Plot of Voltage Dips Of 40 %
RMS Plot of Short Interruption.
Selection of Rated Voltage for Test Performance
Block diagram of Waveform Oscillator with Power Amplifier
Block diagram of Throw Over Switch

No.
10
14
18
19
22
23
24

LIST OF TABLES
Sr.
No
1
2
3
4
5
6
7

Table

Page

Comparison of immunity test generator.


Preferred Test Levels and Duration For Voltage Dips
Preferred Test Levels and Duration For short interruption.
Test Generator Specification
Truth Table for 74LS245
RMS to DC converter result
SK60GM123 Ratings

LIST OF ABBREVIATION
10

No.
15
22
23
28
37
44
65

HMI
ZCD
EMC

Human Machine Interface


Zero Crossing Detector
Electro Magnetic Compatibility

PQ

Power Quality

IEC

International Electro technical Commission

VD

Voltage Dips

SI

Short Interruption

RMS

Root Mean Square

DVR

Dynamic Voltage Restorer

EUT

Equipment Under Test

CHAPTER1
INTRODUCTION & OVERVIEW
This chapter contains a general introduction to power quality with special emphasis on voltage dips or
sags and short interruption. Effects of voltage dips and short interruption are presented for a selected
number of equipment types. Voltage dips from a perspective of electromagnetic compatibility are
11

discussed. The need for voltage dips and short interruption immunity testing for decision-making
regarding mitigation methods as well as for design purposes is highlighted. A literature review has
been done and the description of the project and the outline of this dissertation are presented.

1.1 Power Quality


There is an international agreement regarding the importance of reliability and power quality and
several research groups work on the subject around the world. Reliability should be interpreted here as

1.2 Interest in Power Quality


that transmission and distribution companies possess, even in the deregulated markets, requires

1.3 Voltage dips & Short Interruption Power Quality Issues:


that the required energy is not being delivered to the load and this can have serious consequences
depending on the type of load involved. Voltage dips; Short interruption in power supply can degrade
the performance of Electrical and electronic equipment in many different ways such as malfunctioning
of protective objects, digital circuit upset or data loss.

1.4 Voltage Dips & Short Interruption: Everywhere and unavoidable


1.4.1. General Effects:

Figure 1: Power Quality A Compatibility Issue between Supply and Load

Chapter 2: Literature Review:


This chapter presents the work done in the area of the voltage dips and short interruption. Also it
includes the different paper review, standard for the immunity checking and different manufacturer in
the same field.
Chapter 3: Project Details
The aim of this chapter is to define the term related to voltage dips and short interruption immunity
testing. It also defines the norms of the test and methodology of the test generator.
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Chapter 4: Impemantation
This chapter includes the MATLAB simulation of the generator methodology of motorized variac with
multi tapping transformer with its results. It also presents features, specifications and block diagram of
the generator.
Chapter 5: Testing and Result
The aim of this chapter is to describe the hardware circuit implemented in power circuit module. It
discusses in brief about motorized variac, multi tapping transformer, driver circuit, power supply
circuit etc.
Conclusions and Future Work
References
Appendix
Index

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