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Von Neumann Architecture
Von Neumann Architecture
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IAS Organization
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Stored-Program Computer
In a stored-program computer, the program to be executed is
stored in RAM along with data to be processed.
Program consists of binary instructions stored in RAM.
A program counter (or instruction pointer) register in the
CPU stores the memory address of the next instruction.
Alternative (less flexible) is hard-wired program using switches,
patch cables, etc.
Fetch/Decode/Execute Cycle
The basic cycle of operation of a von Neumann-style computer:
Fetch: The next instruction is retrieved from RAM.
(program counter is immediately incremented)
Decode: The instruction is examined to determine what the
CPU should do:
Opcode: field that determines the type of instruction.
Operand(s): fields that determine the source and
destination of data to be operated on.
Execute: The operation specified by the instruction is
performed.
May involve one or more memory references.
Instruction Set
The instruction set of a computer is the repertoire of instructions
that the CPU can perform.
Determined by the computer architects/designers.
Hard-wired as part of the computer design.
Different for each type of computer.
Typical Instructions
The instruction set of a typical von Neumann computer will contain instructions like the following:
Load data from memory to CPU register.
Store data from CPU register to memory.
Add, subtract, multiply, divide, etc. data in CPU registers.
And, or, xor, not, etc. data in CPU registers.
Shift and rotate data in CPU registers.
Jump based on CPU state flags (condition codes).
Call a subroutine and return to caller.
Example
A high-level language statement: X = A + B would be translated
to machine instructions as follows:
Load A
Add B
Store X
Accumulator Machines
Early von Neumann-style machines were accumulator machines:
CPU contained one register: the accumulator.
Accumulator used in nearly every instruction.
RAM is also accessed in nearly every instruction.
Problem: CPU and RAM are made using different technologies,
and CPU is much faster than RAM.
Was true in von Neumanns day, and is even more of an issue
today.
Example: A 3GHz CPU has a cycle time of 0.333 nanoseconds, but the access time of typical DRAM is over 100 times
slower.
Caches
A cache is a high-speed memory placed in between the CPU and
the RAM.
The cache retains recently accessed data and also data from
nearby locations.
Relies on locality of reference: if data from one address has
just been accessed, chances are that nearby addresses will be
accessed soon.
Cache memory uses different technology than normal memory (SRAM vs. DRAM) and is several times faster.
Modern computers use multiple levels of caches, with different speeds and capacities.
Example: Intel Core 2 Duo has 32KB of L1 cache with 3-cycle
latency and 4MB of L2 cache with 14-cycle latency.
Register Files
The single accumulator of von Neumanns machine has been
supplanted by register files:
1. Consist of small, high-speed incorporated into the CPU itself.
2. Most instructions can operate on data already stored in registers.
3. Reduces the fraction of instructions that have to access
RAM.
4. Permits CPU instruction cycle time to be several times faster
than the RAM cycle time.
A typical computer might contain 32 registers, each of which
can store one word.
Faster
Larger
Increasing Complexity
For a long time, computer designers built machines with ever
larger and more complex instruction sets.
Many different kinds of instructions, with complex functions.
Many different addressing modes (ways to access memory).
Each instruction could make multiple memory references.
A complex instruction set required complex hardware to
implement it.