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Statement of Purpose Details
Statement of Purpose Details
Statement of Purpose
After completing my B. Tech. in Electrical Engineering, I wish to pursue a degree of Ph.D. My main field of
interest is Mixed Signal Circuit Design. In future, I wish to pursue an academic profession in this domain.
During the course of my undergraduate degree, I have been involved in a variety of research projects in the
fields of circuit design, solid state devices and communication. This has allowed me to explore different fields
and find out which areas interest me the most. In the following paragraphs I describe some of the projects I
have worked on and how they have motivated me to pursue a PhD.
As a part of my undergraduate thesis, I am working on implementing object motion detection on chip. This
project is specifically aimed at applications such as collision avoidance in robotics and lane detection in
automobiles. FPGAs are the most commonly used hardware design platform in these cases, but they are not
particularly suitable for these applications which have power and space constraints. This project aims at
designing motion sensors using a novel binary imaging algorithm, where the image resolution is reduced by
using 1 bit imaging. Each pixel stores its previous binary value and compares the current value with it. This
way, frame subtraction is done at pixel level itself. Next, the overall information about change in pixels and
their current value is read out serially into ALU present on the same chip where motion is predicted based on
the changes in various pixels. During the project, the decision points involved selection of the memory
element, the comparator, the image pixel and the photodiode based on the constraints like maximizing fill
factor and minimizing static power dissipation. A software model was developed in Matlab as a proof of
concept. At present, the first iteration of motion detection at the rate of 100 frames per second is being tested
on Cadence. The chip will be fabricated in March, 2013.
As part of my Solid State Device Physics Course, I wrote a review paper on Optimization Techniques for
performance improvement in FinFETs. In this paper, I compared three types of techniques namely gate
controlled, geometry based and orientation based optimizations. Scaling down technology has introduced
problems of leakage currents, varying threshold voltages, reduced gate control, etc. Therefore, while
synchronous mode of gate control (front and back gate at a fixed offset) proved best for minimizing short
channel effects, unsynchronized mode provided freedom to vary threshold. Power minimization was done by
controlling the back gate like body (connecting to maximum and minimum potential for pMOS and nMOS
respectively). Similarly, geometry based optimizations appeared better for reducing contact resistance without
affecting short channel effects. Orientation optimizations included designing in <110> planes, which reduced
gate delay in pFinFETs. It was concluded that hybrid of these optimizations could provide the best design based
on specific application. Overall, the process of writing this review paper provided me an exposure to various
improvements done in the domain of FinFETs and helped me improve my paper reading and writing skills.
During my junior year, I got an opportunity to work at Bell Labs, India as a research intern. I worked on
implementing LTE parameters for 4G technology. The task was to emulate the channel on Ethernet (which
was later replaced by air transmission) and transfer data from Base Station to User Equipment in downlink
mode. The project was demonstrated by synchronously transmitting a video file from Base Station to User
Equipment. Code documentation was also improved upon for easy understanding in future. In the available
time frame of two and a half months, I was able to demonstrate single user downlink mode data transfer and
the future scope included extension to multiple users and base stations. This project helped me explore the
working environment in a large research group besides providing an exposure to communication side.