22419 Control por Computador

Grado en Ingeniera Electronica Industrial y Automatica

Homework: Design of digital controllers
December 3, 2013
1. Design proportional controllers for the following systems:
(a) G(z) =

1
z0.4

(b) G(z) =

1
(z+0.9)(z0.9)

in order to meet the following specifications where possible (they do not need to be met
necessarily in a simultaneous way):
a damping ratio of 0.7
a steady-state error below 10% due to a unit step
a steady-state error below 10% due to a unit ramp
If the design specification cannot be met, explain why.
2. Design a PID controller for G(s) =

1
(s+1)(s+5) :

(a) first in the s-domain, and then transform it to the z-domain using the Tustin design
method (use 20 times the natural frequency to set the sampling period); and
(b) directly in the z-domain (use the same sampling period of the previous point, and
backward-rectangular integration if needed)
so that a zero steady-state error to a step input is attained, the settling time ts is below
2 seconds and the undamped natural frequency is n = 5 rad/sec.
3. Given a system whose transfer function is G(s) = 1/(1 + s), design in the discrete-time
domain a digital PID controller. The system must verify the following specifications: Mp
= 20%, esp = 0, n = 3 rad/sec. Use T = 0.2s and the trapezoidal integration rule.

Alberto Ortiz

4. Find the discrete-time equivalent of C(s) =

T = 0.1s.
5. Find the discrete-time equivalent of C(s) =
and a generic sampling period T .

2
1
0.1s+1

using the Tustin design method and

2
n
2
s2 +2n s+n

using the Euler design method

s+2
6. Find the discrete-time equivalent of C(s) = 10 s+10
using the following methods and
T = 0.1s.

(a) Euler
(b) Tustin
(c) Pole-zero matching
(d) Impulse-invariance design
(e) Step-invariance design
7. By pole-zero cancellation design a digital PID controller for a DC motor speed control
1
system where the analog plant transfer function is G(s) = (s+1)(s+3)
so that the time
constant is less than 0.3 seconds, the dominant pole damping ratio is of at least 0.7
and the system attains zero steady-state error due to a unit-step input. Use a sampling
frequency s equal to 20 times the damped frequency d .
z+1
8. Given a plant G (z) = z(z2)
(T = 0.05 s), use the direct control design method to derive
1
.
a controller that makes the compensated system behave similarly to GR (z) = z0.7

9. Use the direct control design method to derive a controller for a plant given by G(s) =
1
5s
so that the compensated system exhibits zero steady-state error for a unit step
10s+1 e
and a settling time ts of about 10 seconds with no overshoot. The sampling period T
must be set to 1 second.
10. Use the direct control design method to derive a controller for a plant given by G(s) =
s+2
s(s+1) so that the compensated system matches the following specifications: overshoot
Mp = 20%, settling time ts = 6.67 seconds and steady-state error for a unit input step
esp below 10 %. Set the sampling period according to 10 times the damped frequency d .
11. Derive a ripple-free deadbeat controller corresponding to the plant G(s) =
and a sampling period T = 1 second.

1
(5s+1)(3s+1)

12. Find the direct form I, the direct form II, the parallel form and the cascade form for
1.4z 2 1.12z
controller C(z) = 2
.
z 1.6z + 0.6