IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO.

2, FEBRUARY 2015

871

PFC Cuk Converter-Fed BLDC Motor Drive

Vashist Bist, Student Member, IEEE, and Bhim Singh, Fellow, IEEE

AbstractThis paper deals with a power factor correction

(PFC)-based Cuk converter-fed brushless dc motor (BLDC) drive
as a cost-effective solution for low-power applications. The speed
of the BLDC motor is controlled by varying the dc-bus voltage of a
voltage source inverter (VSI) which uses a low frequency switching
of VSI (electronic commutation of the BLDC motor) for low switching losses. A diode bridge rectifier followed by a Cuk converter
working in a discontinuous conduction mode (DCM) is used for
control of dc-link voltage with unity power factor at ac mains. Performance of the PFC Cuk converter is evaluated under four different operating conditions of discontinuous and continuous conduction modes (CCM) and a comparison is made to select a best suited
mode of operation. The performance of the proposed system is simulated in a MATLAB/Simulink environment and a hardware prototype of the proposed drive is developed to validate its performance
over a wide range of speed with unity power factor at ac mains.
Index TermsBrushless dc (BLDC) motor, continuous conduction mode (CCM), Cuk converter, discontinuous conduction mode
(DCM), power factor correction (PFC), power quality (PQ).

I. INTRODUCTION
RUSHLESS dc (BLDC) motors are recommended for
many low- and medium-power drives applications because of their high efficiency, high flux density per unit volume,
low maintenance requirement, low electromagnetic interference
(EMI) problems, high ruggedness, and a wide range of speed
control [1], [2]. Due to these advantages, they find applications
in numerous areas such as household application [3], transportation (hybrid vehicle) [4], aerospace [5], heating, ventilation and
air conditioning [6], motion control and robotics [7], renewable energy applications [8], [9], etc. The BLDC motor is a
three-phase synchronous motor consisting of a stator having a
three-phase concentrated windings and a rotor having permanent magnets [10], [11]. It does not have mechanical brushes
and commutator assembly; hence, wear and tear of the brushes
and sparking issues as in case of conventional dc machines are
eliminated in BLDC motor and thus it has low EMI problems.
This motor is also referred as an electronically commutated motor since an electronic commutation based on the Hall-effect
rotor position signals is used rather than a mechanical commutation [12], [13].
There is a requirement of an improved power quality (PQ)
as per the international PQ standard IEC 61000-3-2 which recommends a high power factor (PF) and low total harmonic
distortion (THD) of ac mains current for Class-A applications

Manuscript received September 1, 2013; revised January 3, 2014; accepted

February 22, 2014. Date of publication March 4, 2014; date of current version October 7, 2014. Recommended for publication by Associate Editor
S. Williamson.
The authors are with the Department of Electrical Engineering, Indian Institute of Technology Delhi, New Delhi 110016, India (e-mail:
vashist.bist@gmail.com; bsingh@ee.iitd.ac.in).
Digital Object Identifier 10.1109/TPEL.2014.2309706

(<600 W, <16 A) which includes many household equipments [14]. The conventional scheme of a BLDC motor fed
by a diode bridge rectifier (DBR) and a high value of dc-link
capacitor draws a nonsinusoidal current, from ac mains which is
rich in harmonics such that the THD of supply current is as high
as 65%, which results in PF as low as 0.8 [15]. These types of
PQ indices cannot comply with the international PQ standards
such as IEC 61000-3-2 [14]. Hence, single-phase power factor
correction (PFC) converters are used to attain a unity PF at ac
mains [16], [17]. These converters have gained attention due to
single-stage requirement for dc-link voltage control with unity
PF at ac mains. It also has low component count as compared to
a multistage converter and therefore offers reduced losses [17].
Conventional schemes of PFC converter-fed BLDC motor
drive utilize an approach of constant dc-link voltage of the VSI
and controlling the speed by controlling the duty ratio of high
frequency pulse width modulation (PWM) signals [18][21].
The losses of VSI in such type of configuration are considerable since switching losses depend on the square of switching
frequency (Psw loss fS2 ). Ozturk et al. [18] have proposed
a boost PFC converter-based direct torque controlled (DTC)
BLDC motor drive. They have the disadvantages of using a
complex control which requires large amount of sensors and
higher end digital signal processor (DSP) for attaining a DTC
operation with PFC at ac mains. Hence, this scheme is not suited
for low-cost applications. Ho et al. [19] have proposed an active
power factor correction scheme which uses a PWM switching of
VSI and hence has high switching losses. Wu et al. [20] have proposed a cascaded buckboost converter-fed BLDC motor drive,
which utilizes two switches for PFC operation. This offers high
switching losses in the front-end converter due to double switch
and reduces the efficiency of the overall system. Gopalarathnam
et al. [21] have proposed a single-ended primary inductance converter (SEPIC) as a front-end converter for PFC with a dc-link
voltage control approach, but utilizes a PWM switching of VSI
which has high switching losses. Bridgeless configurations of
PFC buckboost, Cuk, SEPIC, and Zeta converters have been
proposed in [22][25], respectively. These configurations offer
reduced losses in the front-end converter but at the cost of high
number of passive and active components [22][25].
Selection of operating mode of the front-end converter is a
tradeoff between the allowed stresses on PFC switch and cost
of the overall system. Continuous conduction mode (CCM) and
discontinuous conduction mode (DCM) are the two different
modes of operation in which a front-end converter is designed to
operate [16], [17]. A voltage follower approach is one of the control techniques which is used for a PFC converter operating in the
DCM. This voltage follower technique requires a single voltage
sensor for controlling the dc-link voltage with a unity PF. Therefore, voltage follower control has an advantage over a current
multiplier control of requiring a single voltage sensor. This

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015

Fig. 1.

BLDC motor drive fed by a PFC Cuk converter using a current multiplier approach.

Fig. 2.

BLDC motor drive fed by a PFC Cuk converter using a voltage follower approach.

makes the control of voltage follower a simple way to achieve

PFC and dc-link voltage control, but at the cost of high stress
on PFC converter switch [16], [17]. On the other hand, the current multiplier approach offers low stresses on the PFC switch,
but requires three sensors for PFC and dc-link voltage control [16], [17]. Depending on design parameters, either approach
may force the converter to operate in the DCM or CCM. In this
study, a BLDC motor drive fed by a PFC Cuk converter operating in four modes/control combinations is investigated for
operation over a wide speed range with unity PF at ac mains.
These include a CCM with current multiplier control, and three
DCM techniques with voltage follower control.
II. SYSTEM CONFIGURATION
Figs. 1 and 2 show the PFC Cuk converter-based VSI-fed
BLDC motor drive using a current multiplier and a voltage

follower approach, respectively. A high frequency metaloxide

semiconductor field-effect transistor (MOSFET) is used in the
Cuk converter for PFC and voltage control [26][30], whereas
insulated-gate bipolar transistors (IGBTs) are used in the VSI for
its low frequency operation. The BLDC motor is commutated
electronically to operate the IGBTs of VSI in fundamental frequency switching mode to reduce its switching losses. The PFC
Cuk converter operating in the CCM using a current multiplier
approach is shown in Fig. 1; i.e., the current flowing in the input
and output inductors (Li and Lo ), and the voltage across the
intermediate capacitor (C1 ) remain continuous in a switching
period, whereas Fig. 2 shows a Cuk converter-fed BLDC motor
drive operating in the DCM using a voltage follower approach.
The current flowing in either of the input or output inductor (Li
and Lo ) or the voltage across the intermediate capacitor (C1 )
becomes discontinuous in a switching period [31], [32] for a
PFC Cuk converter operating in the DCM. A Cuk converter is

BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE

Fig. 3. Operation of the Cuk converter in the CCM during (a, b) different intervals of switching period and (c) associated waveforms. (a) Interval I.
(b) Interval II. (c) Waveforms.

designed to operate in all three DCMs and a CCM of operation

and its performance is evaluated for a wide voltage control with
unity PF at ac mains.
III. OPERATION OF THE CUK CONVERTER IN
DIFFERENT MODES
The operation of the Cuk converter is studied in four different
modes of CCM and DCM. In CCM, the current in inductors
(Li and Lo ) and voltage across intermediate capacitor C1 remain continuous in a switching period [33]. Moreover, the DCM
operation is further classified into two broad categories of a discontinuous inductor current mode (DICM) and a discontinuous
capacitor voltage mode (DCVM). In the DICM, the current
flowing in inductor Li or Lo becomes discontinuous in their
respective modes of operation [31], [32]. While in DCVM operation, the voltage appearing across the intermediate capacitor
C1 becomes discontinuous in a switching period [34], [35]. Different modes for operation of the CCM and DCM are discussed
as follows.
A. CCM Operation
The operation of the Cuk converter in the CCM is described
as follows. Fig. 3(a) and (b) shows the operation of the Cuk
converter in two different intervals of a switching period and
Fig. 3(c) shows the associated waveforms in a complete switching period.
Interval I: When switch Sw in turned ON, inductor Li stores
energy while capacitor C1 discharges and transfers its energy

873

Fig. 4. Operation of the Cuk converter in the DICM (L i ) during (a)(c)

different intervals of switching period and (d) associated waveforms. (a) Interval
I. (b) Interval II. (c) Interval III. (d) Waveforms.

to dc-link capacitor Cd as shown in Fig. 3(a). Input inductor

current iL i increases while the voltage across the intermediate
capacitor VC 1 decreases as shown in Fig. 3(c).
Interval II: When switch Sw is turned OFF, the energy stored
in inductor Lo is transferred to dc-link capacitor Cd , and inductor Li transfers its stored energy to the intermediate capacitor
C1 as shown in Fig. 3(b). The designed values of Li , Lo , and C1
are large enough such that a finite amount of energy is always
stored in these components in a switching period.

B. DICM (Li ) Operation

The operation of the Cuk converter in the DICM (Li ) is
described as follows. Fig. 4(a)(c) shows the operation of the
Cuk converter in three different intervals of a switching period
and Fig. 4(d) shows the associated waveforms in a switching
period.
Interval I: When switch Sw in turned ON, inductor Li stores
energy while capacitor C1 discharges through Switch Sw to
transfer its energy to the dc-link capacitor Cd as shown in
Fig. 4(a). Input inductor current iL i increases while the voltage across the capacitor C1 decreases as shown in Fig. 4(d).
Interval II: When switch Sw is turned OFF, the energy stored
in inductor Li is transferred to intermediate capacitor C1 via
diode D, till it is completely discharged to enter DCM operation.
Interval III: During this interval, no energy is left in input inductor Li ; hence, current iL i becomes zero. Moreover, inductor
Lo operates in continuous conduction to transfer its energy to
dc-link capacitor Cd .

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015

Fig. 5. Operation of the Cuk converter in DICM (L o ) during (a)(c) different intervals of switching period and (d) associated waveforms. (a) Interval I.
(b) Interval II. (c) Interval III. (d) Waveforms.

Fig. 6. Operation of the Cuk converter in the DCVM (C 1 ) during (a)(c)

different intervals of switching period and (d) associated waveforms. (a) Interval
I. (b) Interval II. (c) Interval III. (d) Waveforms.

C. DICM (Lo ) Operation

Interval II: The switch is in conduction state but intermediate

capacitor C1 is completely discharged; hence, the voltage across
it becomes zero. Output inductor Lo continues to supply energy
to the dc-link capacitor.
Interval III: As the switch Sw is turned OFF, input inductor
Li starts charging the intermediate capacitor, while the output
inductor Lo continues to operate in continuous conduction and
supplies energy to the dc-link capacitor.

The operation of the Cuk converter in the DICM (Lo ) is

described as follows. Fig. 5(a)(c) shows the operation of the
Cuk converter in three different intervals of a switching period
and Fig. 5(d) shows the associated waveforms in a switching
period.
Interval I: As shown in Fig. 5(a), when switch Sw in turned
ON, inductor Li stores energy while capacitor C1 discharges
through switch Sw to transfer its energy to the dc-link capacitor
Cd .
Interval II: When switch Sw is turned OFF, the energy stored
in inductor Li and Lo is transferred to intermediate capacitor
C1 and dc-link capacitor Cd , respectively.
Interval III: In this mode of operation, the output inductor Lo
is completely discharged; hence, its current iL o becomes zero.
An inductor Li operates in continuous conduction to transfer its
energy to the intermediate capacitor C1 via diode D.
D. DCVM (C1 ) Operation
The operation of the Cuk converter in the DCVM (C1 ) is
described as follows. Fig. 6(a)(c) shows the operation of the
Cuk converter in three different intervals of a switching period
and Fig. 6(d) shows the associated waveforms in a switching
period.
Interval I: When switch Sw in turned ON as shown in
Fig. 6(a), inductor Li stores energy while capacitor C1 discharges through switch Sw to transfer its energy to the dc-link
capacitor Cd as shown in Fig. 6(d).

IV. DESIGN OF THE PFC CUK CONVERTER

A PFC-based Cuk converter-fed BLDC motor drive is designed for dc-link voltage control of VSI with PFC at the ac
mains. The Cuk converter is designed for a CCM and three
different DCMs. In the DCM, any one of the energy storing elements Li , Lo or C1 is allowed to operate in the discontinuous
mode whereas in the CCM, all these three parameters operate
in continuous conduction. The design and selection criterion of
these three parameters is discussed in the following section.
The input voltage Vs applied to the DBR is given as

(1)
vs (t) = Vm Sin(2fL t) = 220 2 Sin(314t)V

where Vm is the peak input voltage (i.e., 2Vs , Vs is the rms

value of supply voltage), and fL is the line frequency, i.e., 50 Hz.
The instantaneous voltage appearing after the DBR is as
follows:




(2)
Vin (t) = |Vm Sin (t)| = 220 2 Sin (314t) V
where  represents the modulus function.

BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE

875

value of supply voltage (i.e., 2Vsm in ) is calculated as

 2 

Vs m in
Vdc m ax
1

Lic200 =
2fS Pm ax
2Vs m in + Vdc m ax
 2 

85
200
1

=
= 322.3 H.
2 20 000 350
85 2 + 200

TABLE I
SPECIFICATIONS OF A BLDC MOTOR

(6)

The output voltage Vdc of the Cuk converter is given as [15]

Vdc =

D
Vin (t)
(1 D)

(7)
(3)

where D represents the duty ratio.

The instantaneous value of duty ratio D(t) depends on the
input voltage appearing after DBR Vin (t) and the required dclink voltage Vdc .
Hence, the instantaneous duty ratio D(t) is obtained by substituting (2) into (3) and rearranging it as
D(t) =

Vdc
Vdc
=
.
Vin (t) + Vdc
|Vm Sin (t)| + Vdc

And the critical value of the input inductor at the minimum value
of dc-link voltages of 40 V at the peak value of supply voltage
is calculated as
 2 

Vs m in
Vdc m in
1

Lic40 =
2fS
Pm in
2Vs m in + Vdc m in
 2 

85
40
1

=
= 644.25 H.
2 20 000 70
85 2 + 40

(4)

The Cuk converter is designed to operate from a minimum

dc voltage of 40 V (Vdcm in ) to a maximum dc-link voltage of
200 V (Vdcm ax ). The PFC converter of maximum power rating
of 350 W (Pm ax ) is designed for a BLDC motor of 251 W (Pm )
(full specifications given in Table I) and the switching frequency
(fS ) is taken as 20 kHz. Since the speed of the BLDC motor
is controlled by varying the dc-link voltage of the VSI, hence
the instantaneous power Pi at any dc-link voltage (Vdc ) can be
taken as linear function of Vdc . Hence, for a minimum value
of dc-link voltage as 40 V, the minimum power is calculated as
70 W.
A. Design of Li for Continuous or Discontinuous
Current Conduction
The critical value of input inductor Lic is expressed as [17]
 2
Vs D(t)
Vin (t)D(t)
Rin D(t)
Lic =
=
=
2Iin (t)fS
2fS
Pi
2fS
 2 

Vs
Vdc
1
=
(5)
2fS Pi
Vin (t) + Vdc
where Rin (t) is the input side resistance, and Iin (t) is the input
side current after DBR.
Hence, the critical value of input side inductor is directly
proportional to the rms value of supply voltage; therefore, the
worst case design occurs for the minimum value of supply voltage (i.e., Vs = Vsm in = 85 V). Now, the critical value of input
inductor at the maximum dc-link voltages of 200 V at the peak

Hence, the value of critical input inductance is obtained lower

at maximum dc-link voltage. Therefore, the critical value of
input inductor is selected lower than Lic200 . The performance
of the Cuk converter feeding BLDC motor drive is analyzed
for different values of the input side inductor, i.e., 300, 200,
and 100 H, respectively. Fig. 7(a) shows the variation of THD
of supply current at ac mains for the proposed BLDC motor
drive with dc-link voltage for different values of the input side
inductor. A high THD of ac mains current is obtained at higher
values of the input side inductor which does not comply with
the IEC 61000-3-2 [14]. Hence, the input inductor (Li ) of the
order of 100 H is selected for its operation in discontinuous
conduction to achieve a low value of THD of supply current at
ac mains.
The value of input inductor to operate in the CCM is decided
by the amount of permitted ripple current () and is as [17]
 2
Vs D(t)
Vin (t)D(t)
Rin D(t)
=
=
Liccm =
Iin (t)fS
fS
Pi
fS
 2 

Vs
Vdc
1
=
.
(8)
fS Pi
Vin (t) + Vdc
The maximum inductor ripple current is obtained under the
rated condition, i.e., Vdc = 200 V for a minimum supply voltage
at
(Vsm in = 85 V). Hence, the input side inductor is designed

the peak value of minimum supply voltage (i.e., Vs = 2Vsm in )

as
 2 

Vs m in
Vdc m ax
1

Liccm =
fS Pm ax
2Vs m in + Vdc
 2 

85
200
1

=
= 2.57 mH
0.25 20 000 350
85 2 + 200
(9)
where the permitted amount of ripple current () is selected as
25% of the input current.
Hence, the input side inductor of 2.5 mH is selected for its
operation in continuous conduction.

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015

200 V (i.e., Vdcm ax ) is given as

 2 


Vs m in
V
Vdc m ax
dc m ax

Lo c200 =
Pm ax 2 2Vs m in fS
2Vs m in + Vdc m ax
 2


85
200
200

=
350 2 2 85 20 000 85 2 + 200
= 536 H.

(11)

Moreover, the critical value of output side inductor at peak of

Vsm in and minimum dc-link voltage of 40 V is given as
 2 


Vs m in
V
Vdc m in
dc m in

Lo c40 =
Pm in 2 2Vs m in fS
2Vs m in + Vdc m in
 2


85
40
40

=
70 2 2 85 20 000 85 2 + 40
= 214.4 H.

(12)

Hence, the critical value of output inductor is to be selected

lower than Lo c40 . The performance of the proposed BLDC motor drive is analyzed for different values of output side inductor,
i.e., 200, 130, and 70 H, respectively.
Fig. 7(b) shows the variation of THD of supply current at ac
mains for the proposed BLDC motor drive with dc-link voltage
for different values of the output side inductor. A high THD
of ac mains current is obtained at higher values of output side
inductor which does not comply with the IEC 61000-3-2 [14].
Hence, the output inductor (Lo ) of the order of 70 H is selected
for its operation in discontinuous conduction to achieve a low
value of THD of supply current at ac mains.
The value of output inductor to operate in the CCM is decided
by the amount of permitted ripple current () and is as [17]
Vdc (1 D(t))
Vdc D(t)
Rin Vdc D(t)
=
=
IL o (t)fS
Iin (t)fS
Vin (t)fS
 2


Vs
Vdc
Vdc
=
.
(13)
Pi Vin (t)fS Vin (t) + Vdc

Lo ccm =
Fig. 7. Variation of THD of supply current at ac mains with change in dc-link
voltage for (a) different values of input side inductors (L i ) and (b) different
values of output side inductors (L o ).

B. Design of Lo for Continuous or Discontinuous

Current Conduction
The critical output side inductor is designed as [17]

Vdc (1 D(t))
Vdc D(t)
Rin Vdc D(t)
=
=
2IL o (t)fS
2Iin (t)fS
2Vin (t)fS
 2


VS
Vdc
Vdc
=
.
(10)
Pi 2Vin (t)fS Vin (t) + Vdc

Lo c =

The maximum current ripple in an inductor occurs at the

maximum power and for minimum value of supply voltage (i.e.,
Vsm in = 85 V). Hence, the output
inductor is calculated at the
peak of supply voltage (Vin = 2Vsm in ). The critical value
of the inductor corresponding to maximum dc-link voltage of

Hence, the maximum current occurs at maximum dc-link

voltage (i.e., Pm ax ) and the minimum supply voltage of 85 V
(i.e., Vsm in ). Hence, the value of output inductor (Lo ) for a
permitted maximum ripple current () of 25% is calculated as
 2 


Vs m in
V
Vdc m ax

dc m ax
Lo ccm =
Pm ax 2Vs m in fS
2Vs m in + Vdc m ax

 2

85
200
200

=
350 0.25 2 85 20 000 85 2 + 200
= 4.29 mH.

(14)

Hence, Lo of 4.3 mH is selected for operation of output

inductor (Lo ) in continuous conduction.
C. Design of C1 for Continuous or Discontinuous Voltage
The critical value of intermediate capacitance C1c is as [17]
C1c =

Vdc D (t)
.
2VC 1 (t) fS RL

(15)

BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE

877

Hence, by substituting the expressions of intermediate capacitor voltage, VC 1 (t) = {Vdc +Vin (t)}, emulated load resistance,
2
/Pi and D(t) from (4) in (15) and rearranging it one
RL = Vdc
obtains


Vdc
Vdc



C1c =
2 P
Vin (t) + Vdc
2 {Vdc + Vin (t)} fS Vdc
i
=

Pi
.
2fS (Vin (t) + Vdc )2

TABLE II
DESIGN PARAMETERS IN DIFFERENT MODES OF OPERATION

(16)

Now, the maximum ripple in the intermediate capacitor occurs at the maximum value of supply voltage (i.e., Vsm ax =
270 V). Hence, the critical value of the intermediate capacitance
is calculated at maximum dc-link voltage (Vdcm ax = 200 V) as
C1c200 =
=

Pm ax

2
2fS
2Vs m ax + Vdc m ax
350


2 = 25.84 nF. (17)
2 20 000 270 2 + 200

And the critical value of intermediate capacitance at minimum

dc-link voltage (Vdcm in = 40 V) is calculated as
C1c40 =
=

2fS

Pm in
2Vs m ax + Vdc m in

2

70


2 = 9.83 nF.
2 20 000 270 2 + 40

Vdc D (t)
VC 1 (t) fS RL
{Vdc

(18)

Vdc
 2 
Pi
+ Vin (t)} fS Vdc

Vdc
Vin (t) + Vdc

Pi
.
fS (Vin (t) + Vdc )2

(19)

Hence, the value of intermediate capacitor is calculated at

maximum ripple voltage in C1 which occurs at maximum value
of supply voltage (i.e., Vsm ax = 270 V) and maximum dc-link
voltage and is given as
C1ccm =
=

fS

Pm ax
2Vs m ax + Vdc m ax

The value of the dc-link capacitor is calculated by [17]

Cd =

Hence, an intermediate capacitor is selected less than C1c40 .

Therefore, the value of intermediate capacitor is taken as 9.1 nF
for its operation in discontinuous conduction.
The value of intermediate capacitance to operate in the CCM
with a permitted ripple voltage of % is given as [17]
C1ccm =

D. Design of DC-Link Capacitor (Cd )

2

350


2 = 0.516 F
0.1 20 000 270 2 + 200

Idc
(Pi /Vdc )
Pi
=
=
2 .
2Vdc
2Vdc
2Vdc

(21)

Now, the value of the dc-link capacitor is calculated at maximum value of dc-link voltage given as
Pm ax
350
=
= 348.33 F
2
2Vdc m ax
2 314 0.04 2002
(22)
where represents the permitted ripple in dc-link voltage which
is taken as 4% of Vdc .
And the dc-link capacitance at minimum value of dc-link
voltage (Vdcm in ) is expressed as
Cd200 =

Pm in
70
=
= 1741.6 F.
2
2Vdc
2

314

0.04 402
m in
(23)
Hence, the value of the dc-link capacitor is taken higher than
the Cd40 to ensure a ripple of dc-link voltage less than 4% even
at lower values of dc-link voltages. Hence, the dc-link capacitor
of 2200 F is selected for the application.
Table II shows the specification of the PFC Cuk converter and
the selected values of input and output inductors, intermediate
capacitor, and the dc-link capacitor for a PFC Cuk converter
operating in different modes of conduction.
Cd40 =

E. Design of Filter Parameters (Lf and Cf )

(20)

where is selected as 10% of the maximum voltage appearing

across the intermediate capacitor.
Hence, the intermediate capacitor of 0.66 F is selected for
this application for the intermediate capacitor operating in continuous conduction.

A low-pass LC filter is used to avoid the reflection of higher

order harmonics in the supply system. The maximum value of
filter capacitance is given as [36]
 

Pm ax 2 Vs
Im
tan() =
tan()
Cm ax =
L V m
L V m


350 2/220
tan(1 ) = 401.98 nF
=
(24)
314 220 2

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015

where Im and Vm are the peak value of supply current and

supply voltage, respectively, and is the displacement angle
between supply voltage and supply current.
Hence a value of filter capacitor Cf is taken as 330 nF.
Now, the value of the filter inductor is designed by considering
the source impedance (Ls ) of 45% of the base impedance.
Hence, the additional value of inductance required is given as
  2 
1
Vs
1
= Lreq +0.04
Lf = Lreq +Ls
L
Po
4 2 fc2 Cf



1
2202
1
Lreq =
0.04
314
350
4 2 (2000)2 330109

where vs (k)/Vm is the unit template of supply voltage vs and

Vm represents the amplitude of supply voltage.
This reference current is compared with the sensed input
current to generate a current error given as
ie (k) = iin (k) iin (k).

(30)

This current error is given to the current controller to generate

a controlled output (Vcc ) given as

Vcc (k) = Vcc (k 1) + kpi {ie (k) ie (k 1)} + kii ie (k)

(31)
where kpi and kii are the proportional and integral gain of the
current PI controller.
Finally, the controller output (Vcc ) is compared with the high
= 1.573 mH
(25)
frequency sawtooth waveform to generate the PWM signal to
where fc is the cut-off frequency which is selected such that be given to the PFC converter switch as
fL < fc < fS ; hence, it is taken as fS /10.
(32)
md (t) < Vcc (t) then Sw = 1, else Sw = 0
Hence, an LC filter is selected with inductance Lf and capacitance Cf as 1.57 mH and 330 nF, respectively.
where Sw denotes the switching signals as 1 and 0 for MOSFET
Therefore, an input side LC filter with Lf = 1.57 mH and to switch ON and OFF, respectively.
Cf = 330 nF is taken for harmonics suppression at the ac mains.
V. CONTROL OF THE PFC CUK CONVERTER-FED BLDC
MOTOR DRIVE
Two different control schemes of the PFC Cuk converter are
the current multiplier and the voltage follower approach for its
operation in CCM and DCM, respectively. A brief description
of both control schemes is presented in this section.
A. Current Multiplier Approach for the Cuk Converter
Operating in the CCM
An equivalent reference voltage (Vdc ) corresponding to the
particular reference speed (N ) is generated by a Reference
Voltage Generator as the speed of the BLDC motor which is
proportional to the dc-link voltage of the VSI. Fig. 1 shows
the Cuk converter feeding BLDC motor drive using a current
multiplier approach. A reference voltage is generated by the
product of speed and the voltage constant (Kb ) of the BLDC
motor and is given as

Vdc
= kb N .

(26)

This reference voltage is compared with the sensed dc-link

voltage (Vdc ) to generate a voltage error (Ve ). The voltage error
Ve at any instant k is given as

Ve (k) = Vdc
(k) Vdc (k).

(27)

This voltage error is given to voltage proportional-integral

(PI) controller for generation of a controlled output (Vc ) as
Vc (k) = Vc (k 1) + kpv {Ve (k) Ve (k 1)} + kiv Ve (k)
(28)
where kpv is the proportional gain and kiv is the integral gain of
the voltage PI controller.
The reference current (iin ) is generated by multiplying the
controller output with the unit template of supply voltage as


 vs (k) 

 Vc (k)

iin (k) = 
(29)
Vm 

B. Voltage Follower Approach for the Cuk Converter

Operating in the DCM
In this approach, a reference voltage (Vdc ) corresponding to
the particular reference speed (N ) is generated similar to the
current multiplier approach as

= kb N
Vdc

(33)

where kb represents the BLDC motors voltage constant and N

is the reference speed.
Now, this reference voltage is compared with sensed dc-link
voltage (Vdc ) to generate a voltage error (Ve ). The voltage error
Ve at any instant k is given as

(k) Vdc (k).

Ve (k) = Vdc

(34)

This voltage error is given to the voltage PI controller to

generate a controlled output (Vcd ) given as
Vcd (k) = Vcd (k 1) + kpv {Ve (k) Ve (k 1)} + kiv Ve (k)
(35)
where kpv and kiv are the proportional and integral gain of the
voltage PI controller.
Finally, the controller output (Vcd ) is compared with the high
frequency sawtooth waveform to generate the PWM signal to
be given to PFC converter switch as
md (t) < Vcd (t) then Sw = 1, else Sw = 0

(36)

where Sw denotes the switching signals as 1 and 0 for MOSFET

to switch ON and OFF, respectively.
VI. SIMULATED PERFORMANCE OF THE PROPOSED BLDC
MOTOR DRIVE
The performance of the Cuk converter-fed BLDC motor drive
is simulated for four different modes in MATLAB/Simulink environment. The performance of each mode of operation is evaluated on the basis of various performance parameters. Supply
voltage (vs ) and supply current (is ) are used for estimating the

BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE

879

TABLE III
PERFORMANCE OF THE BLDC MOTOR DRIVE WITH THE CUK CONVERTER
OPERATING IN THE CCM

inductor current iL i , output inductor current iL o , and intermediate capacitors voltage VC 1 are continuous in operation while
the supply current iS is sinusoidal and in phase with the supply
voltage vS which shows a unity PF at ac mains. Table III shows
the performance of the proposed BLDC motor fed by a PFC Cuk
converter operating in the CCM over a wide range of dc-link
voltage control (i.e., speed control) with unity PF operation at ac
mains [14]. Table VII shows the peak voltage and current stress
of the PFC converter switch for different modes of operation.
The peak voltage and current stresses of 560 V and 8.1 A are
obtained under rated condition in this mode of the CCM.
B. Performance of the BLDC Motor Fed by a Cuk Converter
Operating in the DICM (Li )
Fig. 8. Simulated performance of the BLDC motor drive with the Cuk converter operating in the CCM.

PQ of the system. The speed (N ), electromagnetic torque (Te ),

and the stator current (ia ) of the BLDC motor are used for determining the satisfactory operation of the BLDC motor, whereas
the dc-link voltage (Vdc ), inductors currents (iL i and iL o ), intermediate capacitors voltage (VC 1 ), switch voltage (Vsw ), and
switch current (isw ) are used for the performance evaluation of
the PFC Cuk converter. PQ indices such as PF, displacement
power factor (DPF), crest factor, and THD of supply current are
analyzed for determining PQ at ac mains.
A. Performance of the BLDC Motor Fed by the Cuk Converter
Operating in the CCM
The circuit configuration and control of the PFC Cuk converter operating in the CCM are shown in Fig. 1. The parameters
selected for this converter to operate in the CCM are as follows:
Input inductor Li = 2.5 mH, output inductor Lo = 4.3 mH,
intermediate capacitor C1 = 0.66 F, and dc-link capacitor
Cd = 2200 F.
Fig. 8 shows the performance of the proposed BLDC motor drive fed by a PFC Cuk converter operating in the CCM.
Fig. 8 shows the steady-state performance demonstrating the
associated waveforms for 3 cycles of line frequency. The input

The circuit configuration and control of the PFC Cuk converter operating in the DICM of operation with input inductor
(Li ) operating in discontinuous conduction are shown in Fig. 2.
The parameters selected for this converter to operate in DICM
(Li ) are as follows:
Input inductor Li = 100 H, output inductor Lo = 4.3 mH,
intermediate capacitor C1 = 0.66 F, and dc-link capacitor
Cd = 2200 F.
The steady-state performance of the Cuk converter-fed BLDC
motor drive operating in the DICM with input inductor operating
in discontinuous conduction is shown in Fig. 9. The input inductor current iL i is discontinuous as shown in Fig. 9, while the
output inductor current iL o and intermediate capacitors voltage
VC 1 remain continuous. Table IV shows the improved PQ operation of the BLDC motor fed by a Cuk converter operating in
the DICM (Li ) over a wide range of speed control. As shown in
Table VII, peak voltage stress of 570 V and peak current stress
of 33.1 A are obtained under rated condition in this mode of the
DICM (Li ).
C. Performance of the BLDC Motor Fed by a Cuk Converter
Operating in the DICM (Lo )
The circuit configuration and control of the PFC Cuk converter operating in the DICM of operation with output inductor
(Lo ) operating in discontinuous conduction are shown in Fig. 2.

880

Fig. 9. Simulated performance of the BLDC motor drive with the Cuk converter operating in the DICM (L i ).
TABLE IV
PERFORMANCE OF THE BLDC MOTOR DRIVE WITH THE CUK CONVERTER
OPERATING IN THE DICM (L i )

The parameters selected for this converter to operate in the

DICM (Lo ) are as follows:
Input inductor Li = 2.5 mH, output inductor Lo = 70 H,
intermediate capacitor C1 = 0.66 F, and dc-link capacitor
Cd = 2200 F.

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015

Fig. 10. Simulated performance of the BLDC motor drive with the Cuk converter operating in the DICM (L o ).
TABLE V
PERFORMANCE OF THE BLDC MOTOR DRIVE WITH THE CUK CONVERTER
OPERATING IN THE DICM (L o )

Fig. 10 shows the performance of the proposed BLDC motor

drive fed by a PFC Cuk converter operating in the DICM (Lo ).
A discontinuous output inductor current iL o is obtained while
the input inductor current iL i and intermediate capacitors voltage VC 1 remain in continuous conduction operation. Table V
shows the performance of the BLDC motor drive fed by a Cuk

BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE

881

TABLE VI
PERFORMANCE OF THE BLDC MOTOR DRIVE WITH THE CUK CONVERTER
OPERATING IN THE DCVM (C 1 )

intermediate capacitor (VC 1 ) remains discontinuous while the

currents in input and output inductors (iL i and iL o ) remain in
continuous conduction. A near unity PF operation is achieved
at the ac mains for a wide range of dc-link voltage control (i.e.,
speed control) as shown in Table VI. As shown in Table VII, the
peak current stress of 10.5 A is obtained which is low and of the
order of peak current stress as obtained in the CCM, but a very
high voltage stress of 1950 V is obtained under rated condition
which makes this configuration difficult to realize in practice.
E. Comparative Analysis of the Proposed BLDC Drive With
the PFC Cuk Converter in Different Modes of Operation
Fig. 11. Simulated performance of the BLDC motor drive with the Cuk converter operating in the DCVM.

converter operating in the DICM (Lo ) over a wide range of

dc-link voltage control (i.e., speed control). An improved PQ
operation is achieved for the complete range of speed control.
The peak voltage and current stress of 560 V and 20.5 A, respectively, is obtained under rated condition in this mode of the
DICM (Lo ) as shown in Table VII, which is quite acceptable
for a power rating of 350 W.
D. Performance of the BLDC Motor Fed by a Cuk Converter
Operating in the DCVM (C1 )
The circuit configuration and control of the PFC Cuk converter operating in the DCVM of operation with the intermediate capacitor (C1 ) operating in discontinuous conduction are
shown in Fig. 2. The parameters selected for this converter to
operate in the DCVM (C1 ) are as follows:
Input inductor Li = 2.5 mH, output inductor Lo = 4.3 mH,
intermediate capacitor C1 = 9.1 nF, and dc-link capacitor Cd =
2200 F.
The steady-state performance of the BLDC motor drive fed
by a Cuk converter operating in the DCVM is shown for 3 cycles
of line frequency in Fig. 11. In this mode, the voltage across the

The performance of the Cuk converter feeding a BLDC motor

has been analyzed for different continuous and discontinuous
modes of operation. The stress on the PFC converter switch
in case of the PFC Cuk converter operating in the CCM is
very low, but it utilizes a current multiplier approach for PFC
operation which requires three sensors (i.e., two voltages and
one current sensor), which is not recommended for low-cost
and low-power applications. The performance in terms of PQ
is obtained satisfactory in all configurations. Fig. 12(a) and (b)
shows the variation of THD of supply current and PF at ac mains
with dc-link voltage. The THD of supply current obtained is
below 9% in all modes which is well acceptable in IEC 610003-2 which recommends a THD of supply current of the order
of 19% for class-A applications (household equipments) [14].
The PF obtained is above 0.99 for all conditions which shows a
unity PF operation at the ac mains.
An analysis based on the peak voltage across the switch and
current stress through the switch is also carried out to determine the feasibility and the stress constraints of the proposed
scheme. Fig. 13(a) and (b) shows the peak voltage and current
stress variation with the load on the BLDC motor. As shown in
Fig. 13(a), the voltage stress of the DCVM (C1 ) is very high
(1950 V) and cannot be recommended because of higher switch
rating requirement, whereas the voltage stress for the remaining
three modes is of the order of 560 V which is acceptable. Now,
the choice among the two configurations of DICM is decided

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015

TABLE VII
STRESS ON PFC CONVERTER SWITCH FOR DIFFERENT CONFIGURATION OF THE CUK CONVERTER-FED BLDC MOTOR DRIVE

Fig. 12. Variation of (a) THD of supply current and (b) PF with dc-link voltage
for different configuration of the PFC Cuk converter-fed BLDC motor drive.

on the basis of peak current stress as shown in Fig. 13(b). A

lower current stress in the DICM (Lo ) is obtained which makes
it suitable for the particular application. Moreover, EMI problems in the DICM (Li ) configuration are high because of the

Fig. 13. Variation of (a) switch peak voltage and (b) peak current with load
for different configuration of the Cuk converter-fed BLDC motor drive.

input side inductor which in series with the supply operating in

discontinuous mode. A comparative analysis of four different
modes of operation is summarized in Table VIII. Based on this
analysis, a hardware prototype of the BLDC motor drive with

BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE

TABLE VIII
COMPARATIVE ANALYSIS OF VARIOUS MODES OF OPERATION

TABLE IX
COMPARATIVE ANALYSIS OF THE PROPOSED CONFIGURATION WITH
CONVENTIONAL SCHEMES

883

TABLE X
VARIATION OF DC-LINK VOLTAGE AND SPEED WITH REFERENCE VOLTAGE

control loop for dc-link voltage control and to achieve electronic

commutation is used which requires a low-cost processor for the
development purpose.
Hence, the simplicity, low losses in VSI due to fundamental
switching, requirement of minimum amount of sensing, and
a much simple approach of speed control with a PFC at ac
mains make the proposed drive a good solution for low-power
application.
VII. HARDWARE VALIDATION OF THE PROPOSED DRIVE
A DSP (TI-TMS320F2812) is used for the development of
the proposed BLDC motor drive. Isolation between the DSPbased controller and gate drivers of solid state switches of VSI
and PFC converter is provided using an opto-coupler. The prefiltering and isolation circuits for a Hall-effect position sensor
are also developed for sensing the rotor position signals. Moreover, software-based moving average filter is also developed for
sensing the Hall signals [37]. The performance of the proposed
drive is evaluated for a wide range of speed control with unity
PF operation at ac mains.
A. Steady-State Performance of the Proposed Drive

the Cuk converter operating in DICM (Lo ) is developed as discussed in the next section.
F. Comparative Evaluation of the Proposed Configuration
With Conventional Schemes
This section deals with a comparative study of three configurations of BLDC motor drive. The proposed configuration
is compared with a conventional DBR-fed BLDC motor drive
and a conventional single-switch PFC converter feeding BLDC
motor drive via a PWM-based switching of VSI [18][20]. The
evaluation is based on the control requirement, sensor requirement, system complexity, losses in a drive system, and the overall cost of the system.
Table IX shows a comparative performance of the proposed
configuration with the conventional scheme of BLDC motor
drives. The proposed configuration requires a single voltage
sensor for dc-link voltage control as compared to other two
configurations, which reduces the cost of the overall system.
The sensor requirement in a conventional PFC-based BLDC
motor drive is highest due to the use of PWM-based switching
of BLDC motor which requires two current sensors and one
voltage sensor for dc-link voltage control. Moreover, a simple

Fig. 14(a) and (b) shows the operation of the proposed BLDC
motor drive for a dc-link voltage (Vdc ) of 200 and 50 V, respectively. The supply current is achieved is sinusoidal in nature and
is in phase with the supply voltage vs demonstrating the unity
PF at ac mains. The dc-link voltage Vdc is maintained at the desired value and the frequency of stator current ia of the BLDC
motor is used for the determination of speed of the BLDC motor. The frequency of the stator current as shown in Fig. 14(a)
and (b) is of the order of 80 and 18 Hz, respectively (electronic
commutation of the BLDC motor). This frequency is very low
as compared to PWM-based control of VSI for controlling the
speed of the BLDC motor drive. Hence, the switching losses
in VSI corresponding to such low frequency are very low as
compared to PWM based switching of VSI. The variation of
speed and the dc-link voltage with reference voltage at analogto-digital converter (ADC) of DSP is shown in Table X.
B. Operation of the Cuk Converter Operating in the
DICM (Lo )
Fig. 15(a) and (b) shows the waveforms of current in input
and output inductors (iL i and iL o ) and intermediate capacitors
voltage (VC 1 ) to demonstrate the DICM operation of output
inductor Lo . As shown in these figures, the current in input
inductor (iL i ) and voltage across intermediate capacitor (VC 1 )

884

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015

Fig. 14. Steady-state performance of the Cuk converter-fed BLDC motor drive
under rated condition with dc-link voltage as (a) 200 V and (b) 50 V.

remain continuous but the current in output inductor becomes

discontinuous for a switching period. Fig. 15(c) shows the voltage and current of the PFC converters switch with peak voltage
and current stress of 580 V and 19 A, respectively.
C. Dynamic Performance of the Proposed Drive
Fig. 16(a) shows the dynamic performance of the proposed
BLDC motor drive during starting at dc-link voltage of 50 V.
This stator current (ia ) of the BLDC motor and supply current
waveforms are recorded to show the limited overshoot under the
dynamic conditions. Fig. 16(b) shows the dynamic performance
of the proposed BLDC motor drive during speed control which
is obtained by step change in dc-link voltage from 100 to 150 V.
Moreover, the dynamic performance of the proposed BLDC motor drive during step change in supply voltage from 250 to 180 V
is shown in Fig. 16(c). The change in dc-link voltage is obtained
with smooth transition and limited overshoot in supply current

Fig. 15. Test results of the proposed BLDC motor drive showing (a) supply
voltage with inductors currents and intermediate capacitors voltage and (b)
its enlarged waveforms. (c) Waveform of voltage and current stress on PFC
converter switch.

BIST AND SINGH: PFC CUK CONVERTER-FED BLDC MOTOR DRIVE

885

Fig. 17. PQ indices of the proposed BLDC motor drive at rated load on the
BLDC motor with: (a)(c) dc-link voltage as 200 V under rated conditions,
(d)(f) dc-link voltage as 50 V under rated conditions, (g)(i) dc-link voltage as
200 V and supply voltage as 90 V at rated load, (j)(l) dc-link voltage as 200 V
and supply voltage as 270 V at rated load.

and stator current of the BLDC motor, which demonstrates a

satisfactory closed-loop performance of the proposed drive.
D. Unity PF Operation of the Proposed Drive

Fig. 16. Test results of the proposed BLDC motor drive at rated load on
BLDC motor during: (a) starting at dc-link voltage of 50 V, (b) step change in
dc-link voltage from 100 to 150 V, and (c) change in supply voltage from 250 to
170 V.

Supply voltage vs , supply current is , active Pac , reactive Pr ,

and apparent Pa powers are measured on a Fluke make PQ
analyzer to demonstrate the PQ indices such as PF, DPF, and
THD of supply current. Fig. 17(a)(c) and (d)(f) shows the
results obtained at dc-link voltage of 200 and 50 V, respectively.
Moreover, Fig. 17(g)(i) and (j)(l) shows the performance at
supply voltages of 90 and 270 V, respectively. An improved PQ
is obtained in all these conditions and the obtained PQ indices
are within the recommended limits of IEC 61000-3-2 [14]. A
satisfactory performance of the proposed BLDC motor drive fed
by a PFC Cuk converter is achieved and is demonstrated through
simulated and experimental results. Thus, the proposed drive is
suitable for achieving a unity PF at ac mains over a wide range
of speed control at universal ac mains.

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 30, NO. 2, FEBRUARY 2015

Cuk converter-fed BLDC motor drive with the Cuk converter

operating in the DICM (Lo ).

REFERENCES

Fig. 18. Waveform of the supply current showing the control detuning phenomenon in a Cuk converter operating in the DICM (L o ).

VIII. CONCLUSION
A Cuk converter for VSI-fed BLDC motor drive has been
designed for achieving a unity PF at ac mains for the development of the low-cost PFC motor for numerous low-power
equipments such fans, blowers, water pumps, etc. The speed
of the BLDC motor drive has been controlled by varying the
dc-link voltage of VSI, which allows the VSI to operate in the
fundamental frequency switching mode for reduced switching
losses. Four different modes of the Cuk converter operating in
the CCM and DCM have been explored for the development of
the BLDC motor drive with unity PF at ac mains. A detailed
comparison of all modes of operation has been presented on the
basis of feasibility in design and the cost constraint in the development of such drive for low-power applications. Finally, a
best suited mode of the Cuk converter with output inductor current operating in the DICM has been selected for experimental
verifications. The proposed drive system has shown satisfactory results in all aspects and is a recommended solution for
low-power BLDC motor drives.
APPENDIX
Detuning phenomenon in a Cuk converter: Detuning phenomenon represents the inability of a PFC converter to maintain a sinusoidal supply current at near zero-crossings of the
supply voltage [38]. This distortion of the supply current at its
zero crossing results in high THD of supply current and directly
affects the PF at ac mains. Now, considering a case of a PFC
Cuk converter-fed BLDC motor drive with the Cuk converter
operating in the DCM with output inductor (Lo ) is designed
to operate in the DCM. During the PFC operation, the supply
current is in phase with the supply voltage and it is sinusoidal
in nature. The input power at zero crossings of supply voltage
is very low and the duty ratio is unity. Hence, a distortion in
input inductor current occurs due to inability of the input inductor to maintain a continuous current through it. Fig. 18 shows
the distortion of supply current near zero crossing for a PFC

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Vashist Bist (S13) received the Diploma and B.E.

degrees in instrumentation and control engineering
from the Sant Longowal Institute of Engineering and
Technology, Punjab, India, in 2007 and 2010, respectively, and is currently working toward the Ph.D. degree in the Department of Electrical Engineering, Indian Institute of Technology Delhi, India.
His research interests include power electronics,
electrical machines and drives.

887

Bhim Singh (SM99F10) received the Bachelor of

Engineering (electrical) degree from the University of
Roorkee, Roorkee, India, in 1977, and the M.Tech.
(power apparatus and systems) and Ph.D. degrees
from the Indian Institute of Technology Delhi (IITD),
New Delhi, India, in 1979 and 1983, respectively.
In 1983, he joined the Department of Electrical
Engineering, University of Roorkee, as a Lecturer. He
became a Reader there in 1988. In December 1990,
he joined the Department of Electrical Engineering,
IITD, as an Assistant Professor, where he became
an Associate Professor in 1994 and a Professor in 1997. He was the ABB
Chair Professor from September 2007 to September 2012. Since October 2012,
he has been a CEA Chair Professor. He has guided 45 Ph.D. dissertations,
139 M.E./M.Tech. theses, and 60 B.E./B.Tech. projects. He has been granted
one US patent and has filed 12 Indian patents. His fields of interest include power
electronics, electrical machines, electric drives, power quality, renewable energy,
flexible ac transmission systems, and high voltage direct current transmission
systems.
Dr. Singh received Khosla Research Prize of University of Roorkee in the
year 1991. He received JC Bose and Bimal K Bose awards of The Institution
of Electronics and Telecommunication Engineers for his contribution in the
field of power electronics. He also received the Maharashtra State National
Award of Indian Society for Technical Education (ISTE) in recognition of
his outstanding research work in the area of power quality. He received PES
Delhi Chapter Outstanding Engineer Award for the year 2006. He also received
Khosla National Research Award of IIT Roorkee in the year 2013. He has been
the General Chair of the IEEE International Conference on Power Electronics,
Drives and Energy Systems (PEDES2006), Co-General Chair of PEDES2010,
held in New Delhi. He has executed more than 60 sponsored and consultancy
projects. He is a Fellow of The Indian National Science Academy, the Indian
National Academy of Engineering, The National Academy of Science, India,
The Indian Academy of Sciences, India, The World Academy of Sciences, the
Institute of Engineering and Technology, Institution of Engineers (India), and
Institution of Electronics and Telecommunication Engineers and a Life Member
of the ISTE, System Society of India, and National Institution of Quality and
Reliability.