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10 Synchronization: © Alcatel University - 3FL 40034 AGAA WB ZZA Ed.01
10 Synchronization: © Alcatel University - 3FL 40034 AGAA WB ZZA Ed.01
10 Synchronization: © Alcatel University - 3FL 40034 AGAA WB ZZA Ed.01
10.1
© Alcatel University - 3FL 40034 AGAA WBZZA Ed.01
10.2
10.1 Introduction
10.3
© Alcatel University - 3FL 40034 AGAA WBZZA Ed.01
SSU
SSU
SSU Level
SSU SSU
SEC SEC
SEC
10.4
To prevent Transmission errors in SDH network the internal clock of the network element must be synchronized to a
central clock, which is generated by an high-precision Primary Reference Clock (PRC) unit conforming to the ITU-T
Recommendation G.811.This is the highest level of synchronization in a network.Normally there are two different
PRC in a network, one the main and one the spare.The PRC specify an accuracy of:
z 10E-13 if it utilizes Cesium radioactive sample
z 10E-11 if it utilizes Rubidium radioactive sample
The second level of the hierarchical structure is represented by the SSU(Synchronization Supply Unit), which is
normally a stand-alone piece of equipment in the network. In case of loss of the PRC reference, the SSU provides
the network with a high quality synchronization signal. The SSU filters the jitter out of the incoming reference, which
results from phase noise on the synchronization links between the PRC and the SSU.
z SSUs with a Transit Node quality have a sufficient quality to be placed at each point of the
synchronization chain; thus each can be used as a reference for further SSUs.
z Local Node clocks, in contrast to Transit Node clocks, can only be placed as the last SSU in the
synchronization chain.
The third and last level of synchronization is represented by the SEC (SDH Equipment Clock) which is normally built
into the SDH network elements. The SEC filters out jitter from the selected incoming timing reference and provides
the SDH network element with a holdover capability for at least 24 hours. The normal operating mode of the SEC is
to be slaved to an SSU.
PRC
K = max 10 SSU
SEC SEC
N = max 20
SEC SEC
Synchronization link
SSU SSU
SSU SSU
SEC SEC
The quality of timing will deteriorate as the number of synchronization links increases.
Therefore, the number of network elements in tandem should be minimized for reliability reasons.
The values for the worst case synchronization reference chain* (ITU recommendation G.803) are:
z K (maximum number of SSUs in a chain) = 10
z N (maximum number of SECs between 2 SSUs) = 20, with the total number of SDH network element clocks
limited to 60
G.811 10E-11
Primary
PRC LEVEL PRC Reference Clock
Long Term
Frequency departure
5*10E-9 Accuracy
Synchronization Supply
SSUT G.812T 5* 10E-10 Offset
Unit Transit Node
10E-9/Day Drift
SSU LEVEL
5*10E-7 Accuracy
Synchronization Supply
SSUL G.812L 10E-8 Offset
Unit Local Node
2*10E-8/Day Drift
4.6*10E-6 Accuracy
Synchronous
SEC LEVEL SEC G.813 5*10E-8 Offset
Equipment clock
5*10E-7/Day Drift
10.6
G.811 (ITU-T Recommendation) : “Timing requirements at the outputs of primary reference clocks suitable for
plesiochronous operation of international digital links”.
G.812 (ITU-T Recommendation) :“Timing requirements at the outputs of slave clocks suitable for plesiochronous
operation of international digital links”.
G.813 (ITU-T Recommendation) :“Timing characteristics of SDH equipment slave clocks (SEC)”.
DNU: Do Not Use. This signal should not be used for synchronization.
The Unknown quality level was defined to characterize the quality of existing SDH networks. This quality level is no
longer supported by the hardware. Today, in SDH it indicates an invalid timing quality. The quality ‘unknown’ is a
commonly used quality in SONET networks. It is the highest quality in those networks except for PRC quality which is
higher. SDH networks should never(!) use quality unknown.
(Bit5…..Bit8): Synchronisation
status of synch. Path
9 bytes
(Bit1….. Bit4): spare
* * * * * * * * *
A1 A1 A1 A2 A2 A2 J0
B1 Δ Δ E1 Δ F1 RSOH
D1 Δ Δ D2 Δ D3
0 7
AU-n unit pointers
B2 B2 B2 K1 K2
9 rows
D4 D5 D6
D7 D8 D9 MSOH
S1 M1 E2
10.7
In the MSOH of the STM-N frame,there is a byte called S1 in which, in the last four bits, we can insert the quality of
a signal.This quality can be of different type and for every type there is a different codification .
Does only
one source
NO
have the
highest quality
criterion? Selection of the clocks
Analysis of the
with the highest
priorities table
quality criterion
YES
Selection of the source
with the best criterion Selection of the clock
with the highest priority
Locking of the
sync board
10.8
The SSM is an algorithm that allows the NE to choose the best possibility for the synchronisation of a NE.
In particular :
z If in a NE there are two different ports with two different signals the system choose the port with the best
quality of signal.
z If in a NE there are two different ports with the same quality of signal the system choose the port that has
the highest priority.
Squelch
6 B
T1/T2
Selector T0
SETG
1/2 B (Internal Clk)
T3/T6
From
SERVICE/SERGI
osc
SETS
10.9
The SETS function (Synchronous equipment timing source) is a subsystem of an SDH Network Element and it’s
implemented within the MATRIX unit in the 1660SM and the SYNTH in the 1650SM-C
The SDH Equipment accepts up to 6 synchronization inputs from the following types of sources:
z T1 is the clock derived from STM-N line signal
z T2 is a clock derived from the 2Mbit/s signal
z T3 is a 2MHz signal
z T6 is a 2Mbit/s signal without data information but with SSM information (not available on 1640FOX)
z internal oscillator (VCO Voltage Controlled Oscillator)
z T3 and T6 share the same connector on the front panel of SERVICE(for 1660SM and /SERG I(for
1650SM-C) card; the selection between the two signals is made via software.
z Automatic selection of one of these input sources is achieved by a selector using quality criteria(SSM
algorithm) or priority criteria.
z Also manual selection is possible.
10.10
From SERVICE/SERGI
Notes:The 1640FOX has only the SYNTH main and there aren’t the T3/T6 signals.
10.11
The holdover mode requires at least 30 minutes of locked condition before loosing the reference.
There is a PLL that maintains locked the System clock to the one selected as input in case the equipment works in
"locked" mode.
As the MATRIX /HCMATRIX and SYNTH are redundant, the synchronization function is redundant as well.
The synchronization sub-system guarantees the Hitless switch because the two MATRIX/HCMATRIX and SYNTH
boards work in a Master-Slave mode. In order to maintain locked and in phase conditions the two GAs some signals
are exchanged on the SYNC BUS.This function isn’t implemented in the 1640FOX because it hasn’t the Master-Slave
mode.
direction of timing
This port must
not be a sync port
10.12
10.13
10.2 Operation
10.15
© Alcatel University - 3FL 40034 AGAA WBZZA Ed.01
Synchronization view window shows the functional scheme of SETS (Synchronous equipment Timing Source)
according to ITU-T Rec. G.783.
The input clock can be selected from 6 different inputs, separately for T0 (internal reference ) and for T4 (external
output).
The free running indication is changed into holdover, when the NE looses the external clock reference (it is necessary
to maintain the reference for at least 30 minutes, to get holdover when removing the reference)
10.17
Timing Source Configuration window opens, with the following parameters to be configured:
Î Input Source: must be a physical port (select Choose to open TP Search)
Î Input quality Configuration: possible values are displayed i the pulldown menu open by the arrow ( )
on the right of the entry box. G.811, G812/T, G.812/L, G813, Don’t use, Extracted
Î Priority: from 1 to 6.
z Criteria for automatic selection is, in the order:
Î Signal present
Î Quality (determined by SSM, if enabled)
Î Priority (determined by the Operator)
ª N.B. Quality is not taken into account if SSM is disabled.
Within TP Search window the operator has to select the port which is considered as clock input.
Warning! The selected TP must be a physical port, e.g.:
z a physical port at 2Mbit/s (not available in the 1670SM);
z a physical port at STM-N in an SDH module
z one of the two external synchronization sources, T3#A,T3#B, T6#A orT6#B physically available on connectors
on Service card of the 1660SM and 1670SM or Sergi of the 1650SM-C. Not available on the 1640FOX.
Input Quality Configuration box is used to assign a quality level to the reference source: choose “Extracted” if the
signal carries quality information (SSM), otherwise select a specific value according to the synchronization network
organization
Constraints for 1670SM: if an interface managed by P16OS1 or P16S1N must be set as synchronization source, the
interface must belong to Group 1 and must be configured as A, B or C.
A4S1
A4S1
A4S1
A4S1
Group 1 Group 1
REMEP16
A12OS1
A16ES1
A
Group 2
Group 2
B
C
D Group 2
P16OS1
P16S1N
P16S1N
Group 1 Group 2
Group 1
E
F
10.19
In this example:
z Synchronization view window was modified, by clicking on OK within Timing Source Configuration window,
after selecting a 2Mbit/s port :
DRIFT : is an alarm appearing when the Clock frequency offset is larger then 15 ppm; it is cleared when the offset is
less than 7 ppm (roughly).
10.20
This menu is enabled only if the operator selects a protection unit which has as source a 2 MHz
z 2MhT3#A to 2MbpsT6#A
z 2MhT3#B to 2MbpsT6#B
10.21
The SSM algorithm implements the choice among the sources of synchronization, according to the best quality
indicated in SSM byte. The use of SSM algorithm allows also the automatic restoration of the synchronization in a
network in case of failure.
When SSM algorithm is enabled:
z SSM is extracted by the incoming signal and used as criteria to select the clock reference
z NE inserts SSM=Don’t use in the opposite direction from where the clock is received (in case of SDH
reference clock)
z Internal clock is assumed SSM=G.813; you have the same quality in the Holdover condition
z If “Inserted” is selected in “Transmitted SSM Quality Configuration” window, the system internal T0 clock
quality is transmitted towards the external interface
10.22
You can use the Squelching Criteria to define the lowest quality in the T4/T5 output clock
Force Squelch enables both the squelches for T4
The SSM algorithm implements the choice among the synchronization’s sources, according to the best quality
indicated in SSM byte. The use of SSM algorithm allows also the automatic restoration of the synchronization in a
network in case of failure
10.23
The “Transmitted SSM Quality Configuration” window permits to define the value of SSM byte in the signal outgoing
from the selected port.
z open the window by selecting Synchronization → Transmission SSM Quality
z choose the quality level selecting among the different values: “Inserted” allows to transmit the system internal
T0 clock quality towards the external interface
Î N.B. to use the “Inserted” option, the SSU algorithm must be enabled
It is possible to configure the Transmitted SSM quality also from the Port View as in the picture below.
Î Remember:
ª Manual has not the priority on alarms, and not priority on automatic SSM algorithm
SSU
T4
T3 2 MHz from NE
2 MHz
from SSU
NE
Clock from
STM-1,
traced from
PRC
10.25
1 2 3
N SEC
10.26
The connection between T0 and T4 will pass from a shaped to a continue line as in the picture.
10.27
10.28
Select any reference source in the synchronization view hence Show Timing Source.
This selection opens the Port View of the selected reference source allowing to analyse the input source considering its
payload structure and the related alarms.
10.29
10.30
Time allowed :
15 minutes
10.31
INS EX
PORT
PORT
Eq 3
EX
EX INS
PORT PORT
MAIN Q=G811
PORT
PORT
Eq 2 Eq 1 2MHz
PORT PORT
EX
LEGENDA:
Eq=equipment
Time allowed :
INS=inserted
50 minutes EX=extracted
Q=quality
10.32
10.33