LABORATORY III

(KMS2201)

EXPERIMENT 1
Combinational Logic

Objectives

Wire up various digital logic gates on a breadboard and examine their

truth tables.
Construct a 3-input Majority Gate using NAND gates.

Equipment

Digital Trainer
Breadboard
Components (74LS00 , 74LS04 , 74LS08 , 74LS10 , 74LS32 , 74LS86 ,
74LS02)
Resistor (560)

Preparation
Answer the following question and note for verification in the lab session.
1.
2.

Write the Boolean expression for a two- input AND gate.

When both inputs are HIGH, output will be __________.

3.
4.

Write the Boolean expression for two-input OR gate.

If inputs A and B are both LOW, output Y will be__________.

5.
6.

Write the Boolean expression for a two-input NAND gate.

When both inputs are HIGH, output from the NAND gate will be________.

7.
8.
9.

Write the Boolean expression for a two-input NOR logic gate.

If input A is LOW and input B is HIGH, output Y of the NOR gate will
be_______.
When both inputs are LOW, output Y of the NOR gate will be_______.

10.
11.
12.

Write the Boolean expression for a two-input XOR gate.

If both inputs are HIGH, output Y from the XOR gate will be__________.
Write the Boolean expression for a tree-input XOR gate.

Experiment 1: Combinational Logic

LABORATORY III
(KMS2201)

Procedures
I. AND GATE EXPERIMENT
1. Observe Fig. 1-1, (marked 7408 AND GATE IC), plug the IC into the digital
trainer
and select any of a set of AND GATE, connect it according to the circuit in
Fig. 1-1
(b) circuit shows. Connect the INPUT A, B to Data Switch SW1,
SW2.Connect
the output Y to LED display. (Dont forget to connect the +V CC and GND).

(a)

2. Change Data Switches SW1, SW2 to turn the LED light on or off (that
means the
OUTPUT is 1 or 0), observe the relationship between input and output,
and
then record it in Table 1.
VC C 4A

4B

4Y

3A

3B

3Y
8

14

13

12

11

10

1
1A

2
1B

3
1Y

4
2A

5
2B

6
2Y

7
G N D

(a)

7408
AND G ATE

A
B
0

S1
1

+5V

S2
1

Table 1
Y
560
LED

0
0
1
1

0
1
0
1

+5 V

(b)

Y=A.B

Experiment 1: Combinational Logic

LABORATORY III
(KMS2201)

Fig. 1-1

II. OR GATE EXPERIMENT

1. Observe Fig. 1-2, (marked 7432 OR GATE IC), plug it into the digital trainer.
Select any of a set of OR GATE and connect it. Referring to the circuit in
Fig.1-2
(b), connect input A and B to Data Switches SW1 and SW2 respectively,
connect output Y to the LED display. (Dont forget to connect the +V CC and
GND).
2. Change Data Switches SW1 and SW2 from 0 to 1 and back to 0,
then observe the input and output situations, record them in Table 2.

V C C

4A

4B

4 Y

3A

3 B

3Y

14

13

12

11

1 0

1
1A

2
1B

3
1Y

4
2 A

5
2B

6
2 Y

7
G N D

(a)

Experiment 1: Combinational Logic

LABORATORY III
(KMS2201)

Table 2
A

0
0
1
1

0
1
0
1

Y=A+B
7432
O R G ATE

A
B
0

S1
1

+5 V

560

S2
0

LED

+5 V

(b)

Fig. 1-2

III. NOT GATE EXPERIMENT

1. Referring to Fig. 1.3, which is marked 7404 NOT GATE IC, plug this IC in
the
breadboard of digital trainer and select any of a set of NOT GATE,
according to
the circuit in Fig. 1.3(b) circuit shows.
2. Connect the INPUT A to Data Switch SW1, Output Y to LED display.
(Note: Dont forget to connect the +5V to the 14 th pin of IC, and the 7th pin
to GND.)

Experiment 1: Combinational Logic

LABORATORY III
(KMS2201)

VCC

6A

6Y

5A

5Y

4A

4Y

14

13

12

11

10

1
1A

2
1Y

3
2A

4
2Y

5
3A

6
3Y

GND

(a)
Table 3
A

1
0
Y=A
7404
N O T G A T E
Y

560

S 1
0

1
L E D
+ 5V

(b)

Fig. 1-3

Experiment 1: Combinational Logic

LABORATORY III
(KMS2201)

IV. NAND GATE EXPERIMENT

1. See Fig. 1-4, (marked 7400 NAND GATE IC), plug the IC into the digital
trainer and select any of a set of NAND GATE, connect it according to
the circuit in Fig. 1-4 (b) circuit shows. Connect the INPUT A and B
to Data Switches SW1, SW2 respectively. Connect the output Y to
LED display. (Dont forget to connect the +V CC and GND).
2. Change Data Switches SW1, SW2 to turn the LED light on or off (that
means the OUTPUT is 1 or 0, observe the relationship between
input and output, and then record it in Table 4.

V C C 4A
14 13

4B
12

4Y
11

3A

3B

10

3Y
8

Table 4
1
1A

2
1B

4
2A

5
2B

(a)

7400
NAND G ATE

Y
B

3
1Y

S1
1 0

+5V

6
2Y

7
G N D

0
0
1
1

0
1
0
1

560

S2
1

Y=A.B
LED

+5V

(b)
Fig. 1-4

Experiment 1: Combinational Logic

LABORATORY III
(KMS2201)

V. NOR GATE EXPERIMENT

1. See Fig. 1-5, (marked 7402 NOR GATE IC), plug the IC into the digital

trainer
and select any of a set of NAND GATE, connect it according to the circuit
in
Fig.1-5(b) circuit shows. Connect the INPUT A and B to Data Switches
SW1,
SW2 respectively. Connect the output Y to LED display. (Dont forget to
connect the +VCC and GND).
2. Change Data Switches SW1, SW2 to turn the LED light on or off (that
means
the OUTPUT is 1 or 0, observe the relationship between input and
output,
and then record it in Table 5.

V C C 4 Y
1 4
1 3

1
1 Y

2
1 A

3 Y
1 0

3 A

1 2

4 B
1 1

3
1 B

4
2 Y

5
2 A

6
2 B

Y
B
S1
1

+5V

560

S2
0

3 B
8

7
G N D

(a)

7402
N O R G AT E

4 A

LED

Table 5
A
0
0
1
1

B
0
1
0
1

+5 V

(b)

Y=A+B
Fig. 1-5

Experiment 1: Combinational Logic

LABORATORY III
(KMS2201)

VI. EXCLUSIVE OR GATE EXPERIMENT

1. See Fig. 1-6, (marked 7486 EXCLUSIVE OR GATE IC), plug the IC into
the digital trainer and select any of a set of EXCLUSIVE OR GATE,
connect it as Fig. 1-6(b) circuit shows. Connect the INPUT A and B to
Data Switches SW1, SW2 respectively. Connect the output Y to LED
display. (Dont forget to connect the +VCC and GND).
2. Change Data Switches SW1 and SW2 from 0 to 1 and back to 0,
then observe the input and output situation, record them in Table 6.

V C C 4A
14 13

4B
12

4Y
11

3A
10

3B
9

3Y
8

Table 6
A
1
1A

2
1B

7486
E X -O R G A T E

A
B
0

S1
1 0

3
1Y

4
2A
(a)

5
2B

6
2Y

7
G N D0
0
1
1

0
1
0
1

560

S2
1

LED
+5V

+5 V

Y=AB

(b)
Fig. 1-6

Experiment 1: Combinational Logic

LABORATORY III
(KMS2201)

Task
1. Based on the Boolean expression given on each diagram below, construct
a similar combinational circuit by substituting NAND gates only. Test the
circuit and verify.
LOGIC
FUNCTION

SYMBOL

CIRCUIT USING NAND GATES ONLY

Inverter

AND

A
B

A . B

OR

A
B

A + B

NOR

A
B

A + B

XOR

A
B

Experiment 1: Combinational Logic

LABORATORY III
(KMS2201)

Part II
I.

OR GATE WITH INVERTER INPUTS

Prepare a circuit schematic diagram of the circuit shown in Figure 2a. The
two inputs, A and B will connect to toggle switches and the output F will
connect to an LED on the digital trainer. Complete the truth table in Figure
2b and compare with the truth table in Figure 1-4.

A
0
0
1
1
(a) Logic diagram

B
0
1
0
1

(b) Truth table

Figure 2.

II. CASCADED 3-INPUT OR GATES

Prepare a circuit schematic diagram of the circuit shown in Figure 3a. The
three inputs, A, B and C will connect to toggle switches and the output F will
connect to an LED on the digital trainer. Complete the truth table in Figure
3b and compare with the truth table of a 3-input OR gate.

A
0
0
0
0
1
1
1
1

B
0
0
1
1
0
0
1
1

C
0
1
0
1
0
1
0
1

Experiment 1: Combinational Logic

LABORATORY III
(KMS2201)

(a) Logic diagram

(b) Truth table

Figure 3.

III.

3-INPUT MAJORITY GATE CIRCUIT

A majority gate is a digital circuit whose output is equal to 1 if the majority of

inputs are 1's. The output is 0 otherwise. Prepare a circuit schematic diagram of
the 3-input majority gate circuit shown in Figure 4a. The three inputs, A, B and
C will connect to toggle switches and the output F will connect to an LED on the
digital trainer. Complete the truth table in Figure 4b.

A
0
0
0
0
1
1
1
1
(a) Logic diagram

B
0
0
1
1
0
0
1
1

C
0
1
0
1
0
1
0
1

(b) Truth table

Figure 4.

For Triple NAND Gate refer to appendix A

Experiment 1: Combinational Logic

LABORATORY III
(KMS2201)

Appendix A
Triple NAND Gate (74LS10)

Experiment 1: Combinational Logic