WIDE BANDWIDTH SINGLE AND THREE-PHASE PLL STRUCTURES FOR GRID-TIED

PV SYSTEMS
L. N. Arruda'
B. J. Cardoso Filho*
S. M. Silva *
S. R. Silva'
A. S.A.C. Diniz'
licia@ieeq.org cardosob@cpdee.ufmg.br sidelmosilva@zipma!l.com selenios@eee.ufmg.br asacd@cemig.com.br
CEMIG - Companhia Energetica de Minas Gerais
Universidade Federal de Minas Gerais
AV. Barbacena, 1200 - 2Oc-andar - Funcionarios
Departamento de Engenharia Eletrica
30123-970 - Belo Horizonte - MG - Brazil
AV.AntBnio Carlos, 6627 - Pampulha
31270-901 - Belo Horizonte - MG - Brazil

ABSTRACT
This paper presents a detailed description of a
three-phase PLL (phase-locked loop) structure that fits
the requirements of utility connected PV systems. The
tuning of the PLL structure is discussed as well as its
performance
under
utility distorted
conditions.
Additionally, a new single-phase PLL topology is
introduced. Its dynamic behavior is evaluated and its
quasi-instantaneous ability to detect phase, frequency
and amplitude of the utility voltage is highlighted. The
analysis of the performance of the introduced singlephase PLL topology under islanding condition is also
presented. Simulation and experimental results are
included to support the theoretical.

INTRODUCTION
The development and growth of grid-connected
systems is demanding a close evaluation of the
performance of the available PLL structures, as well as
their influence on the quality of the energy generated by
the PV systems. The most common PLL topologies (see
Fig. 1) [1][2] can be classified as zero-crossing structures
in which the detection of phase and frequency
disturbances is based on the zero crossing instants of the
input signal, resulting in a slow structure. Additionally, the
Voltage Controlled Oscillator (VCO) block demands a dc
input signal. Hence, a Low-pass Filter is required, thus
contributing to further constrain the dynamic performance
of the PLL structure.

characteristics of the conventional PLL topologies may

result in phase and frequency detection errors, which
make them unsuitable for utility connected %applications
as
the input signal of this system (utility voltage) is usually
distorted.
This paper presents a detailed description of the
PLL topology introduced in [3], including the tuning of the
controllers and the determination of the influence of each
disturbance source in the output variable (phase angle).
Additionally, a new single-phase topology capable of fast
detection of phase signal is introduced. The behavior of
this topology is also analyzed under islanding condition.
Simulation and experimental results are presented.

THREE-PHASE PLL TOPOLOGY

The three-phase PLL structure introduced in [3] is
illustrated Fig. 2, where wv is the feedforward frequency.
This topology is based on the synchronism between the
utility voltage vector and the synchronous referqnce
frame. Setting the direct axis reference voltage (Vd) to
zero and tvning the controllers to extinguish the error
between Vd and vd result in the lock in of the PLL output
(0) on the phase of the utility voltage vector. Besides the
phase signal, the instantaneous frequency (0)and
amplitude (V,) of the utility voltage vector are also
determined.

v,

T
Fig. 1.

Basic topology of the conventional PLL.

A close look on these topologies also reveals their

deviation from the expected behavior under utility
distorted conditions such as voltage sags, harmonics,
frequency variations and so on [3]. All these inherent

0-7803-5772-8/00/$10.00 0 2000 IEEE

Fig. 2.

Transformation

Clark
Transformation

Three-phase PLL structure.

The tuning of the PI controller gains (K, and KP)

requires the determination of the small signal model of the

1660

three-phase PLL structure, as illustrated in Fig. 3. Some

criteria must then be established in order to impose an
adequate dynamic behavior to this topology:
Acceptable distance between the fastest pole and
the switching frequency of the inverter.
0 Adequate distance between the poles (I
0 times
between poles frequencies seems reasonable) to
guarantee robustness.

deteriorate the dynamic stiffness. A trade-off must then be

made between the already mentioned criteria in order to
achieve the desirable behavior for the three-phase PLL
structure discussed in this section.
d

0'

Fig. 3.

Small signal model of the three-phase topology.

10'
10,

10'

Fig. 5.

Additionally to, the above stated criteria, one must

assess the dynamic stiffness of the proposed topology in
order to evaluate the behavior of the structure under utility
distorted conditions. In this sense, (1) defines the dynamic
stiffness as the relationship between the disturbance
source (represented by the utility voltage V), and the PLL
output variable (0). It is worth to point out that the higher
the dynamic stiffness is, the less the influence of utility
voltage distortions in the PLL output variable.

Id

10'
F'.4"."0"

10%

("I,

Influence of gain Kp in the dynamic stiffness.

(K,= 40000)
Table 1. Poles Location.

30000
40000
50000

50

(103;1330)
(141 ;1291)
(182;1250)

AV, = s2 + sKPVq+ KiVq

1
x
1

sKpsinO

The influence of the PI controller gains in rejecting

the utility voltage perturbations (dynamic stiffness) can be
better visualized through the curves plotted in figs. 4
and 5. The gains were set for a three-phase, 220V, 60Hz
system (the switching frequency is 10kHz).

SINGLE-PHASE TOPOLOGY
The single-phase PLL structure is derived from the
three-phase topology, as illustrated in fig. 6.

Transformation

Fig. 6.

Single-phase PLL structure.

I
10'

102

(I'

0.

0'

FWaWlW

Fig. 4.

influence of gain K, in the dynamic stiffness.

(KP= 50)

It can be seen, from fig. 4 and Table 1, that despite

the improvement in the dynamic stiffness characteristic,
higher integral gains result in the approximation of the
poles, which deteriorate the robustness of the system. On
the other hand, fig.5 and Table 1 show that high
proportional gains causes larger bandwidth but

The lack of a utility voltage vector is overcome by

emulating a balanced three-phase system, in which the aaxis voltage of the stationary frame (V,) is made equal to
the single-phase utility voltage, as expressed in (2).
Additionally, the inverse transformation block provides the
quadrature voltage and demands a time lag block in the
feedback path.

1661

The procedure to determine the lead-lag block

parameters is the same used in the thee-phase topology
analysis:
Determine the corresponding small signal model.
Set poles location for suitable bandwidth and
robustness.
Determine the disturbance rejection characteristic.
The influence of the phase angle in the singlephase PLL response can be visualized through fig. 7,
where the phase was varied from zero to d 2 . In this
example the pole T (see fig. 6) was made equal to 0.001,
the zero of the lead-lag block was set to 1100, its gain
was set to 100 and its pole was set in the origin. The zero
of the lead-lag block and the pole of the first-order
feedback block must be close to guarantee stability and a
suitable damping ratio, despite the undesirable behavior
when phase is equal to zero (see fig. 7). Fig. 8 shows
some experimental results, illustrating the adequate
performance of the PLL under utility voltage sag.

The PLL topologies analyzed is this paper presents

some features that make then suitable to prevent the PV
system to operate in an islanding condition. Specifically,
the PLL synthesizes the frequency signal of the input
variable, which means that the PLL is able to lock in an
arbitrary frequency signal. Fig. 9 illustrates this behavior
where the phase of the utility was varied according to (3).
lR
= 120xnxT+0.5xsin(2xnxT)

Fig. 9.

1ol"l

,Id

10'

lo'

700

,on

' 1.

lo'

Frquanc" ("21

Fig. 7.

Frequency response of single-phase PLL

(closed-loop).
SingleT'hare PLL Under Distorted Input
200

005

CIO

011

020

025

030

Time [L]

Fig. 8.

Experimental results of the single-phase PLL.

ISLANDING
The islanding condition is defined as the continued
operation of the PV system when the utility is not present
[4]. In order to vanish this undesirable operating condition,
it is necessary to cause some instability in the operation
of the inverter of the PV system. Through a injected
controlled disturbance, the system is lead to operate in a
condition that violates the voltage and/or frequency trip
set point. It must be clear, however, that this perturbation
signal cannot result in unstable operation of the PV
system when the grid is present.

(3)

Frequency signal synthesized by the singlephase PLL.

The fast detection of phase and frequency of the

bus voltage vector can be satisfactorily used to causes
the turn-off of the PV system during the islanding
condition. If a small quantity of reactive power is injected
into the utility by the PV system, the following behavior
will be observed:
If the grid is present, the reactive power will be
absorbed by the utility, which means that the load
voltage will be tied to the utility voltage and the
frequency will be that of the grid. Fig. 10 illustrates
this situation for the single-phase PLL feeding a
parallel RLC load whose resonance was set to
60Hz and the quality factor was made equal to 5.
If the grid goes out of operation, the reactive power
causes a deviation in the frequency of the system.
This deviation is a result of the new resonance point
of the load, in the sense that the power factor angle
imposed by the control changes the capacitance or
reactance of the load. As the utility is no more
present and as the PLL follows the frequency of the
input signal (load voltage), the PV system is lead to
operate in a condition that violates the frequency
trip set point. As a consequence, the islanding
situation vanishes. Figs. 11 through 14 illustrate this
behavior for the same system already defined for
figs. 10 and 11. It must be said that the utility
voltage was shown for the visualization of the
frequency deviation.
The simulation results show that a small deviation
from the unit power factor (cos(p=0.95) does not
deteriorate the operation of the PV system under normal
operating conditions. On the other hand, under islanding
condition, this small amount of reactive power injected
into the system, results in new frequency operating points:

1662

58Hz for the lag power factor and 62Hz for the lead power
factor. This new operating point is achieved in few cycles,
as can be seen in figs. 11 to 14.

-2m

02

"
on

021

"
021

025

"
028

025
Tlmo 1.

"
028

021

voltage vector amplitude and frequency and the

satisfactory behavior under utility distorted conditions
constitute valuable features of the discussed topologies.
Finally, the simple and precise behavior under islanding
condition makes these topologies well suited to grid-tied
PV applications.

"

O I

Fig. 10. PV system behavior under normal operation

conditions (pf=0.95 lead): a)utility voltage; b)load voltage
(x0.7); c) load current (x10)

-200
08

"
OBZ

081

"
om
OBI

".

"
om

085

"
o s

ow

"
08

083

181

Fig. 13. PV system behavior under abnormal operation

conditions (pf=0.95 lead): a)utility voltage; b)load voltage
(x0.7); c) load current (x10)

-2001

08

'

081

"

DBZ

om

"

OM

0 s
T1mel.l

"

flea

087

'

o s

'

OB0

os

Fig. 11. PV system behavior under abnormal operation

conditions (pf=0.95 lag): a)utility voltage; b)load voltage
(x0.7); c) load current (x10)
Fig. 14. Frequency deviation index (islanding at
T=GOOms) for the conditions specified in fig. 13.

REFERENCES
[I] G. Hsieh an J.C. Hung, "Phase-Locked Loop
Techniques - A Survey", IEEE Transactions on lndustrial
Electronics, vol. 43, no. 6, 1996, pp. 609-615.
[2] G.
Nash,
"Phase-Locked
Loop
Fundamentals", Motorola, AN-535, 1994.

Design

-044
os

-0 5

[3] V. Kaura and V. Blasko, "Operation of a Phase

Locked Loop System Under Distorted Utility Conditions",
IEEE Transactions on Industy Applications, vol. 33, no. 1,
1997, pp. 58-63.

nmo 14

Fig. 12. Frequency deviation index (islanding at

T=6OOms) for the conditions specified in fig. 11.

CONCLUSIONS
The paper presented a methodology for the tuning
of the wide bandwidth PLL topologies. Additionally, a new
single-phase structure was introduced. The fast phase
detection, the availability of instantaneous detection of

[4] G.A. Kern, R.H. Bonn, J. Ginn and S. Gonzalez,

"Results of Sandia National Laboratories Grid-Tied
Inverter Testing", In: Pd World Conference and Exhibifion
on Photovoltaic Solar Energy Conversion, 1998, Vienna,
Austria.

1663