Microprocessor (MP) - : Lab Manual:-: Saraswati College of Engineering, Kharghar

Saraswati College Of Engineering
Computer Engg. Dept.
Saraswati College Of Engineering, Kharghar
Department of Computer Engineering

T. E. (V)
Microprocessor (MP)
-: Lab Manual:SCOEs
Saraswati College Of Engineering, Kharghar

Computer Engineering Department
T.E. V [MP]
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SARASWATI COLLEGE OF ENGINEERING,

COMPUTER ENGINEERING DEPARTMENT
Subject:-Microprocessor
Class/Sem : T/V
Name of the Laboratory : System Lab
Year : 2014-2015
LIST OF EXPERIMENTS
Sr no.
Experiment
WAP to perform 16-bit addition and subtraction
WAP to perform multiplication of two numbers and division of 16-bit

number by 8-bit number
WAP to sort number in ascending order
WAP to find factorial of number
WAP to perform addition, subtraction, multiplication & division using

assembly language in C/C++
Write ALP to interface 8253
Case study -RISC
10
Case study-CISC
H/W Requirement
S/W Requirement
Subject I/c
Sushmita Sahu
P-IV and above, Ram 128 MB, Printer, Internet Connection

MASM 611/ TASM, Turbo C
H.O.D.
Prof. Bharti Joshi
T.E. V [MP]
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EXPERIMENT NO. 1
Aim:-
WAP to perform 16-bit addition & subtraction.
Software Requirement : MASM 611

Theory:
Assemble language has two types of statements:

1. Executable : Instruction that are translated into machine code by the assembler
2. Assembler Directives:
Statements that dierect the assembler to do some special task.
No machine language code is produced for these statements.
Their main task is to inform the assembler about the start/ end of a segment,
procedure or program, procedure or program , to reserve appropriate space from
data storage etc.
Some of the assembler directives are listed below:
a. DB (define byte): used to define a byte variable . Ex SUM DB 0. Assembler reserves 1 byte of
memory for the variable Aimd SUM and initializes it to 0.
b. DW (Define word, 16 bit): used to define a word type variable.
c. DD (Define double word, 32 bit): used to define a double word type variable.
d. DQ (Quad Word): used to define a quad word type variable.
Instructions:
1.
MOV Destination Source

Move a byte/word from the source to the destination specified in the instruction.
Source: Register, Memory location, immediate number
Destination: Register, Memory location
Both source & destination can not be memory locations.
MOVE Register, Register
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MOV Memory location, Register

MOV Register, Memory location
MOV Register data.
2.
ADD Destinations,Source
Adds the source to the destination & stores the result back in the destination.
Source: Register, Memory Location, Immediate number
Destination: Register
Both source & destination have to be of the same size.
ADD Register, Register
ADD Memory location, Register
ADD Register, Memory location
ADD Register, data.
3.
ADC Destination, Source

Adds the source to the destination & stores the result the with carry back in the
destination.
Source: Register, Memory location, immediate number.
Both source & destination have to be of the same size
ADD Register, data.
4.
SUB/SBB Destination, source

It is similar to ADD/ADC expect that it does subtraction.
5.
DAA ( Decimal adjust for addition)

It makes the result in BCD from after BCD addition is performed.
It works only on AL register.
If D3-DO (Lower 4-bit) > 9 then AF is set, Add 06h to AL.
T.E. V [MP]
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If D7-D4 (Upper 4-bit) > 9 then CF is set, Add 60h to AL.

6.
DAS (Decimal adjust for subtraction)

It makes the result in packed BCD from after BCD subtraction is performed
It works only on AL register.
If D3-DO (Lower 4-bit) > 9 then AF is set, Add 06h to AL.
If D7-D4 (Upper 4-bit) > 9 then CF is set, Add 60h to AL.
Algorithm:
1.
An algorithm for addition of two 16-bit numbers.

Step 1 : Start
Step 2: Initialize data segment
Step 3 : Declare two variables that hold the actual data.
Step 4 : Initialize code segment
Step 5 : Initialize DS register to program
Step 6 : move first no. in register (bx)
Step 7 : move second no. in register (cx)
Step 8 : Perform the addition
Step 9 : Stop
2.
An algorithm for addition of two 16-bit numbers.

Step 1 : Start
Step 6 : move first no. in register (bx)
Step 8 : Perform the subtraction
Step 9 : Stop
T.E. V [MP]
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Input :
Assume AX = 5670 BX = 4567
Output :
1. Addition
AX=9BD7 BX=4567 CX=0016 DX=0000 SP=0000 BP=0000 SI=0000 DI=0000
DS=0B33 ES=0B22 SS=0B32 IP=000E NV UP EI PL NZ AC PE NC
0B32:00E A30600 MOV [0006],AX DS:0066=FFFF
2. Subtraction
AX=1109 BX= 4567 CX=0016 DX=0000 SP=0000 BP=0000 SI=0000 DI=0000
DS=0B33 ES=0B22 SS=0B32 IP=000E NV UP EI PL NZ AC PE NC
0B32:00E A30600 MOV [0006],AX DS:0066=FFFF
Conclusion: Thus we have written an assembly program to perform addition & Subtraction of two 16-bit
numbers.
T.E. V [MP]
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EXPERIMENT NO. 2
WAP to perform Multiplication of two numbers and division of 16-bit number
Aim:-
by 8-bit number
Apparatus:
MASM 611
Theory:
Instructions:
MUL source ( Unsigned 8/16-bit registers)
Source : Register, Memory Location
If the source is 8-bit it is multiplied with AL & result is stored in AX
(AH- higher byte, AX- lower byte)
If the source is 16-bit, it is multiplied with AX & result is stored in
DX AX register (DX-higher byte, AX-lower byte)
MUL affects AF, PF, SF, & ZF.
IMUL source (Signed 8/16-bit registers)
Sam as MUL expect that the source is a signed number.
LEA register, source
Loads effective address of the source into the given register
DIV source(Unsigned 8/16-bit register-divisior)
This instruction is used for unsigned division.
Divides a word by a byte or a double word by word.
If divisior is 8-bit then the dividend is in AX register.
After division the quotient is in AL & reminder is in DX
If divisior is 16-bit then the dividend is in DX-AX
T.E. V [MP]
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Register.
IDIV source(Signed 8/16-bit register-divisior)
Same as DIV except that the source is a signed number.
Algorithm:
An algorithm for multiply of two numbers.
Step 1 : Start
Step 6 : move first no. in register (ax)
Step 8 : multiply both the numbers by using word pointer & transfer the result in
particular variable.
Step 9 : Stop
An algorithm for division of 16-bit numbers by 8-bit number.
Step 1 : Start
Step 6 : move 16-bit no.in register (al)
Step 7 : move 8-bit no.in register (bl)
Step 8 : perform division operation & store
The result in particular variablae
Step 9 : Stop
Input :
Assume AX = 0022 BX = 0004
T.E. V [MP]
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Output :
AX=0088 BX=0004 CX=001A DX=0000 SP=00C8 BP=0000 SI=0000 DI=0000

DS=0B33 ES=0B22 SS=0B34 CS=0B32 IP=0011 NV UP EI PL NZ NA PO NC
OB32:0011 B8004C
MOV AX,4C00
Input :
Assume AX = 0022 BX = 0004
Output :
AX=0000 BX=0004 CX=001E DX=0002 SP=00C8 BP=0000 SI=0000 DI=0000

DS=0B33 ES=0B22 SS=0B35 CS=0B32 IP=0015 NV UP EI PL NZ NA PO NC
OB32:0011 B8004C
MOV AX,4C00
Conclusion: Thus we have written an assembly program to perform multiplication of two 16-bit numbers and
division of 16-bit Number by 8-bit numbers.
T.E. V [MP]
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EXPERIMENT NO. 3
Aim:-
WAP to sort the numbers in ascending order
Apparatus:
MASM 611
Theory:
MUL source ( Unsigned 8/16-bit registers)
Source : Register, Memory Location
If the source is 8-bit it is multiplied with AL & result is stored in AX
(AH- higher byte, AX- lower byte)
If the source is 16-bit, it is multiplied with AX & result is stored in
DX AX register (DX-higher byte, AX-lower byte)
MUL affects AF, PF, SF, & ZF.
MOV Register data.
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ADD Register, data.
Conclusion: Thus we have written an assembly program to sort the numbers in ascending order
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EXPERIMENT NO. 4
Aim:-
WAP to find factorial of given number
Apparatus:
MASM 611
Theory:
MOV Register data.
T.E. V [MP]
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ADD Register, data.
DIV source(Unsigned 8/16-bit register-divisior)

This instruction is used for unsigned division.
Divides a word by a byte or a double word by word.
If divisior is 8-bit then the dividend is in AX register.
After division the quotient is in AL & reminder is in DX
If divisior is 16-bit then the dividend is in DX-AX
Register.
Conclusion: Thus we have written an assembly program to find factorial of given number
T.E. V [MP]
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EXPERIMENT NO. 5
Aim:-
WAP to perform addition, subtraction, multiplication and division using assembly

language in C
Apparatus:
Turbo C
Theory:
Assembly is useful for time-critical or real-time processes, because unlike with high-level
languages, there is no ambiguity about how the code will be compiled.
Inline Assembly
One of the most common methods for using assembly code fragments in a C programming
project is to use a technique called inline assembly. Inline assembly is invoked in different
compilers in different ways. Also, the assembly language syntax used in the inline assembly
depends entirely on the assembly engine used by the C compiler. Microsoft C++, for instance,
only accepts inline assembly commands in MASM syntax, while GNU GCC only accepts inline
assembly in GAS syntax(also known as AT&T syntax) .
Microsoft C Compiler
GNU GCC Compiler
Borland C Compiler
Linked assembly
When an assembly source file is assembled by an assembler, and a C source file is compiled by a
C compiler, those two object files can be linked together by a linker to form the final
executable. The only disadvantages of mixing assembly and C in this way are that
a)both the assembler and the compiler need to be run, and
T.E. V [MP]
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b) those files need to be manually linked together by the programmer.

These extra steps are comparatively easy, although it does mean that the programmer needs to
learn the command-line syntax of the compiler, the assembler, and the linker.
Inline Assembly vs. linked assembly

Advantages of inline assembly:
Short assembly routines can be embedded directly in C function in a C code file. The mixedlanguage file then can be completely compiled with a single command to the C compiler (as
opposed to compiling the assembly code with an assembler, compiling the C code with the C
Compiler, and then linking them together). This method is fast and easy.
Advantages of linked assembly:
If a new microprocessor is selected, all the assembly commands are isolated in a ".asm" file. The
programmer can update just that one file -- there is no need to change any of the ".c" files (if they
are portably written).
Conclusion: Thus we have written a C program using assembly language to perform t addition,
subtraction, multiplication and division using assembly language in C
T.E. V [MP]
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EXPERIMENT NO. 6
Aim:-
Apparatus:
MASM611
Theory:
The 8253 is a programmable Interval timer/counter specifically designed for use with the
Intel Micro computer systems. Its function is that of a general purpose, multi-timing
element that can be treated as an array of I/O ports in the system software.The 8253
solves one of the most common problems any microcomputer system. The generation of
accurate time delay under software control. Instead of selling up timing loops in systems
software. The programmer configures the 8253 to match his requirements. Initializes one
of the counters of the 8253 with the desired quantity, then upon command the 8253 will
count-out the delay and interrupt the CPU when it has completed its tasks.
T.E. V [MP]
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__
__
__
CS
RD
WR
A1
A0
Load Counter No. 0
Load Counter No. 1
Load Counter No. 2
Write Mode Word
Read Counter No. 0
Read Counter No. 1
Read Counter No. 2
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No Operation 3-State
Disable 3 State
No Operation 3-State
Programming the 8253

All of the MODES for each counter are programmed by the systems software by simple I/O operations.
Each counter of the 8253 is individually programmed by writing a control word into the Control Word
Register. (A0,A1=1I)
Control World Format

D7
D6
D5
SC1
D4
SC0
D3
D2
RL1
D1
RL0
D0
M2
M1
M0
BCD
Definition of Control
SC Select Counter
SC1
SC0
Select Counter 0
Select Counter 1
Select Counter 2
Illegal
RL Read/Load
RL1
RL0
Counter Latching operation (see READ/WRITE Procedure section)
Read / Load most significant byte only
Read / Load least significant byte only
Read / Load least significant byte first, then most significant byte
M MODE
T.E. V [MP]
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Mode 1
Mode 2
Mode 3
Mode 4
Mode 5
Mode 0
BCD:
0
Binary Counter 16 bits
Binary Coded Decimal (BCD) Counter (4 decade)
Conclusion: Thus we have written an assembly program to interface 8253
EXPERIMENT NO.7
Aim:-
Apparatus:
MASM611
Theory: The Intel 8255A is a general purpose programmable I/O device which is designed for use with
all Intel and most other microprocessors. It provides 24 I/O pins which may be individually programmed
in 2 groups of 12 and used in 3 major modes of operation. The 8255 is a 40 pin integrated circuit (IC),
designed The 8255 is a 40 pin IC designed by Intel for the 8080 microprocessor. The three ports are
PORT A, PORT B & PORT C. Port A contains one 8-bit output latch/buffer and one 8-bit input buffer.
Port B is same as PORT A or PORT B. However, PORT C can be split into two parts PORT C lower
(PC0-PC3) and PORT C upper (PC7-PC4) by the control word. The three ports are divided in two groups
Group A (PORT A and upper PORT C) Group B (PORT B and lower PORT C). The two groups can be
programmed in three different modes. In the first mode (mode 0), each group may be programmed in
either input mode or output mode (PORT A, PORT B, PORT C lower, PORT C upper). In mode 1, the
seconds mode, each group may be programmed to have 8-lines of input or output (PORT A or PORT B)
T.E. V [MP]
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of the remaining 4-lines (PORT C lower or PORT C upper) 3-lines are used for hand shaking and
interrupt control signals.The third mode of operation (mode 2) is a bidirectional bus mode which uses 8line (PORT A only for a bidirectional bus and five lines (PORT C upper 4 lines and borrowing one from
other group) for handshaking.
Data Bus Buffer: It is a tri-state 8-bit buffer used to interface the chip to the system data bus. Data is
transmitted or received by the buffer upon execution of input or output instructions by the CPU. Control
words and status information are also transferred through the data bus buffer. The data lines are connected
to BDB of microprocessor.
Read/Write and logic control: The function of this block is to control the internal operation of the device
and to control the transfer of data and control or status words. It accepts inputs from the CPU address and
control buses and in turn issues command to both the control groups.
Chip Select: A low on this input selects the chip and enables the communication between the 8255 A &
the CPU. It is connected to the output of address decode circuitry to select the device when it (Read). A
low on this input enables the 8255 to send the data or status information to the CPU on the data bus.
(Write): A low on this input pin enables the CPU to write data or control words into the 8255 A.
A1, A0 port select: These input signals, in conjunction with the and inputs, control the selection of one of
the three ports or the control word registers. They are normally connected to the least significant bits of
the address bus (A0 and A1)
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Conclusion: Thus 8255 is successfully interfaced with 8086.
EXPERIMENT NO.8
Aim:-
Write ALP to interface 8259 with 8086
Apparatus:
MASM611
Theory: The 8259A is a device specifically designed for use in real time, interrupt driven
microcomputer systems. It manages eight levels or requests and has built-in features for
expandability to other 8259A's (up to 64 levels). It is programmed by the system's software as
an I/O peripheral. A selection of priority modes is available to the programmer so that the
manner in which the requests are processed by the 8259A can be configured to match his system
requirements. The priority modes can be changed or reconfigured dynamically at any time during
the main program. This means that the complete interrupt structure can be defined as required,
based on the total system environment.
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The 8259 A has eight interrupt request inputs, TR2 IR0. The 8259 A uses its INT output to interrupt the
8085A via INTR pin. The 8259A receives interrupt acknowledge pulses from the at its input.Vector address
used by the 8085 A to transfer control to the service subroutine of the interrupting device, is provided by the
8259 A on the data bus. The 8259A is a programmable device that must be initialized by command words sent
by the. After initialization the 8259 A mode of operation can be changed by operation command words
Data bus buffer: This 3- state, bidirectional 8-bit buffer is used to interface the 8259A to the system data bus.
Control words and status information are transferred through the data bus buffer.
Read/Write & control logic:The function of this block is to accept OUTPUT commands from the CPU. It
contains the initialization command word (ICW) register and operation command word (OCW) register which
store the various control formats for device operation. This function block also allows the status of 8159A to
be transferred to the data bus.
Interrupt request register (IRR): IRR stores all the interrupt inputs that are requesting service. Basically, it
keeps track of which interrupt inputs are asking for service. If an interrupt input is unmasked, and has an
interrupt signal on it, then the corresponding bit in the IRR will be set.
Interrupt mask register (IMR): The IMR is used to disable (Mask) or enable (Unmask) individual interrupt
inputs. Each bit in this register corresponds to the interrupt input with the same number. The IMR operation
on the IRR. Masking of higher priority input will not affect the interrupt request lines of lower priority. To
unmask any interrupt the corresponding bit is set 0.
In service register (ISR): The in service registers keeps tracks of which interrupt inputs are currently being
serviced. For each input that is currently being serviced the corresponding bit will be set in the in service
register. Each of these 3-reg can be read as status reg.
Priority Resolver: This logic block determines the priorities of the set in the IRR. The highest priority is
selected and strobed into the corresponding bit of the ISR during pulse.
Cascade buffer/comparator: This function blocks stores and compare the IDS of all 8259As in the reg. The
associated 3-I/O pins (CAS0-CAS2) are outputs when 8259A is used a master. Master and are inputs when
8259A is used as a slave. As a master, the 8259A sends the ID of the interrupting slave device onto the cas2cas0
T.E. V [MP]
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Conclusion: Thus 8259 is successfully interfaced with 8086.
T.E. V [MP]
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Saraswati College Of Engineering

Computer Engg. Dept.

Saraswati College Of Engineering, Kharghar

Department of Computer Engineering

Saraswati College Of Engineering, Kharghar

Saraswati College Of Engineering

SARASWATI COLLEGE OF ENGINEERING,

Name of the Laboratory : System Lab

WAP to perform 16-bit addition and subtraction

WAP to perform multiplication of two numbers and division of 16-bit

WAP to sort number in ascending order

WAP to find factorial of number

WAP to perform addition, subtraction, multiplication & division using

Write ALP to interface 8253

Write ALP to interface 8255

Write ALP to interface 8259

Case study -RISC

P-IV and above, Ram 128 MB, Printer, Internet Connection

Saraswati College Of Engineering

WAP to perform 16-bit addition & subtraction.

Software Requirement : MASM 611

Assemble language has two types of statements:

Statements that dierect the assembler to do some special task.

No machine language code is produced for these statements.

Some of the assembler directives are listed below:

MOV Destination Source

Saraswati College Of Engineering

MOV Memory location, Register

ADC Destination, Source

SUB/SBB Destination, source

DAA ( Decimal adjust for addition)

Saraswati College Of Engineering

If D7-D4 (Upper 4-bit) > 9 then CF is set, Add 60h to AL.

DAS (Decimal adjust for subtraction)

An algorithm for addition of two 16-bit numbers.

An algorithm for addition of two 16-bit numbers.

Saraswati College Of Engineering

Saraswati College Of Engineering

Saraswati College Of Engineering

Saraswati College Of Engineering

AX=0088 BX=0004 CX=001A DX=0000 SP=00C8 BP=0000 SI=0000 DI=0000

AX=0000 BX=0004 CX=001E DX=0002 SP=00C8 BP=0000 SI=0000 DI=0000

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WAP to sort the numbers in ascending order

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Saraswati College Of Engineering

WAP to find factorial of given number

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ADD Memory location, Register

DIV source(Unsigned 8/16-bit register-divisior)

Saraswati College Of Engineering

WAP to perform addition, subtraction, multiplication and division using assembly

Saraswati College Of Engineering

b) those files need to be manually linked together by the programmer.

Inline Assembly vs. linked assembly

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Write ALP to interface 8253

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Load Counter No. 0

Load Counter No. 1

Load Counter No. 2

Write Mode Word