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Reconfigurable Sequence Detection
Reconfigurable Sequence Detection
Reconfigurable Sequence Detection
II.
i.
Introduction
Description
Enable(En)
Input sequence(Xi)
Sequence selection line
Bit selection lines
Load
Reset
Clock
OV(Over lapping)
Output Signal
Output (Z)
Description
Sequence detected output
ii.
Modified RSD
The RSD can detect only one pattern at a time and gives
the output (Z).In some application it is desired to detect
two sequences at input stream Xi. The Modified
Reconfigurable Sequence Detector allows us to detect
two sequences coming at its input Xi and gives the
corresponding outputs Z1 and Z2.Here Z1 and Z2
represent two outputs for two sequences.
i.
iii.
Simulation Results
Sequence
Input Signal
Description
Enable(En)
Input sequence(Xi)
Sequence selection
line (Sq1)
Sequence selection
line (Sq2)
Bit selection lines
Load
Reset
Clock
Output Signal
Output (Z)
Description
Sequence detected output
ii.
Simulation Results
CONCLUSION
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