Professional Documents
Culture Documents
RF Oscillator
RF Oscillator
RF Oscillator
The information in this work has been obtained from sources believed to be reliable.
The author does not guarantee the accuracy or completeness of any information
presented herein, and shall not be responsible for any errors, omissions or damages
as a result of the use of this information.
September 2010
References
September 2010
Agenda
September 2010
September 2010
Introduction
Si(s)
E(s)
A(s)
So(s)
So
(s ) = 1 AA(s(s)F) (s ) (1.1a)
Si
High impedance
Positive
Feedback
Feedback network
High impedance
F(s)
T (s ) = A(s )F (s ) (1.1b)
Loop gain (the gain of the system
around the feedback loop)
The condition for sustained oscillation, and for oscillation to startup from
positive feedback perspective can be summarized as:
For sustained oscillation
1 A(s )F (s ) = 0
A(s )F (s ) > 1
Barkhausen Criterion
arg( A(s )F (s )) = 0
(1.2a)
(1.2b)
Take note that the oscillator is a non-linear circuit, initially upon power
up, the condition of (1.2b) will prevail. As the magnitudes of voltages
and currents in the circuit increase, the amplifier in the oscillator begins
to saturate, reducing the gain, until the loop gain A(s)F(s) becomes one.
A steady-state condition is reached when A(s)F(s) = 1.
Si(s)
E(s)
-A(s)
So(s)
So
(s ) = 1 AA(s(s)F) (s )
Si
Inversion
F(s)
E(s)
So(s)
-A(s)
X 3 = ( X 1 + X 2 ) (1.3)
X3
X1
X2
September 2010
+
-
Colpitt
oscillator
+
Armstrong
oscillator
September 2010
Hartley
oscillator
Clapp
oscillator
2006 by Fabian Kung Wai Lee
10
2.0
1.5
1.0
R
RB1
R=10 kOhm
R
RC
R=330 Ohm
C
CD1
C=0.1 uF
VB, V
VL, V
V_DC
SRC1
Vdc=3.3 V
VL
C
Cc2
C=0.01 uF
VB
R
RE
R=220 Ohm
-1.0
-1.5
R
RL
R=220 Ohm
pb_mot_2N3904_19921211
Q1
R
RB2
R=10 kOhm
0.0
-0.5
VC
C
Cc1
C=0.01 uF
0.5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
time, usec
C
CE
C=0.01 uF
Si(s)
E(s)
So(s)
-A(s)
L
C
L1
C1
L=2.2 uH
C=22.0 pF R=
C
C2
C=22.0 pF
F(s)
September 2010
11
R
RB1
R=10 kOhm
R
RC
R=470 Ohm
VC
VB
C
Cc1
C=0.1 uF
Si(s)
R
RB2
R=4.7 kOhm
400
C
CD1
C=0.1 uF
200
VL
C
C1
C=100.0 pF
C
Cc2
C=0.1 uF
R
RE
R=100 Ohm
L
L1
L=1.0 uH
R=
C
C2
C=100.0 pF
A(s)
0
-200
-400
pb_m ot_2N3904_19921211
Q1
VE
E(s)
VE, mV
VL, mV
V_DC
SRC1
Vdc=3.3 V
C
C3
C=4.7 pF
R
R1
R=1000 Ohm
-600
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
time, usec
So(s)
September 2010
F(s)
12
R
RC
R=330 Ohm
C
CD1
C=0.1 uF
VC
VB
VL
C
Cc2
C=0.1 uF
R
RL
R=220 Ohm
pb_mot_2N3904_19921211
Q1
C
Cc1
C=0.1 uF
R
RB2
R=10 kOhm
C
C1
C=22.0 pF
September 2010
R
RE
R=220 Ohm
C
CE
C=0.1 uF
sx_stk_CX-1HG-SM_A_19930601
XTL1
Fres=16 MHz
C
C2
C=22.0 pF
13
14
September 2010
15
Port 1
Port 2
Destabilized
Amplifier
Zs
|1 s | > 1
@ foscillator
September 2010
Or
ZL
|2 L | > 1
@ foscillator
16
Port 1
Port 2
2-port
Network
a1
Z1 or 1
a1 = bs + bs 1s + bs 12s 2 + ...
bs
a1 =
1 1s
b1 = bs 1 + bs 12s + bs 13s 2 + ...
b1 =
bs
bs1
bss 1
b
1=
bs
bss 12
bss 314
September 2010
1
1 1s
Compare with
equation (1.1a)
bss 212
bss 213
bss 313
bs 1
1 1s
So
A(s )
(
s) =
Si
1 A(s )F (s )
Feedback is
provided by the
reflection due to
17
source mismatch
September 2010
18
(Rs Z o ) + jX s
(Rs + Z o ) + jX s
1 =
Zs
Z1
(R1 Z o ) + jX1
(R1 + Z o ) + jX1
Rs
R1
Z2
jXs
ZL
Vamp
jX1
Port 2
Source Network
Port 1
R1 + jX 1
Z1
Vs =
V=
Vs
R1 + Rs + j ( X 1 + X s )
Z s + Z1
September 2010
(1.3)
19
(R Z o ) + jX
(R + Z o ) + jX
1s =
1s =
o
(R R Z (R + R ) + Z
(R R + Z (R + R ) + Z
1 s
1 s
September 2010
2
o
2
o
X1 X s
X1 X s
) + (R X
) + (R X
2
+ Rs X 1 Z o ( X 1 + X s ))2
(1.4)
+ Rs X 1 + Z o ( X 1 + X s ))
20
10
X s + X 1 | o = 0
Rs + R1 | o < 0
X s + X 1 | o = 0
(1.5b)
(1.6a)
(1.6b)
Then | s1 | > 1 at o.
Since Rs is > 0, (1.6a) implies that R1 must be negative.
Thus in designing an oscillator, we try to make an amplifier unstable so
that R1 or R2 will be negative. Then we try to have the condition
R1+Rs|o<0, X1+Xs|o= 0 at port 1 or R2+RL|o<0, X2+XL|o= 0 at port 2.
September 2010
21
Z1 (s )
V (s ) =
Vs (s )
Z s (s ) + Z1 (s )
When:
Rs + R1 | o < 0
X s + X 1 | o = 0
September 2010
Im
22
11
Usually the transient signal or noise signal from the environment will
contain a small component at the oscillation frequency. This forms the
seed in which the oscillation built up.
As the voltage amplitude in the two-port network increases, the
assumption of small signal operation become invalid.
For instance in BJT, nonlinear effects such as transistor saturation and
cut-off will happen, this limits the beta of the transistor and finally limits
the amplitude of the oscillating signal.
Therefore, the design of oscillator in a nutshell is: Use linear analysis to
design an unstable system which would let any small transient signal to
built up gradually. As the transient signal increases, let the nonlinearity
of the circuit limits the final oscillation amplitude.
September 2010
23
Parallel Representation
Take note that in this discussion we represent the source and input
of the oscillator using series network.
We can also use the parallel or shunt representation as shown
below.
Port 1
Gs
jBs
Gs + G1 |o = 0
Bs + B1 |o = 0
Steady-state
September 2010
Z2
G1
(1.7a)
(1.7b)
jB1
ZL
Vamp
Gs + G1 |o < 0
Bs + B1 |o = 0
(1.8a)
(1.8b)
Start-up
2006 by Fabian Kung Wai Lee
24
12
September 2010
25
Frequency Stability
September 2010
26
13
The discussion is beyond the scope of this chapter for now, and the
reader should refer to [1] and [6] for the concepts.
September 2010
27
September 2010
28
14
September 2010
29
September 2010
30
15
September 2010
31
At 410MHz
S-PARAMETERS
DC
DC
DC1
S_Param
SP1
Start=410.0 MHz
Stop=410.0 MHz
Step=2.0 MHz
SStabCircle
S_StabCircle
S_StabCircle1
SSC=s_stab_circle(S,51)
StabFact
V_DC
SRC1
Vdc=4.5 V
R
Rb1
R=10 kOhm
L
LC
L=330.0 nH
R=
StabFact
StabFact1
K=stab_fact(S)
Common Base
Configuration
LStabCircle
L_StabCircle
L_StabCircle1
LSC=l_stab_circle(S,51)
Vout
Term
Term2
Num=2
Z=50 Ohm
C
Cc2
C=10.0 nF
L
LB
L=22 nH
R=
R
RLB
R=0.77 Ohm
C
Cb
C=10.0 nF
C
CLB
C=0.17 pF
Positive feedback
here
September 2010
pb_phl_BFR92A_19921214
Q1
R
Rb2
L
R=4.7 kOhm
LE
L=330.0 nH
R=
Vin
C
Cc1
C=10.0 nF
Term
Term1
Num=1
Z=50 Ohm
An inductor is added
in series with the bypass
capacitor on the base
terminal of the BJT.
This is a form of positive
series feedback.
R
Re
R=100 Ohm
32
16
freq
410.0MHz
freq
410.0MHz
K
-0.987
S(1,1)
1.118 / 165.6...
L Plane
S(2,1)
2.068 / -12.723
S(2,2)
1.154 / -3.535
Unstable Regions
September 2010
s Plane
33
DC
DC
DC1
V_DC
SRC1
Vdc=4.5 V
S_Param
SP1
Start=410.0 MHz
Stop=410.0 MHz
Step=2.0 MHz
SStabCircle
S_StabCircle
S_StabCircle1
SSC=s_stab_circle(S,51)
StabFact
R
Rb1
R=10 kOhm
StabFact
StabFact1
K=stab_fact(S)
L
LC
L=330.0 nH
R=
LStabCircle
L_StabCircle
L_StabCircle1
LSC=l_stab_circle(S,51)
Vout
C
Cc1
C=1.0 nF
Term
Term1
Num=1
Z=50 Ohm
C
Cc2
C=1.0 nF
pb_phl_BFR92A_19921214
Q1
R
Rb2
R=4.7 kOhm
C
Ce1
C=15.0 pF
C
Ce2
C=10.0 pF
September 2010
Term
Term2
Num=2
Z=50 Ohm
Feedback
Common Emitter
Configuration
R
Re
R=100 Ohm
34
17
K
-0.516
S(1,1)
3.067 / -47.641
S(1,2)
0.251 / 62.636
S(2,1)
6.149 / 176.803
S(2,2)
1.157 / -21.427
L Plane
s Plane
Unstable
Regions
September 2010
35
Precautions
V2
V2
Rs too small
For more discussion about the Rs = (1/3)|R1| rule,
and on the sufficient condition for oscillation, see
[6], which list further requirement.
September 2010
Rs too large
36
18
S D
1 = 11 L
1 S 22L
Assuming = |1 |:
By fixing |1 | and changing L .
Tcenter =
2 S 22* + D*S11
September 2010
D S 22
(2.1a)
Radius =
S12 S 21
2
D 2 S 22
(2.1b)
37
September 2010
38
19
Example 2.1
September 2010
39
DC
S t ab F ac t
DC
D C1
V_DC
SR C1
Vdc =4.5 V
R
Rb1
R=10 kO hm
L
LC
L=330.0 nH
R=
S_Param
SP1
Start=410. 0 MH z
Stop=410.0 MHz
Step=2. 0 MH z
Port 2 - Output
C
Cb
C =1.0 nF
R
Rb2
R=4.7 kOhm
Term
Term 2
Num=2
Z=50 Ohm
C
Cc1
C =1. 0 nF
S S tabC irc le
S_StabCircle
S_StabCircle1
source_s tabc ir=s_st ab_c irc le(S ,51)
pb_phl_BF R 92A_19921214
Q1
L
LE
L=220.0 nH
R=
L_St abCircle
L_St abCircle1
load_s tabcir=l_s tab_c irc le(S, 51)
C
Cc2
C =1. 0 nF
L
LB
L=12. 0 nH
R=
StabFact
StabFact 1
K=st ab_f act (S )
Term
Term 1
Num=1
Z=50 O hm
Port 1
Amplifier
Port 2
R
Re
R =100 Ohm
Port 1 - Input
2006 by Fabian Kung Wai Lee
40
20
K
-0.987
S(1,1)
1.118 / 165.6...
S(1,2)
0.162 / 166.9...
S(2,1)
2.068 / -12.723
S(2,2)
1.154 / -3.535
Unstable Regions
41
|1 |=1.5
|1 |=2.0
L = 0.5<0
|1 |=2.5
Note: More difficult
to implement load
impedance near
edges of Smith
Chart
ZL = 150+j0
L Plane
September 2010
42
21
S DL
1 = 11
= 1.422 + j 0.479
1 S 22 L
Z1 = Z o
1 + 1
= 10.257 + j 7.851
1 1
R1
X1
1
R1 3.42
3
X s = X1 7.851
Rs =
September 2010
43
Port 2
Zs = 3.42-j7.851
Common-Base (CB)
Amplifier
with feedback
September 2010
ZL = 150
44
22
ZL=150
49.44pF
3.42
27.27nH
CB Amplifier
@ 410MHz
3.49pF
50
1
C
1
C=
= 49.44 pF
7.851
7.851 =
September 2010
45
Vpp
BFR92A
Vpp = 0.9V
V = 0.45V
Power dissipated in the load:
2
September 2010
PL =
1V
2 RL
= 0.5
0.452
= 2.025mW
50
46
23
484 MHz
September 2010
47
1.4
1.2
Vbb
1.0
0.8
0.6
0.4
0.2
0.0
Vout
-0.2
Output port
-0.4
-0.6
-0.8
0
10
20
30
40
50
60
70
80
90
100
110
120
Startup transient ns
September 2010
48
24
DC
VtP WL
Vtrig
V_Tran=pwl(t ime, 0ns, 0V, 1ns,0. 01V, 2ns ,0V)
R
Rb
R=47 kOhm
V_DC
Vc c
Vdc=3.0 V
L
Lc
L=220.0 nH
R=
ParamSweep
Sweep1
SweepVar="R load"
SimI nstanceNam e[1] ="Tran1"
SimI nstanceNam e[2] =
SimI nstanceNam e[3] =
SimI nstanceNam e[4] =
SimI nstanceNam e[5] =
SimI nstanceNam e[6] =
St art=100
St op=700
Var
VAR
Eqn
St ep=100
VAR 1
X=1. 0
R load=100
R
C
Rout
C c2
C =330. 0 pF R=50 O hm
L
L2
L=47. 0 nH
R=
C
C b1
C =2. 2 pF
R
RL
R=Rload
pb_phl_BFR92A_19921214
Q1
C
Cb3
C=4. 7 pF
C
C b2
C =10. 0 pF
R
V _D C
R1
R=4700 Ohm
S R C1
V dc=-1.5 V
P ARAM ET ER SWE EP
Tran
Tran1
StopTim e=100. 0 nsec
MaxTimeS tep=1.2 nsec
DC
D C1
R
Re
R=220 O hm
di_sms_bas40_19930908
D1
C
C b4
C =4.7 pF
September 2010
49
0.5
Vout
0.0
Auxiliary
trigger
signal
-0.5
-1.0
-1.5
0
10
20
30
40
50
60
70
80
90
10 0
ns
Power splitter
Output port
September 2010
50
25
End Notes
September 2010
51
September 2010
52
26
Z1 ( ) = R1 ( ) + jX 1 ( )
September 2010
Upper
53
Clapp-Gouriet
Oscillator Circuit
with Load
Zs
ZL
Z1 = R1 + jX1
September 2010
54
27
Z s ( ) = Rs ( ) + jX s ( )
Rs ( ) < R1 ( ) R1 ( ) < 0
X s ( ) = X 1 ( )
55
Usually we will design the transistor biasing so that X1 is +ve within the
intended range of frequencies. This will be carried out in the example
shown here.
The design of the transistor biasing is achieved by using computer
aided design, where first we design the d.c. biasing, then run smallsignal simulation to obtain the S-parameters or Z-parameters of the
input port. Of course Load Stability Circle is also used to ensure that
real part of Z1 is -ve.
September 2010
56
28
VtP WL
Vtrig
V_Tran=pwl(t ime, 0ns , 0V, 1ns,0. 01V, 2ns ,0V)
R
Rb
R=47 k Ohm
V_DC
Vcc
Vdc =3.0 V
Variable
capacitance
tuning network
R
V _D C
R1
R=4700 Ohm
S RC1
V dc=-1.5 V
Tran
Tran1
StopTim e=100. 0 ns ec
MaxTimeS tep=1.2 nsec
L
Lc
L=220.0 nH
R=
P ARAM ET ER SWEEP
ParamSweep
Sweep1
SweepVar="R load"
SimI ns tanc eNam e[1] ="Tran1"
SimI ns tanc eNam e[2] =
SimI ns tanc eNam e[3] =
SimI ns tanc eNam e[4] =
SimI ns tanc eNam e[5] =
SimI ns tanc eNam e[6] =
St art=100
St op=700
V ar
VAR
E qn
St ep=100
VAR 1
X=1. 0
R load=100
R
C
Rout
C c2
C =330. 0 pF R=50 O hm
L
L2
L=47. 0 nH
R=
C
Cb1
C=2. 2 pF
C
Cb3
C=4. 7 pF
C
Cb2
C=10. 0 pF
September 2010
T R ANS IE NT
DC
DC
D C1
pb_phl_BF R92A_19921214
Q1
R
RL
R=Rload
R
Re
R=220 O hm
2-port network
C b4
C =4.7 pF
57
September 2010
58
29
1.0
0.5
0.0
-0.5
-1.0
-1.5
0
10
20
30
40
50
60
70
80
90
100
September 2010
59
Load-Pull Experiment
Vout(pp)
1
100
200
300
400
500
600
700
800
RLoad
September 2010
60
30
Vout
September 2010
61
September 2010
62
31
Capacitor to control
positive feedback
DC
DC
DC1
VtPWL
L
Vtrig
Lc
V_Tran=pwl(time, 0ns, 0V, 1ns,0.01V, 2ns,0V)
L=220.0 nH
R
R=
Rb
R=47 kOhm
I_Probe
V_DC
I_Probe
Iload
Vcc
IC
Vdc=3.0 V
C
Ccb
C=1.0 pF
L
L2
L=47.0 nH
C
R=
Cb1
pb_phl_BFR92A_19921214
C=6.8 pF
Q1
C
Cb3
C=4.7 pF
C
Cb2
C=10.0 pF
R
R1
V_DC
R=4700 Ohm
SRC1
Vdc=0.5 V
September 2010
TRANSIENT
Tran
Tran1
StopTime=280.0 nsec
MaxTimeStep=1.2 nsec
C
Cc2
C=330.0 pF
R
Rout
R=50 Ohm
R
RL
R=50 Ohm
R
Re
R=220 Ohm
di_sms_bas40_19930908
D1
C
Cb4
C=0.7 pF
63
Vout
September 2010
64
32
September 2010
65
D1 is BB149A,
a varactor
manufactured by
Phillips
Semiconductor (Now
NXP).
405
f
MHz
400
395
0.5
1.5
2.5
Vdc
September 2010
Volts
66
33
Phase Noise
T = 1/fo
v(t)
t
f
fo
- 90dBc/Hz
100kHz
fo
Phase noise is
mathematically
modeled as random phase
and amplitude modulation.
It is measured in dBc/Hz @
foffset.
dBc/Hz stands for dB down
from the carrier (the c) in 1 Hz
bandwidth.
For example
-90dBc/Hz @ 100kHz offset
from a CW sine wave at
2.4GHz.
67
X1
Tuning
Network with
High Q
Variation in Xtune
due to environment
causes small change
in instantaneous
frequency.
Xtune
X1
f
f
-X1
September 2010
2|X1|
Tuning
Network with
Low Q
f
-X1
Ztune = Rtune +jXtune
2006 by Fabian Kung Wai Lee
2|X1|
68
34
69
September 2010
70
35
More on Varactor
Reverse biased
Linear region
0
September 2010
Vj
2006 by Fabian Kung Wai Lee
71
To suppress
RF signals
To ve
resistance
amplifier
Vcontrol
Vcontrol
Vcontrol
Symbol
for Varactor
72
36
To design a low power VCO that works from 810 MHz to 910 MHz.
Power supply = 3.0V.
Output power (into 50 load) minimum -3.0 dBm.
September 2010
73
V_DC
SRC1
Vdc=3.3 V
R
RB
R=33 kOhm
S-PARAMETERS
S_Param
SP1
Start=0.7 GHz
Stop=1.0 GHz
Step=1.0 MHz
b82496c3120j000
LC
param=SIMID 0603-C (12 nH +-5%)
100pF_NPO_0603
Cc2
pb_phl_BFR92A_19921214
Q1
4_7pF_NPO_0603
Term
Cc1
Term1
Num=1
Z=50 Ohm
Z11
September 2010
2_2pF_NPO_0603
C1
R
RL
R=100 Ohm
3_3pF_NPO_0603
C2
R
RE
R=100 Ohm
74
37
m2
freq=809.0MHz
m2=-84.412
-40
-50
imag(Z(1,1))
real(Z(1,1))
-60
-70
m2
-80
m1
-90
-100
-110
-120
0.70
0.72
0.74
0.76
0.78
0.80
0.82
0.84
0.86
0.88
0.90
0.92
0.94
0.96
0.98
1.00
freq, GHz
September 2010
75
PARAMETER SWEEP
ParamSweep
Sweep1
SweepVar="Vcontrol"
SimInstanceName[1]="SP1"
SimInstanceName[2]=
SimInstanceName[3]=
SimInstanceName[4]=
SimInstanceName[5]=
SimInstanceName[6]=
Start=0.0
Stop=3
Step=0.5
S_Param
SP1
Start=0.7 GHz
Stop=1.0 GHz
Step=1.0 MHz
September 2010
L
L2
L=33.0 nH
R=
100pF_NPO_0603
C2
VAR
VAR1
Vcontrol=0.2
L
L1
L=10.0 nH
R=
Vvar
V_DC
SRC1
Vdc=Vcontrol V
Var
Eqn
BB833_SOD323
D1
C
C3
C=0.68 pF
Term
Term1
Num=1
Z=50 Ohm
76
38
120
m1
freq=882.0MHz
m1=64.725
Vcontrol=0.000000
-imag(VCO_ac..Z(1,1))
imag(Z(1,1))
100
80
m1
60
40
Resonator
reactance
as a function of
control voltage
20
0
0.70
0.75
0.80
0.85
0.90
0.95
1.00
freq, GHz
September 2010
77
DC
Low-pass filter
VtPWL
Src_trigger
V_T ran=pwl(time, 0ns,0V, 1ns,0.1V, 2ns,0V)
DC
DC1
V_DC
SRC1
Vdc=3.3 V
R
RB
R=33 kOhm
b82496c3120j000
L3
param=SIMID 0603-C (12 nH +-5%)
100pF_NPO_0603
Cc2
b82496c3150j000
L4
param=SIMID 0603-C (15 nH +-5%)
b82496c3100j000
L1
param=SIMID 0603-C (10 nH +-5%)
4_7pF_NPO_0603 C
Cc1
C6
C=2.2 pF
b82496c3330j000
L2
param=SIMID 0603-C (33 nH +-5%)
Vvar
R
R1
R=100 Ohm
V_DC
SRC2
Vdc=1.2 V
BB833_SOD323
D1
pb_phl_BFR92A_19921214
Q1
2_7pF_NPO_0603
C8
C
C5
C=0.68 pF
C
C7
C=3.3 pF
0_47pF_NPO_0603
C9
R
RL
R=100 Ohm
R
RE
R=100 Ohm
100pF_NPO_0603
C4
September 2010
78
39
The prototype and the result captured from a spectrum analyzer (9 kHz
to 3 GHz).
Fundamental
-1.5 dBm
September 2010
Harmonic
VCO
suppression filter
- 30 dBm
79
Examining the phase noise of the oscillator (of course the accuracy is
limited by the stability of the spectrum analyzer used).
-0.42 dBm
300Hz
September 2010
80
40
V_DC
SRC1
Vdc=3.3 V
Variable
power
supply
R
RB
R=33 kOhm
b82496c3150j000
L4
param=SIMID 0603-C (15 nH +-5%)
100pF_NPO_0603
Cc2
b82496c3100j000
L1
param=SIMID 0603-C (10 nH +-5%)
R
Rattn
R=50 Ohm
4_7pF_NPO_0603
Cc1
C
C5
C=0.68 pF
Vvar
Port
Vcontrol
Num=1
b82496c3120j000
L3
param=SIMID 0603-C (12 nH +-5%)
R
Rcontrol
R=1000 Ohm
C
C6
C=2.2 pF
C
C7
C=3.3 pF
BB833_SOD323
D1
September 2010
pb_phl_BFR92A_19921214
Q1
2_7pF_NPO_0603
C8
Port
Vout
Num=2
Spectrum
Analyzer
0_47pF_NPO_0603
C9
R
RE
R=100 Ohm
81
Measured results:
fVCO / MHz
950
900
850
800
750
0.0
September 2010
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Vcontrol/Volts
82
41