Electric Power Systems Research 127 (2015) 112

Contents lists available at ScienceDirect

Electric Power Systems Research

journal homepage: www.elsevier.com/locate/epsr

New Single-Stage Single-Phase Three-Input DC-AC Boost Converter

for Stand-Alone Hybrid PV/FC/UC Systems
S. Danyali a , S.A.KH. Mozaffari Niapour b, , S.H. Hosseini c , G.B. Gharehpetian d , M. Sabahi c
a

Faculty of Engineering, Ilam University, Ilam, Iran

Department of Electrical and Computer Engineering, University of Illinois at Chicago, Chicago, IL. 60607, USA
Faculty of Electrical and Computer Engineering, University of Tabriz, 51664, Tabriz, Iran
d
Electrical Engineering Department, Amirkabir University of Technology, Tehran, Iran
b
c

a r t i c l e

i n f o

Article history:
Received 26 November 2014
Received in revised form 10 May 2015
Accepted 14 May 2015
Available online 3 June 2015
Keywords:
Multi-input converter
Single-stage converter
Small signal modeling
State feedback
Power management, Hybrid PV/FC/UC
systems

a b s t r a c t
This paper presents a new single-stage single-phase three-input DC-AC boost converter for stand-alone
hybrid PV/FC/UC systems. The proposed converter enjoys a non-isolated single power conversion stage,
which interfaces two unidirectional input ports for PV and FC sources and two bidirectional ports for
UC and resistive load. It only needs six power switches and can directly step-up the low level input dc
voltages into a high level output sinusoidal voltage without needing any output ltration stage. In fact,
the proposed strategy presents a structure consisting of four dc boost converters, which are actively
controlled in order to produce two output dc-biased sinusoidal voltages across the load. In this way,
MPPT of the PV source, regulating the FC power and autonomous charging/discharging of the UC are
accessible, while a pure sinusoidal voltage is generated at the output port. Moreover, regarding the
maximum available PV power and the demanded load power a useful power management control scheme
is proposed to exploit the FC and UC in their optimal operating points. Due to the multi-input multi-output
(MIMO) inherent aspect of the proposed converter, pole-placement control strategy is applied to the
proposed converter. The validity and effectiveness of the proposed converter and its control performance
are veried by simulation and experimental results under different operating conditions.
2015 Elsevier B.V. All rights reserved.

1. Introduction
Among various types of renewable energy sources, photovoltaic
(PV) energy appears quite attractive for electricity generation
due to its noiseless, pollution free, scale exibility, rather simple
operation, and low maintenance cost. PV power depends on sun
irradiation level, ambient temperature, and unpredictable shadows, making it an unreliable intermittent power source. Therefore,
a PV-based energy source should be supported by other alternative energy sources to ensure a reliable power supply. Fuel cells
(FCs) are emerging as promising supplementary power sources
considering their merits of cleanness, high efciency, and high
reliability. On the other hand, FCs have long start-up period and
slow dynamic response [1] so that they cannot quickly follow load
power variations and therefore the power deciency or surplus
must be managed by an energy storage system (ESS). Batteries or

Corresponding author. Tel./fax: +1 877 202 8585.

E-mail address: s.a.kh.mozaffari.niapour@gmail.com
(S.A.KH. Mozaffari Niapour).
http://dx.doi.org/10.1016/j.epsr.2015.05.008
0378-7796/ 2015 Elsevier B.V. All rights reserved.

ultra-capacitors (UC) are usually taken as ESS, for smoothing

the output power, improving the system start-up transitions and
dynamic characteristics, and enhancing the peak power capacity.
Combining these types of energy sources forms a hybrid PV-FCBattery/UC power system. For these systems, the bidirectional
power ow capability is a key feature at ESS port. In [2], energy
ow and management for a similar hybrid wind/PV/FC system have
been processed.
Many hybrid systems with various power converters have been
proposed in literatures. Conventional methods that integrate different power resources can be classied into AC-coupled [3], [4]
and DC-coupled systems [511]. However, the main shortcomings
of these methods are their complex topology, high count of devices,
high power losses, high cost and large size. In recent years, power
conversion systems with several stages are replaced by multi-input
converters (MICs) that provide unied converter structures, simple circuit topology, centralized control system, high reliability,
low manufacturing cost and low size. In general, the systematic
approach of generating MICs has been introduced in [12] and [13].
Besides, a systematic method to synthesize MICs has been proposed in [14]. In [15], assumptions, restrictions and conditions for

S. Danyali et al. / Electric Power Systems Research 127 (2015) 112

analyzing feasible and unfeasible MICs are described. On the whole,

all various MICs are responsible to accept dc voltages in their input
ports, while from the output point of view they can be broken into
two categories: DC-DC MICs and DC-AC MICs.
For the rst category, in [16], [17] and [18], three multi-input
converters have been proposed based on the structure of the DCDC boost converter. The three-input DC-DC boost converter for
PV/FC/Battery systems proposed by the authors in [18] benets
from simple unied structure and minimum number of power
switches. The converter preferably achieves MPPT of the PV source,
exact setting of the FC power and controlling state of charge (SOC) of
the battery. A family of multiport DC-DC converters based on combination of dc-link voltages by magnetic coupling of half bridge
boost converters has been presented in [19]. In [20], a hybrid
DC-DC system, fed from PV and battery sources, for satellite applications and also in [21] a four-port hybrid system for PV, wind
turbines, and battery sources have been presented. For these systems, PV and wind sources are exploited in MPPT conditions and
their control strategies have been planed based on decoupling
method to separately design of cross-coupled control loops compensators. A single DC-DC converter, which can hybridize powers
of FC and battery sources, has been proposed in [22] for tramway
applications.
For the second category DC-AC MICs, in [23], a three-port
bidirectional converter with three active full bridges, two seriesresonant tanks and a three-winding high frequency transformer
has been proposed. It gives high boost gain and reduced switching
losses due to soft-switching operation. In [24], an isolated DCAC bidirectional multi-input converter has been controlled by the
input-output feedback linearization method. An isolated three-port
full-bridge topology has been proposed in [25] for hybrid FC/Battery
system, which aims at feeding a small autonomous load. A lineinteractive FC powered uninterruptible power supply (UPS) has
been introduced in [26], which can operate in both stand-alone
and grid-connected modes. A grid connected multi-input inverter
has been proposed in [27] to combine PV and wind turbines with
MPPT condition. This topology is not suit for utilizing EES due to its
unidirectional input ports.
Although DC-AC MICs benet from mentioned advantages, all
of them utilize at least two conversion stages and also an output
lter to support ac loads. Accordingly, for the all DC-DC or DC-AC
MICs, multi power conversion stages result in increasing the count
of devices, system power losses, size, weight and cost of hybrid
systems.
Single-stage topologies which integrate performance of each
stage of multi-stage power converters are becoming more attractive. Although they may cause control complexity, but they offer
higher efciency and reliability, and lower cost and size. In [28], a
single-stage single-input z-source inverter with coupled inductor,
which is able to step-up low level input dc voltages into a high level
output ac voltage, has been proposed. In [29], the authors utilized
a z-source inverter to drive a brushless dc motor with high performance operation. This circuit lacks enough degrees of freedom
for the control system and does not provide acceptable current ripple for the input sources. Multi-level inverters are also introduced
in [30] as single-stage multi-input inverters. In [31], the authors
exploited PV, FC and battery sources at input ports of the sevenlevel cascade inverter to supply a grid-connected ac load. High
number of power switches and high voltage stresses across them
are the proposed system limitations.
As discussed above, it can be said that for such hybrid power
systems, better performances can be obtained providing that a
single-stage multi-input DC-AC converter is utilized. Such converters should originally step-up input dc voltages, provide low
input current or voltage ripples, and employ low number of power
switches and small passive elements.

In this regard, a new single-stage three-input boost converter

will be introduced in this paper. The authors try to utilize the
proposed structure for stand-alone hybrid PV/FC/UC system applications. This three-input converter integrates two unidirectional
input dc ports for PV and FC sources and two bidirectional ports for
ESS and output resistive load in a unied structure. UC is considered
at the ESS port to supply or absorb the power difference between
the total generated input dc power (by the PV and FC sources) and
the load power for short periods of time. The proposed converter
can directly step-up the low level input PV and FC voltages into a
high level pure sinusoidal voltage. Since the load voltage is perfectly
obtained sinusoidal from two output dc-biased sinusoidal voltage
components VO1 and VO2 , the proposed converter does not need
any output voltage lter. It makes use of only six power switches,
which are controlled by four independent duty ratios to accomplish MPPT of the PV source, regulate the FC power and generate
the output voltage components. Powers of the PV and FC sources
can be delivered to the load separately or simultaneously, while the
UC is autonomously charged or discharged to balance the power
ow. Moreover, regarding maximum available PV power and load
power a useful power management control scheme is proposed
to exploit the FC and UC sources in their optimal power operating points. These matters are fully realized in this control unit
by proper choosing of the control system reference values. Owing
to the multi-input structure of the proposed converter, designing
the control system is accomplished based on MIMO control system theory. Hence, rst the small signal model of the converter
is carried out and then the pole-placement control strategy via
integral state feedback is applied to achieve the converter control laws. As a result, four separate control loops including three
voltage regulator loops for the PV source and two output voltage
components and one current regulator loop for the FC source are
designed.

2. Proposed converter structure and operation

performance
Fig. 1 shows the proposed single-stage three-input DC-AC boost
converter, which is essentially applicable for hybrid PV/FC/UC systems. The proposed converter does not need any output lter,
utilizes minimum number of power switches and small passive
elements. As indicated in the gure, the output load is differentially connected between two dc-link voltages, VO1 and VO2.
Each voltage is unipolar and obtained from the voltage across a
common output capacitor of two parallel DC-DC boost converters.
The rst boost converter is current bidirectional and connected to
the dc-link of the common UC storage, while the second one is
current unidirectional and fed from PV or FC source. For the bidirectional boost converters, both upper and lower power switches
are complementary controlled to produce their corresponding output voltages while the single power switch of the unidirectional
boost converter is independently controlled to regulate power of
its corresponding input source. Thus, four independent duty ratios
d1, d2, d3, and d4 are introduced for the proposed converter to
control the power switches S1, S1* and S2, S2* and S3, and S4,
respectively.
Each set of parallel boost converters are planned for producing a dc-biased sinusoidal voltage across its corresponding output
capacitor as follows:

Vo1 (t) = Vdc +

Vm
Sint
2

Vo2 (t) = Vdc

Vm
Sint
2

(1)

S. Danyali et al. / Electric Power Systems Research 127 (2015) 112

Fig. 1. Proposed converter topology.

P o . Now, we obtain the converter rst and second sides instantaneous powers delivered to the load as follows:
PO1 (t) = IO (t)VO1 (t) = Im Sint(Vdc +
= Vdc Im Sint

Vm Im
Vm Im
Cos2t +
4
4

PO2 (t) = . . . = Vdc Im Sint

Fig. 2. Proposed converter output voltages.

The modulation of each voltage is 180 degrees out of phase with

the other one, resulting in generating a pure sinusoidal voltage
across the load as follows:
Vo (t) = Vo1 (t) Vo2 (t) = Vm Sint

PUC1 = PO1 + PC1 PPV = Vdc Im Sint +

generated dc power by PV and FC sources and the load power for

short period of times. Also, it is assumed that PV and FC sources
deliver two ripple free dc currents IL1 and IL4, respectively. Hence,
two input dc powers PPV = VPVIL3 and PFC = VFCIL4 are generated
at their corresponding ports. Now with (1) and (2), the current of
the output resistive load can be expressed as follows:
Io (t) = Im Sint, Im = Vm /RL

(3)

The instantaneous power delivered to the load is:

Po (t) = Vo (t)Io (t) = Vm Sint Im Sint =

Vm Im
Vm Im
Cos2t +
2
2

Vm Im
Vm Im
Cos2t +
4
4

PC1 = Vo1 IC1 = (Vdc +

=

Vm
Vm
C1 d
Sint)
Sint)
(Vdc +
2
2
dt

Vdc Vm
V2
Cost + m Sin2t
2XC1
8XC1

PC2 = Vo2 IC2 = . . . =

(4)

Neglecting the converter power losses, the UC both side powers

are obtained as follows:

Vdc Vm
V2
Vm Im
Vm Im
Cost + m Sin2t
Cos2t + [
VFC IL4 ]
2XC2
8XC2
4
4

(7)

Summing PUC1 and PUC2 and assuming XC1 = XC2 = XC gives

the total instantaneous UC power as follows:
PUC = P UC + P UC =

2
Vm
Sin2t P o Cos2t + [P o PPV PFC ]
4XC

(8)

where, P UC represents the UC average power, which is equal to

the system power difference between the total generated input dc
power and the average load power. Besides, the power component
P UC is the summation of the pulsation component of the load power
and the total reactive power associated with the converter capacitors. Now, neglecting the stored energy in the converter inductors,
the UC current and its both side inductors currents are obtained:

IL1 =

2
PUC1
V Im
V Vm
Vm
P o
P o 2PPV
= dc Sint + dc
Cost +
Sin2t
Cos2t + [
]
VUC
VUC
2VUC XC
8VB XC
2VUC
2VUC

IL2 =

2
PUC2
V Im
V Vm
Vm
P o
P o 2PFC
= dc Sint dc
Cost +
Sin2t
Cos2t + [
]
VUC
VUC
2VUC XC
8VUC XC
2VUC
2VUC

IUC =

2
PUC
Vm
P o
P o PPV PFC
=
Sin2t
Cos2t + [
]
VUC
4VUC XC
VUC
VUC

In (4), the average quantity VmIm/2 corresponds to the load

average power P o , while the alternative term at the angular
frequency 2 denotes the pulsation component of the load power

(6)

Vdc Vm
V2
Cost + m Sin2t
2XC2
8XC2

Vdc Vm
V2
Vm Im
Vm Im
Cost + m Sin2t
Cos2t + [
VPV IL3 ]
2XC1
8XC1
4
4

PUC2 = PO2 + PC2 PFC = Vdc Im Sint

(5)

As seen in (5), the delivered average powers at the both sides

of the converter are the same and equal to the half of the load
average power. Also, the instantaneous powers associated with the
converter capacitors C1 and C2 (XC1 = 1/C1 and XC2 = 1/C2) are
obtained as follows:

(2)

Thus, whereas a dc bias appears at each end of the load voltage,

with respect to the ground, the differential dc voltage across the
load is zero. This approach of DC-AC voltage conversion is clearly
shown in Fig. 2.
In the proposed hybrid system, the aim of using the UC is
to supply or absorb the power difference between the total

Vm
Sint) = . . .
2

(9)

As (9) shows, two currents IL1 and IL2 contain two identical
alternative terms with the angular frequencies of and 2 and
two different dc terms that depend on the generated dc powers by

S. Danyali et al. / Electric Power Systems Research 127 (2015) 112

the PV and FC sources. Moreover, the UC current IUC is a dc-biased

sinusoidal waveform at the angular frequency 2, which its dc and
ac components guarantee supplying the system power deciency
and the pulsation component of the load power, respectively.
It is worth mentioning that reference voltages for the both sets of
the boost converters can be chosen regard to the converter output
voltage. In this way, the output voltage can be directly controlled,
which consequently leads robust operation of the converter to transient errors and dc offsets, and shows a poor rejection to external
disturbances such as sudden load changes. For this purpose, the
boost converter, which has to compensate output voltage variations, can be selected in terms of the sign of the sinusoidal output
voltage as follows:

This model is nonlinear and its small signal modeling can result
in a linear model, which can demonstrate the converter dynamic
behavior and stability, and facilitates proper design of its controllers. The design procedure to obtain small signal model of the
converter can be found in [33]. Based on this method, the state variables, duty ratios, and input voltages contain two components: dc
v ). Small signal model of
D,
V ) and perturbations (x, d,
values (X,
the proposed converter can be expressed by the following equations:

Voref = Vm Sint

CPV

if Sint > 0

if Sint < 0

Vo1ref = Vo2 + Voref

Vm

Vo
= Vdc
Sint
2
2ref
Vo1ref = Vdc + Vm Sint

(10)

L3

diL3
3 1)vO + d 3 V O r3iL3 + v PV
= (D
1
1
dt

L1

diL1
1 1)vo + d 1 V o r1iL1
= (D
1
1
dt

C1

(v v O2 )
dvo1
1 )iL1 + (1 D
3 )iL3 d 1 IL1 d 3 IL3 O1
= (1 D
RL
dt

C2

dvo2
(v v O1 )
2 )iL + (1 D
4 )iL d 2 IL d 4 IL O2
= (1 D
2
4
2
4
RL
dt

Vo2ref = Vo1 Voref

3. Dynamic Modeling of the proposed converter

As seen in Fig. 1, the proposed system includes six passive
elements in the converter structure and two input parallel capacitors CPV and CFC associated with the PV and FC sources. These
passive elements introduce eight different state variables i.e.
IL1 , IL2 , IL3 , IL4 , Vo1 , Vo2 , VPV , VFC to the proposed system. Regularly,
the PV voltage is chosen to accomplish the system MPPT performance, while for the FC source it is preferred to regulate its power
through a current control loop because of its high sensitivity to the
FC current. Hence, the goals of the converter control system are
dened to set the PV voltage, regulate the FC current and generate
the converter output voltages. Thus, four state variables VPV , IL4 , Vo1
and Vo2 should be directly controlled, while four other state variables (i.e. IL1 IL2 , IL3 , VFC ) are not directly controllable and will be
automatically adjusted considering the converter power operating point. In this regard, four different control loops by means of
four independent duty ratios d1, d2, d3, and d4 should be designed
to regulate the converter controllable state variables. For this purpose, small signal model of the converter should be extracted. In
switched mode power converters, small signal model is usually
obtained from the converter state space averaged model [16] and
[32]. The state space averaged model of the proposed system is
presented as follows:
CPV
L3

dVPV
= IPV IL3
dt

dIL1
= d1 VUC + (1 d1 )(VUC Vo1 ) r1 IL1
L1
dt

dVo2
(VO2 VO1 )
= (1 d2 )IL2 + (1 d4 )IL4
C2
RL
dt
L2

dIL2
= d2 VUC + (1 d2 )(VUC VO2 ) r2 IL2
dt

L4

dIL4
= d4 VFC + (1 d4 )(VFC VO2 ) r4 IL4
dt

CFC

dVFC
= IFC IL4
dt

L2
L4

diL2
dt

(11)

2 1)vO2 + d 2 V O2 r2iL2
= (D

diL4
4 1)vO2 + d 4 V O2 r4iL4 + v FC
= (D
dt

CFC

dvFC
= iL4
dt

(12)

The converter small signal model (12) can be represented in the

state-space matrix form as follows:

x (t) = Ax(t) + Bu(t)

(13)

y(t) = C x (t) + Du(t)

dIL3
= d3 VPV + (1 d3 )(VPV Vo1 ) r3 IL3
dt

dVo1
(Vo1 Vo2 )
C1
= (1 d1 )IL1 + (1 d3 )IL3
RL
dt

dvPV
= iL3
dt

L3

A=

1
CPV

r3
L3

3 1
D
L3

r1
L1

1 1
D
L1

3
1D
C1

1
1D
C1

1
RL

1
RL

1
RL

1
RL

2
1D
C2

4
1D
C2

2 1
D
L2

r2
L2

4 1
D
L4

r4
L4

1
L4

1
CFC

(14)

S. Danyali et al. / Electric Power Systems Research 127 (2015) 112

V O1

L3

IL3
C
1
B=

V O1
L1
IL1

IL2
C2

IL4
C2

V O2
L2

V O2
L4

C1

v PV

iL3

i
d3

L1

d 1
v O1

; x =
; u =
;

v O2
d2

iL2
d 4

iL4

v FC

completely state controllable. Now, four additional integral states

can be dened as follows:
q 1 (t) = VPVref x 1 (t)
q 2 (t) = VO1ref (t) x 4 (t)

q 4 (t) = IL4ref (t) x 7 (t)

The state and output equations of the system, considering new
integral states, are rewritten as follows:

Vo1
y=
V
o2
IL4

1 0 0 0 0 0 0 0

0 0 0 1 0 0 0 0
; C =

0 0 0 0 1 0 0 0 ; D = 0;

(16)

..
.

..
.

..
. 0
 x (t)

(19)

q(t)

where, r(t) is the input reference vector of the control system as

follows:
r(t) = [VPVref Vo1ref Vo2ref IL4ref ]T

(20)

By dening A and B as follows:

C
y (t) =

VPV

B
0

.
=

+
+
x
(t)
u(t)

r(t)

.
x (t)

(15)

(18)

q 3 (t) = Vo2ref (t) x 5 (t)

q(t)

and y are state variable vector, control variables vector,

where, x , u,
and system output vector, respectively. A is the state matrix, B is
the input matrix, C is the output matrix, and D is the feed-forward
matrix.
As the converter control system is aimed to regulate four state
variables (VPV , Vo1 , Vo2 and IL4 ) through four independent controlling variables (d3, d1, d2 and d4), respectively, so C and D matrixes
are dened as follows:

..
.

A
0
B

.
A = .. ; B =

1 0

..
.

(21)

C of the system (19) can be written

The controllability matrix 
by the following equations:
4. Pole-placement control approach, stability and
sensitivity analyses
The obtained small signal model in (14)-(15) introduces a linear
MIMO control system to the converter. MIMO control systems have
several interacting control loops due to integrated power trains,
so designing closed-loop controllers for such systems is difcult
and should be accomplished by MIMO systems control methods. A
useful MIMO control method is pole-placement approach via integral state feedback [34]. This method directly deals with the state
variables to design control compensators. As a result, it is properly
applicable to power switching converters, where all state variables
are accessible. It can be shown that if the considered system is completely state controllable, then poles of the closed-loop system can
be placed at any desired locations by means of an appropriate state
feedback gain matrix. The most frequently used approach to choose
locations of desired closed-loop poles is based on experience in the
root-locus design, placing a dominant pair of closed-loop poles and
choosing other poles at its left side enough far from the j axis.
Considering the (14) and (15), the system controllability matrix is
expressed as follows:
.
.
.
.
.
C = [B .. AB .. A2 B .. . . ... .. A6 B .. A7 B];

.
.
.
.
.
C = [B .. A B .. A 2 B .. ..... .. A 6 B .. A 7 B]
=

..
..
..
..
.
0 .. C . CAB . ..... . CA5 B . CA6 B

(22)

C can be rewritten as follows:

and then

C =

..
.
..
.

A
B

..

AC

..
. CC

..
.



..
.

..
.

..
. C

(23)

Considering that rank (C) = 8, the system (19) is state controllable if and only if rank (M) =12. This fact guaranties that there
is a matrix K which satises the pole-placement problem. Now,
consider the following state feedback control:

(17)

=
u(t)

For the proposed system, the rank of the controllability matrix

should always be 8 (rank (C) =8), then the system becomes

.
.
.
.
.
B .. AB .. A2 B .. ..... .. A6 B .. A7 B

Kx

..
.


K


Kq

x (t)

;
q(t)

(24)

S. Danyali et al. / Electric Power Systems Research 127 (2015) 112

Fig. 3. Proposed converter integral state feedback control loops: a) Voltage regulator of the PV source b) Voltage regulator of rst capacitor c) Voltage regulator of second
capacitor and d) Current regulator of the FC source

where, Kx and Kq are:

K11

K12

K18


K11


K12


K13


K14

K
K
K
K21 K22 K28
K
; Kq = 21 22 23 24 ;

K K K K
K31 K32 K38
31 32 33 34

Kx =

K41

K42


K41

K48


K42


K43


K44

(25)

..
. BKq

x (t) + r(t)

C
x(t) + Br(t)

x (t) = A

..
.

dC=+50%

-20 00
-25 00

dC=-50%

-30 00

dL=-50%
dR=+50%

-35 00
dR=-50%
dR=dL=dC=0%
-40 00
OP1 OP2 OP3 OP4 OP5 OP6 OP7 OP8 OP9 OP10 OP11 OP12 OP13 OP14 OP15

The propped state-feedback matrixes Kx and Kq that can realize

this eigenvalues assignment is obtained as follows:

A + BKx

..
=

.

q(t)
x (t)

dL=+50 %

-15 00

Fig. 4. SM curves for the ve-input structure of the proposed converter.

By substituting (24) in (19), we have:

Converter Stablity Margin

-1000

(26)

Now, the problem is to nd the controlling signal u(t)

via state
feedback gain matrix K, so that the closed-loop system eigenvalues are placed at the desired locations. There are several methods
to determine the system controller matrix K = [Kx Kq]. The control systems toolbox of the MATLAB software provides a useful
pole-placement function [35], which inputs the system (19) and
the desired eigenvalues locations to nd the state feedback gain
matrixes.
For the proposed system with the simulated circuit parameters
listed in Table I and using (14)-(15), small signal model matrixes
are obtained rst. Then, after composing the system controllability matrixes C and M, their ranks are ensured for 8 and 12,

respectively. The 12 open-loop eigenvalues of the state matrix A

are obtained as follows:
= 0, 0, 0, 0,

917 2725j, 118 2808j, 31 482j, 33 484j
As seen, there are four dominant eigenvalues at origin (S = 0),
which have been resulted from the additional integral states (q1,
. . ., q4). Now, in order to assure the converter operation in the stable
region enough far from j axis, all the converter eigenvalues are left
i = 
i 4000; i = 1. . .12:
shifted on axis by the denition of 
= 4000, 4000, 4000, 4000,

4917 2725j, 4118 2808j, 4031 482j, 4033 484j

570

141
30

120

10

49

70

16

20

19

Kx =

80

44.7

20.3

5 170
9

2.86

85.7

6.34 17.7

985

74
132

103 ;
149
627

128 21.8 1.94 11.0

Kq =
49.8 0.06 22.9 133 ;
98.4

Fig. 3 shows four integral state feedback loops for the proposed
converter. This system has poles which have been assigned by the
matrix K at the desired places and tracks the input reference signals
IL1ref, VO1ref, VO2ref and IL4ref.
It is noticeable that the proposed converter operating point and
consequently its small signal model changes due to sinusoidal variations of the converter output voltages in the range of [Vdc -Vm /2
Vdc + Vm /2]. Hence, the converter eigenvalues may move on the S
page. For this reason, the converter stability should be ensured
throughout all the output voltages range. In this respect, after
determining the system state feedback matrixes Kx and Kq , several
different possible operating points are dened for the converter
output voltages. Afterwards for each operating point, converter
small signal model and its eigenvalues are obtained from matrix
For each case, the nearest real part of the ejgenvalues to the
A.
j axis is introduced as the converter stability margin (SM) in the
operating point. Depicting all stability margins of the dened operating points in a same graph shows the converter SM curve, which
helps to study the converter control system stability. This procedure has been made for fteen different operating points, evenly
distributed throughout the converter output voltages in a typical
range of [100 V 380 V]. The resulted SM curve (dR = dL = dC = 0%) has
been shown in Fig. 4. As seen in the gure, we have also considered sensitivity of the obtained SM curve to the variations of the

S. Danyali et al. / Electric Power Systems Research 127 (2015) 112

converter circuit parameters. In this regard, the converter SM curve

has been depicted in the presence of the maximum parameters
variations of 50% for the all converter resistances, inductances
and capacitances values. From the curve of dR = dL = dC = 0%, since
OP8 is the operating point that the converter control system has
been designed for, the converter SM becomes exactly 4000, which
is equal to the left shift level between the converter located desired
eigenvalues and the primary eigenvalues. It can be also seen that
for every SM curve, the worst operating point of the converter
occurs at the operating points of OP1 or OP15 , which correspond
to the moments that one of the converter output voltages VO1 or
VO2 is set at its maximum value (Vdc + Vm /2). Moreover, considering 50% variations in the converter resistances values does not
have signicant impacts on the converter SM curve. However, when
the converter inductances and capacitances values are considered
to have -50% variations, the converter SM curve has obviously
changed. As clear from the gure, the higher values of the system
inductances and capacitances result in moving the system eigenvalues towards the j axis and hence achieving less SM values, so that
the worst SM curve is obtained for dL = +50%, which denotes that
the dominant eigenvalues are generally correspond to the system
inductors. Besides, the worst operating point on this curve shows
also the minimum SM about 1000, which guarantees successfully
operation of the converter control system even in the presence of
+50% variations in the converter inductances values. Such a secure
stability margin is indebted from the fact that the converter primary
eigenvalues have been enough left shifted on axis to achieve the
desired eigenvalues.
5. Power management control scheme
For the proposed three-input converter, the PV and FC sources
are responsible for supplying the load, the UC is employed to supply a part of power demand in low PV generation and high load
circumstances for short periods of time, besides it compensates
the FC start-up transitions and dynamic characteristic. For the
proposed system, the UC should be charged when its voltage is
lower than the minimum value of VUCmin and its charging performance is stopped when its voltage reaches the maximum value
of VUCmax. Depart from the converter control system, an overall
control scheme is proposed to manage the system power ow. This
control unit is shown in Fig. 5.
As seen in the gure, all the reference values of the converter
control system are determined here. In this regard, the output reference voltages VO1ref and VO2ref are obtained according to (10) and
the reference voltage of the PV source VPVref is directly determined
by the MPPT control algorithm. Besides, the reference current of
the FC source IL4ref is determined regarding the FC maximum and
minimum deliverable currents and state of charge of the UC. In this
respect, it is assumed that the maximum power of the PV source

Fig. 5. Proposed power management control scheme.

is extracted and the UC does not necessitate to be charged. Hence,

if the power deciency of PL-PPV is put in the deliverable power
range of the FC (PFCmin < PL-PPV <PFCmax), then it is only supplied
by the FC source and the UC power is set at zero. For this purpose,
the reference current of the FC source IL4ref will be so adjusted by
the PI control process that the average current of the UC is regulated
at zero value. On the other hand, in the conditions that the UC charging is necessitated, the reference value of the UC average current is
chosen to be IUC = IUC.Ch. Therefore, the reference current of the FC
source IL4ref goes up by the PI control process so that it can charge
the UC with the desired average current. Nevertheless, in high load
circumstances that the FC power reaches its maximum deliverable
power, its reference current is set at the maximum value IFCmax
and the remained power (PL-PPV-PFCmax) is autonomously supplied by the UC. Moreover, in the case that the reference power of
the FC becomes lower than the desired minimum power PFCmin,
the FC reference current is set at IFCmin to avoid working the FC
source in low efciency ranges.
6. Simulation result, experimental verication, Efciency
and Comparison
As is clear, the proposed converter power switches experience the voltage stress of Vstr = Vdc + Vm /2. This voltage stress can
be possibly minimized if the voltage Vdc is minimized. Therefore,
assuming that the input PV, FC and UC voltages and the converter
duty ratios take values in the following ranges:
VL VPV , VFC , VUC VH
DL d1 , d2 , d3 , d4 DH ,

DL , DH [0, 1)

(27)

It can be shown that, if the lowest and highest duty ratios are set
at zero and the predened value Dmax , respectively, the voltages Vdc
and Vstr are minimized, while a minimum acceptable value VLmin is
dictated to input dc voltages as:
Vdc / min = VH + Vm /2
Vstr / min = VH + Vm

(28)

VL / min = (1 Dmax )(VH + Vm )

For example, if the minimum and maximum values of the converter duty ratios are designed to be DL = 0, Dmax = 0.8 and with
VH = 100 V, and Vm = 280 V, using (28) gives the following voltage
design considerations for the system:
Vdc / min = 240 V; Vstr / min = 380 V; VL / min = 76 V.
6.1. Simulation result
In order to show the proposed converter performance, it is
simulated in different operation conditions by the PSCAD/EMTDC
software. As mentioned, the voltage of UC storage is regulated about
a value of VUC by the proposed converter control system, so that it
will operate as like as a battery energy storage system. Therefore,
for the proposed system simulation and experimental validations,
we will consider a battery source instead of the UC storage at the
ESS port. So, for the rest of the paper, variables VB and IB are used
as the voltage and current of the ESS port (VUC and IUC), respectively. A resistive load (RL), with the peak and minimum powers
of 2.8 kW and 1 kW, is supplied at the converter output port. In
order to assure reliable electricity supply, the PV and FC powers
sizes are assumed to be PPVmax = 2.5 kW, PFCmax = 1.6 kW. In the
simulations, the PV and the FC sources are modeled as presented in
[36], [37]. The output P-V and P-I characteristics of the PV and FC
sources are shown in Figs. 6 and 7, respectively. In Fig. 6, two different output characteristics are depicted for the PV source with the

S. Danyali et al. / Electric Power Systems Research 127 (2015) 112

3
2.5
G=1000W/m2

1.5

PV

(kW)

G=400W/m2

0.5
0

50

100

150

VPV (V)

Fig. 6. Output PV characteristic of the PV source.

PFC(kW)

1.5
1
0.5
0

10

15

20

25

IFC(A)

Fig. 8. Converter output voltages and current for a) First and second periods b)
Second and third periods.

Fig. 7. Output P-I characteristic of the FC source.

maximum powers of 0.85 kW and 2.5 kW, which are obtained for
sun irradiation levels of 400 W/m2 and 1000 W/m2, respectively.
The incremental conductance algorithm in [38] has been utilized
to exploit the PV source in MPPT condition. Furthermore, Fig. 7
shows the maximum extractable current of the FC source about
IFCmax = 20A.
The output voltage of the proposed converter is desired to be
a 50 Hz sinusoidal waveform with the rms-value of Vrms = 200 V
(Vm = 280 V). Hence, the peak and dc-bias values of the output
voltages VO1 and VO2 are chosen Vm = 280 V and VDC = 240 V,
respectively. Moreover, the battery voltage is chosen VB = 96 V. The
proposed converter simulation parameters are listed in Table 1.
A simulation test with three different periods is provided to
evaluate the converter performance. Fig. 8 (a) and (b) depicts the
simulation results for both generated dc-biased sine wave voltages
alongside the output voltage and current, before and after applying the simulation step changes at the moments of t = 0.3 sec and
t = 0.6 sec. The third and fourth inductors currents IL3 and IL4 are
shown in Fig. 9. The voltages of the PV and FC sources have been
also depicted in Fig. 10. The battery current has been shown in
Fig. 11 and the currents of rst and second inductors IL1 and IL2 are
illustrated in Fig. 12, before and after applying the simulation step
changes at the moments of t = 0.3 sec and t = 0.6 sec. The periods of
the simulation are described in detail as follows:
First simulation period 0 t < 0.3 sec: In this period, the load
power is about PL = 2.8 kW (RL = 14), the maximum available PV
power is tracked about PPV = 2.5 kW at the operating point (100 V,
25A) and there is no need to charge the battery. Therefore, in the
power management control unit the average reference value of
Table 1
Converter parameters.
Symbols

Simulation parameters

Prototype parameters

r1 = r2
L1 = L2
r3 = r4
L3 = L4
C1 = C2
CPV = CFC
fs

0.05
0.4mH
0.1
4mH
47 F
1000 F
30 kHz

0.05
0.4mH
0.1
4mH
47 F
1000 F
30 kHz

Fig. 9. The currents of the third and fourth inductors.

Fig. 10. The voltages of the PV and FC sources.

the battery current is chosen zero. Hence, the power deciency

of PL-PPV = 0.3kW(<PFCmax) should be supplied by the FC source
in addition to the converter power losses. Therefore, as shown in
Fig. 8 and 9 for (0 < t < 0.3 sec), the operating point of (94 V, 6.5A)
is resulted for the FC source, showing 315 W power losses for the
converter. As is seen in Fig. 11(a) (t < 0.3 sec), a sinusoidal current
with the angular frequency of 2 and the average value of zero has
been resulted for the battery source. Moreover, as is seen in Fig. 12,
both currents IL1 and IL2 have taken similar waveforms, while IL1
contains the lower dc level since the generated power by the PV
source is more than that by the FC source.
Second simulation period 0.3 t < 0.6 sec: In this period, the battery charging is not still necessitated and the load power remains
constant at PL = 2.8 kW, while a step change in the sun irradiation
level at t = 0.3 sec is applied to decrease the available maximum PV

S. Danyali et al. / Electric Power Systems Research 127 (2015) 112

Fig. 13. Converter duty ratios for the second simulation period.

Fig. 14. Prototype converter.

Fig. 11. IB for a) First and second periods b) Second and third periods.

Fig. 12. IL1 and IL2 a) First and second periods b) Second and third periods.

power into PPV = 0.85 kW. Therefore as is seen in Fig. 9 and 10, the
PV operating point is set at (10A, 85 V). As a consequence, the power
deciency of PL-PPV = 1.95 kW should be supplied by the FC and
battery sources. According to Fig. 7, as the FC source cannot deliver
such a amount of power, its maximum deliverable power (PFCmax = 1.6 kW) is extracted and the remained power along with the
converter power losses are expected to be supplied by the battery.
Therefore, the reference current of the FC is set at IFCmax = 20A by
the power management control unit. Thus, the average value of the
battery current is autonomously set about 7A to balance the converter power ow, which shows the discharging power of 0.68 kW
for the battery and supplying the power of 0.33 kW as the converter
power losses. In this period, exactly similar to the previous period
the waveforms of IL1 and IL2 do not change, while IL2 takes the
lower dc level, since the generated power at the FC port is more
than that at the PV port.
Third simulation period 0.6 t < 0.9 sec: In this period, the load
power is decreased to its minimum value of PL = 1 kW (RL = 34),

while the PV power remains equal to 0.85 kW and is extracted with

the same previous operating point. Moreover, it is assumed that
the battery source necessitates to be charged. Therefore, the average value of the battery current is chosen to be IB.ch =-10A in the
power management control unit (PB = -0.96 kW). In this condition,
the reference current of the FC source is so decreased that it can
supply the system power deciency of PL-PPV = 0.15 kW, 0.96 kW
charging power of the battery and the converter power losses. As a
consequence, the FC operating point is settled at (86 V, 15A), which
shows delivering the power amount of 1.3 kW and 0.34 kW power
losses for the converter. As is seen in Fig. 11, the amplitudes of the
battery current has obviously diminished due to decreasing the load
power and its average value has been set at -10A. Also, in Fig. 12,
the currents IL1 and IL2 have taken identical waveforms but with
smaller amplitudes. In addition, the current IL2 has the lower dc
level than IL1 because the generated power by the FC source is
more than that by the PV source.
In Fig. 13, the output voltage regulating duty ratios d1 and d2 and
the duty ratios d3 and d4, which regulate voltage and current of the
PV and FC sources, are illustrated for the second simulation period.
As seen from the simulation results, the load voltage is produced in
a high quality sinusoidal voltage (THD < 3%). Besides, the PV voltage
and the FC current are well regulated at their reference values with
the acceptable voltage and current ripples less than 2 V and 1A,
respectively. It is also easily seen that the converter closed-loop
control system is highly stable so that it does not experience any
tough transient response against the applied step changes in PV and
load powers as well. These merits of the converter are originated
from the well-developed converter control system alongside the
power management control unit.
6.2. Experimental results
In order to verify the effectiveness of the proposed converter,
a low power laboratory prototype was built as shown in Fig. 14.
The parameters of the prototype are listed in Table I. The IRFP450
MOSFET has been used as the converter power switch as well as
the Texas Instrument digital signal processor (DSP) TMS320F2812
as the system prototype controller. The entire converter MOSFETs
are PWM switched at the frequency of 30 kHz and with the four
duty ratios of d1, d2, d3 and d4, which are digitally calculated in
the control unit by the DSP. MOSFETs S1 and S2 as like as MOSFETs S3 and S4 are switched complementary with the duty ratios
d1 and d2, respectively. Moreover, two other duty ratios d3 and

10

S. Danyali et al. / Electric Power Systems Research 127 (2015) 112

Fig. 15. The converter output voltages in DC-AC mode (50V/div).

d4 are used to switch the S3 and S4 MOSFETs, respectively. In the

prototype, two isolated voltage sensors NV25-P along with four
isolated current sensors La-55p are also employed in the measurement board to feedback the converter output voltages Vo1 and Vo2
and inductor currents IL1, IL2, IL3, and IL4 to the A/D module of the
DSP. Instead of the PV and FC sources two similar Thevenin circuits
with the dc voltages of Vth = 50 V (with maximum deliverable current of 5A) and series resistances of Rth = 2 are utilized. In order
to distinguish these sources, we name their terminal voltages as
Vi1 for the PV port and Vi2 for the FC port. Moreover, a 48 V battery
pack consisting of four series 12 V lead-acid batteries is employed
in this prototype as the ESS. The output voltage is desired to be a
50 Hz sinusoidal shape with 140 V peak value. Hence, the peak and
dc bias values of the output voltage components are chosen to be
Vm = 70 V and Vdc = 120 V, respectively. All the experimental gures represented in following are captured with the scale of 0.1.
In order to validate practical performances of the proposed converter, three different conditions are scheduled for the system by
changing the reference voltage of the PV port (Vi1ref), current of
the FC port (IL4ref) and the load resistance. Initially, two generated dc-biased sinusoidal voltages alongside the load voltage are
shown in Fig. 15. Figs. 16 and 17 illustrate current and voltage variations of the PV and FC ports during all three operation conditions,
which show good current and voltage regulations for the utilized
Thevenin circuits. In addition, the battery current (IB) alongside the
two inductor currents IL1, IL2 are shown in Figs. 1820.
In the rst operation condition, the load power is about
PL = 250 W (RL40) and the reference voltage of the PV port and
the reference current of the FC port are chosen to be Vi1ref = 41 V
and IL4ref = 2A, respectively. With these reference values, the
drawn current from Vi1 has been set at 4.5A, while the voltage
of Vi2 is set at 46 V. Thus, the total generated power by the input

Fig. 16. Drawn currents from the PV and FC ports (1A/div).

Fig. 17. Voltages of the PV and FC ports (10V/div).

Fig. 18. IB , IL1 and IL2 in rst operation period (5A/div).

Fig. 19. IB , IL1 and IL2 in second operation period (5A/div).

Fig. 20. IB , IL1 and IL2 in third operation period (5A/div).

S. Danyali et al. / Electric Power Systems Research 127 (2015) 112

sources becomes 276 W. As seen in the Fig. 18, the battery current has taken a sinusoidal waveform at angular frequency of 2
with the zero average value. This means that the total generated
power by Vi1 and Vi2 (276 W), has completely supplied the load
power and its surplus power is approximately adequate to supply
the converter power losses, so the dc level of the battery current
has been set at zero value. Besides, the currents IL1 and IL2 have
the similar waveforms while the current IL2 has the lower dc level
since the higher power amount is extracted from the PV port.
For the second operation condition, the load power still remains
at previous value PL = 250 W, while the reference voltage and
current of the PV and FC ports are simultaneously changed to
Vi1ref = 48A and IL4ref = 3A, respectively. With these reference values, the drawn current from the PV port is set at 1A, while the
voltage of the FC port is adjusted at 44 V. Thus, the total generated
power at the PV and FC ports becomes 180 W. This amount of power
cannot completely supply the load and therefore, the battery source
will be autonomously discharged to balance the power ow. Therefore, as seen in Fig. 19, the battery current has taken the average
value about 2.2A, which draws 96 W discharging power from the
battery to supply the system power deciency of 70 W and 25 W
power losses of the converter.
For the third operation condition, the load power suddenly
decreases to PL = 100 W (RL = 100), the reference voltage of the
PV port does not change (Vi1ref = 48 V) and the reference current of
the FC port is increased to IL4ref = 4A. With these reference values,
the drawn current from the PV port remains at 1A, while voltage of
the FC port is set at 42 V. Thus, the total generated power at the PV
and FC sources becomes 216 W. As is clear, this amount of power
completely supplies the load and its extra power (116 W) will result
in supplying the converter power losses and charging the battery.
As seen in the Fig. 20, the dc level of the battery current has been
set about -1.8A, which shows 87 W charging power for the battery
and 26 W power losses for proposed converter.
6.3. Efciency and Comparison
The proposed converter act as a multi-input DC-AC inverter,
delivers the PV, FC and battery powers to the output load while
steps-up their voltages, simultaneously. All these features are realized with only one-stage structure of the proposed converter. There
is no any single-stage multi-input DC-AC inverter in literature to
compare with the proposed converter. However, in comparison
with the recent papers dealing with multi-input DC-DC converters, we found the maximum efciencies of 81% for [39], 95% for
[40] and 80% for [41]. On the other hand, the efciency of 83.4%
is observed for [42] as a single-stage single-input DC-AC inverter,
while we gain a satisfactory efciency average value about 90% for
the proposed multi-input converter. The converter efciency in the
experimental test is low in comparison with the simulation results
and some other papers. This is mainly concerned to the built laboratory prototype and the efciency can improve if a higher power
prototype and up-to-date laboratory devices are used.
The proposed converter can be compared with conventional
DC/DC-DC/AC multi-input converters (MICs) from two points of
view. The rst one is passive elements; compared to conventional
DC/DC-DC/AC MICs, the proposed converter may not reduce
number of passive elements, but their sizes can be chosen smaller.
In this regard, only the inductors L3 and L4 which are current
smoothing elements for PV and FC sources should be chosen large
enough. The inductors L1 and L2 and output capacitors C1 and
C2 that continuously track their time variable reference values,
should enjoy fast dynamic response and therefore can be chosen
relatively small. For example, C1 and C2 have been chosen 47 F for
the proposed converter, which are smaller than the typical value
for dc-link capacitor of conventional systems Cdc-link = 1000 F.

11

In addition, despite conventional DC/DC-DC/AC systems, as the

converter output voltage is directly generated as its expected
waveform, it does not need any output ltration stage, which
respectively reduces number of the used passive elements.
The second point of view is active elements; for utilizing minimum number of power switches in DC-AC MICs, each bidirectional
port needs at least two power switches, while for a unidirectional
port only one power switch is needed. Based on this fact, the proposed converter has advantageously utilized minimum number of
power switches, because it has employed only six power switches
for its two battery and output bidirectional ports and two unidirectional ports for PV and FC sources. In normal operation, all
the converter power switches experience the maximum voltage of
the converter output capacitors (Vdc + Vm/2). On the other hand,
power switches in conventional DC/DC-DC/AC systems experience
a maximum voltage equal to their dc-link voltage. With the same
output voltage range, i.e., Vrms = 200, the voltage rating of the
proposed converter is obtained about 240V + 140V = 380 V, while
it is typically about Vdc-link = 350 V for the conventional DC/DCDC/AC systems. Therefore, the voltage rating of the utilized power
switches in the proposed converter is a little more than those in
conventional DC/DC-DC/AC systems.
7. Conclusion
A new single-stage three-input DC-AC boost converter with
unied structure was proposed in this paper for hybrid PV/FC/UC
systems. The proposed converter has simple structure, minimum
number of power switches, small passive elements and centralized
and simple control system. Moreover, it does not need any output
voltage lter. The converter control laws were so determined via
integral state feedback that the converter eigenvalues were displaced into arbitrary places enough far from j axis. Such design
performance has led to desired dynamic behavior of the system.
Moreover, an overall control strategy was designed for managing the converter power ow. Simulation results prove achieving
almost all the converter operation targets such as MPPT of the
PV source, setting the FC power, charging/discharging of the UC,
and producing the desired sinusoidal output voltage. A prototype
was built, which its experimental results verify the theoretical and
simulation results.
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