A D-Q

Phase

Controller for a Full-Bridge Single

Inverter Used in Small Distributed Power
Generation Systems
Frame

Arman Roshan*, Rolando Burgos, Andrew C. Baisden, Fred Wang and Dushan Boroyevich
Center for Power Electronics Systems (CPES)
Virginia Polytechnic Institute and State University
Blacksburg, VA 24060-0111
Abstract- This paper presents a Direct-Quadrature (DQ)
rotating frame control method for single phase full-bridge
inverters used in small hybrid power systems. A secondary
orthogonal imaginary circuit is created to provide the second
phase required for the transformation; thus a DQ model of the
inverter is obtained and its controller designed emulating the
controls of three-phase power converters. The proposed controller
attains infinite loop gain in the rotating coordinate, thus
providing zero steady-state error at the fundamental frequency of
the converter. The proposed controller is designed and validated
through simulations using a DQ-frame average model in Matlab
and a detailed switching model in Saber, as well as experimental
results obtained with a 2.5 kW single phase full-bridge inverter
prototype using a DSP/FPGA based digital control system where
the proposed DQ-frame controller is fully implemented.

Over the past 15 years many advance control methods were

introduced, all aiming to control the instantaneous output
voltage of the single phase inverter with superior dynamic
response as well as zero steady-state error at the fundamental
frequency of the converter[l]-[12]. Traditionally, a fast inner
current loop with a slower outer voltage loop are designed to
eliminate the weakly damped LC filter of the inverter [3].
While this method results in improved performance of the
inverter under linear loads, it deteriorates under nonlinear loads.
Comparing to traditional methods, repetitive controllers are
more complex and advanced and they have gained a lot of
attention recently mainly due to their ability of removing the
periodic disturbances; however, they require quite complex
compensation or a continuous knowledge of the load [14].
They are also known to be slow and only effective for
I. INTRODUCTION
disturbances that are of the harmonics of the fundamental.
Deadbeat
controllers have also been applied for many years.
Today, small distributed power generation (DG) systems are
this
Although
type of controller theoretically can provide the
becoming more common as the need for electric power
fasted
to transient for digital implementation, its
response
increases. Small DG systems are usually built close to the user
include
disadvantages
high sensitivity to model uncertainties,
and they take advantage of using different energy sources such
and
as
well
as the noise on the sensed variables
parameters
as wind turbine and solar panels. Few examples are hybrid cars,
because
of
its
It must be noted that
high
gain
[8]-[10][15][16].
solar houses, data centers, or remote hospitals where providing
makes
the
controller
more
sensitive
to the noise
higher
gain
clean, efficient and reliable AC voltage is critical to the loads.
in
in
the
which
return
the
generated
system
degrades
This task is most often left to single phase inverters in DG
of
the
controller
itself.
Harmonic
controllers
have
performance
hybrid systems where they are the only interface between
sources and loads. Fig. la depicts a picture of a stand alone also being explored; however they are only applied to
hybrid system where different energy sources interface to harmonic disturbances and their transient response over their
different loads through a single phase inverter. Much has been stretched fundamental frequencies [17] [18].
done for the control of single phase inverters in the past years;
however, due to the requirements of standalone systems and
the nature of the converter, its controller design is still quite
difficult, and especially so if its critical functionality within the
system is taken into consideration. Part of the challenge is due
to the fact that the load is unknown, further complicating the
controller design. It is also difficult to achieve good
performance because of the time-varying nature of the
Figure 1. a) Small stand alone hybrid system b) Single phase full-bridge
inverter

converter [1][2][5].
*

A. Roshan is

currently

(arman.roshan@ delphi.com)

at Delphi Electronics & Safety,

1-4244-0714-1/07/$20.00 C 2007 IEEE.

This paper aims to apply the well-know DQ control method

of three phase converters to single phase inverters and it is
based by the work presented in [4]. Although the

641

implementation of DQ regulators requires a minimum of two

independent phases in the system, it is possible to provide a
second phase for transformation by creating a second
orthogonal imaginary circuit. While the Imaginary circuit has
the exact same components as the Real circuit, its state
variables are 900 phase shifted respect to their counterpart in
the Real circuit.
This paper proposes the use of differentiation to create the
second set of phase variables compared to a 900 delay used in
[4]. The second orthogonal imaginary circuit can be
constructed from the original real circuit of the inverter by
differentiating the state variables of the Real circuit. This
method has the advantages of removing the 900 delay which
improves the response of the controller during transients. The
controller then is designed and implemented in the DQ frame
where only one operating point is defined for the converter.
The DQ transformation provides a time-invariant model of the
inverter which makes the control design similar to that of dc-dc
converters. Theoretically, infinite loop gain can be achieved in
DQ rotating frame resulting in the elimination of the steadystate error at the fundamental frequency of the inverter by
placing a pole at the origin [4][19][20]. The superior
performance of the controller was first evaluated by simulation
using a DQ-frame average model as well as a detailed
switching model, and experimentally verified on a 2.5kW
hardware prototype using a DSP/FPGA based digital control
system.

ZRC

iF

L]

Z+Rc Z+Rc LVCi

(2)

where iL and v, are the sate variables, inductor current and

capacitor voltage respectively. Inductor ESL, RL and capacitor
ESR, Rc are also taken into account. The load is represented
with Z and the full bridge voltage, Vab is defined as
Vab (t)

u(t)

l-l

Vab (t)
Vab(t)

VdC

(3)

Vdc

A simple model of the inverter derived from the above

equations is shown in Fig. 2, where the full-bridge is replaced
by d(t)Vd, assuming that the switching frequency is much
higher than the fundamental frequency of the converter, and
that the dynamics of the full-bridge can be ignored due to its
high switching frequency. Also, it is assumed that the dc
source is constant in magnitude.

v, u(t) = d(t)Vd,

Figure 2. A simplified model of the single phase inverter

II. SINGLE PHASE INVERTER PRINCIPLES

A typical single phase full-bridge inverter is shown in Fig.

lb where the AC voltage is created by switching the full-bridge
in an appropriate sequence. The output voltage of the bridge,
Vab is proportional to input dc voltage as well as the duty cycle
of the inverter and can be either + Vdc, 0 or -Vd, depending on
how the switches are controlled. It must be noted that the
switches in one leg cannot be on at the same time; otherwise a
short circuit would exist across the dc source. Pulse Width
Modulation (PWM) is used to create the proper gating signals
of the switches, controlling the amplitude and frequency of the
output voltage directly. To create a clean output sinusoidal
voltage, high frequency harmonics such as the switching
harmonics of the voltage are filtered using a low pass filter. It
is worth mentioning that as the switching frequency increases,
the size of the filter decreases due to the fact that less filtering
is required; however, increasing switching frequency results on
increased switching losses of the converter.

The state space equations of the single phase inverter are

given in (1) and (2).

IZ(RL +RC)- RLRc

[L]

L(Z + Rj

c1i

L(Z +Rj) [V (t)] +[i]v

zc

+;

III. DQ ROTATING FRAME CONTROLLER

A. DQ Rotating Frame Concept

The DQ rotating frame transformation is most often used in
the analysis and control design of three phase converters.
Once a DQ model of the converter obtained, all time-varying
state variables become DC; thus making the analysis easier
because the converter can be treated as a dc-dc converter. Due
to the limitation of only one available phase in single phase
converters, this transformation cannot be realized unless a
second phase is created for every state variable in the circuit.
To create the required second phase, an imaginary
orthogonal circuit is constructed based on the Real circuit
model of the inverter. The imaginary circuit has the exact same
components and devices as the Real circuit does, however the
Imaginary circuit state variables are phase shifted by 900 with
respect to their counterparts in the Real circuit. These
imaginary state variables are obtained by differentiation in this
work. Specifically, by differentiating the filter voltage and
inductor current of the Real circuit.
Let us assume the output voltage of the Real circuit is given
in (4),
VR (t) = VR cos(Ct + 0)
(4)
where VR is the output voltage magnitude, X is the angular
frequency in rad/sec and i is the initial phase angle of the
variable in the system. The corresponding state variable for

642

the Imaginary circuit can be attained by differentiating (4).

Notice that the gain of (5) must be multiplied by -1/a because
of the differentiation method used to obtain the sine function.

VI (t) =VI sin(ol +

(5)

Fig. 3 illustrates the concept of the stationary c,B and rotating

DQ frames relative to some arbitrary state variable shown as
vector x . Notice that x can be decomposed into two
component vectors Xa and xfi. Then as vector X rotates
around the center, its components Xa and x
the
projections on the oc, axes vary in time accordingly. Let us
assume there is a rotating DQ coordinate that rotates with the
same angular frequency and direction as X, then the position
of x relative to its components, Xd and x is the same
regardless of time. It is clear that the xd and xq components
remain constant over the entire period and only depend on the
magnitude of x and its relative phase with respect to the d-q
rotating frame. Angle 0 is the rotating angle of the DQ frame
and it is defined by (6).

The switching network of a single phase inverter introduces

nonlinearity and discontinuity in the converter operation. For
the sake of analysis, an average model of the inverter must be
defined before developing its DQ model. An average model
provides a way to model the low-frequency components of the
waveforms in switching mode converters, accomplished by
removing the switching harmonics through the averaging of
waveforms over one switching period. Consequently, the
dynamics of the converter at much higher frequencies are
neglected, since the focus is only on the components that are
essential to the converter power flow and its control subsystem.
Average models can be used when the fundamental frequency
of operation is significantly smaller than its switching
frequency, in which case the model captures the effects that are
likely to be of significance for the analysis of the converter and
its control subsystem. Another benefit of using average models
is its fast simulation time compared with the switching model.
Oftentimes, it is desired to have an accurate and fast model of
the plant for control design due to intrinsic iterative process
involved in the design.
The state space average model equations of the inverter are
given in (10) and (11) and the average model is shown in Fig. 4
including the capacitor and inductor ESR. It must be noted that
the source current, ldc is the same as the Real circuit current IR
because the Imaginary circuit does not exist physically.
IL

dt IL

Figure 3. Stationary and rotating frames concept

'-)d

-,

IL

RC
R (+R]

[VC- R-

dt VC

(6)

+0

IL

[I
I

C(1+

Z)J +

Rcl )

IL

VC

VC

1cCL

LZ( + Z)J

VC
1
ZC(1+R'LvV

d, L
R

(10)

(1 1)

The relationship between stationary and rotating frames is

obtained from Fig. 3. Equation (7) defines the transformation
from stationary to rotating frame, and (8) from rotating frame
to stationary frame.
L

cos(cx)
sin(aX)

sin(x)]

=cos(o)

T-1

R,R+

d + |-~~~ -IV
=

cos(ax)

(7)

sin(ox)

(8)

rsin(wt) cos(ox)]

The DQ components of the output voltage state variable of

the inverter are obtained in (9) as an example, where the
inductor currents may be obtained similarly. Notice that Vap is
the magnitude of the inverter output voltage or simply VR.
LVd 1

Vq

TFVa8COs (a
L

0)-

FCos ()1

Figure 4. Single phase full-bridge inverter average model

The DQ model of the inverter can be developed once the

average model is obtained. The transformation matrices given
in (7) and (8) and the state space equations (10) and (11) of the
inverter are used to attain DQ equations which represent the
inverter dynamics.
d [Id

(9)

dt

Vd [Dd

Iqj

LDq L-co

ij[Id 1[Vd

|Z(

B. Single phase inverter average and DQ models

d FVd1
dt LVq

643

jI+R

[Id

LIq

iqL LVq
+

[0
r

c0

) [V9
][Vd

Oj[Vq

(12)
L

(+

,Z)

[I?

lFvdl

(13)

Equations (12) and (13) are the DQ equations which define

the DQ model of the inverter shown in Fig. 5.

First, the DQ components of the voltage and current are

generated by differentiating the state variables of the system
and applying the rotating transformation matrix given in (7).
Second, current and voltage compensators are designed using
two-pole two-zero compensators to obtain a better performance.
Finally, the duty cycles Dd and Dq are transformed back into
the stationary frame using (8), where naturally only the duty
cycle of the Real circuit is fed back to the power stage.

Figure 5. Single phase full-bridge inverter DQ model

Dd

If the ESR and the ESL are ignored, then (12) and (13) can
be simplified into (14) and (15). Notice that cross-coupling
terms are introduced into the model because of the
transformation from stationary to rotating frame. A process
commonly knows as Decoupling can be done in the controller
to decouple these terms easily.

(14)

I
F'd VdC FDd +F o Fd~
FVd~
L
0)
dt d0(X0=V,
Lf,+

0
-LV
OJIqJ
_IqJ ~DqJ-C
L-VqJ

15
(15)

Although the inverter has a time-varying nature, its DQ

model derived in this section is non-varying; hence only one
operating point is defined for the inverter while in steady-state
operation. To find the DC operating point of the model the
following equations are developed using Fig. 5.

Vd

'q OWCVd

(16)

(17)

Vd wLIq + RLK j
-

Dd

VI'
D

coLId +RLIq

dqdL
D4
D4

71

17

I' IVK

i~
r-

lP1

----------d--------l~~~~P
L
v l P1

<0F----1----1

Figure 6. Single phase inverter and its DQ controller

d FVd I IFd~+ 0 CO ~Vd~ FVd

dtlVqJ Cl/40~ 0)o OVJ0ZCIVqJ

I~ ~ ~ 1ql

two channels, one for D and one for Q. Each channel contains
compensators for voltage and current loops.

(19)

Vd,

To further simplify the analysis, the output voltage of the Q

channel Vq is set to zero by aligning the voltage vector to the D
axis.

C. DQ controller structure
A DQ controller can be designed now that the DQ model of
the single phase inverter is defined. Fig. 6 represents the
controller block as well as the power stage of the inverter. The
DQ model of the inverter was constructed in Matlab/Simulink
and the compensators were designed with the aid of SingleInput-Single-Output Tool (SISOTOOL) of Matlab. The DQ
controller design of the single phase inverter is similar to those
of dc-dc and three phase converters. The controller consists of

One important factor is the effect of the digital delay in the

system that must be considered in the design. Although there
are multiple factors which can affect how much the delay is,
they can all be summed under one delay. The total delay in the
system has to include the conversion time of the ADCs as well
as the DSP processing time and total signal transmission time
between the hardware and controller board. The largest bulk of
delay comes from the time required by the DSP to perform all
the calculations necessary for the controller. Although this time
can be minimized by proper coding techniques, there will be at
least an inherent one switching period delay from the time the
output states are measured until the duty cycles are ready to be
updated for the modulator. Analog controllers have infinite
response time and therefore their delay is zero; however they
are severely limited in the functions they can implement.
Fig. 6 illustrates how the total delay in the system was
accounted for when designing the controller. This delay was
added to the open-loop DQ model of the inverter before the
controller was designed. A simple delay is given in (20) where
Ts is the switching period.

H(S) delay

(20)

It is generally hard to accurately model the total delay of the

system, consequently a maximum one to two switching periods
must be adopted for the total digital delay of the entire system.
The maximum delay considered in this design was equal to two
switching period as the worse case and an 8th order transport
delay in Matlab was used to model this delay.
It must be noted that this delay will not affect the magnitude
of the plant transfer functions; however, it does create a roll-off
in the phase. In most cases this reduction in phase causes

644

TABLE 1 Single phase full-bridge inverter parameters

instability in the system due to the fact that the phase of the
closed loop system crosses -180 sooner than what is was
intended in the design. A simple way to counter the negative
effects of the delay is to reduce the controller gain; however
reducing the gain will reduces the bandwidth of the close-loop
system. As the bandwidth decreases, the response time of the
system decreases, thus creating a design trade-off situation.
The controller also needs to take into account the light-load
operation of the inverter. The inverter in light-load conditions
has a higher resonant peak at the resonant frequency of the
filter which affects the controller if this is not considered. For
the purpose of this study, the controller was designed with 10%
resistive light-load while its performance was studied later on
with different types of loads, such as nonlinear loads.
As mentioned before, each channel consists of a voltage and
common configuration is to have a fast inner
a slower outer voltage loop, where the current
reference is determined by the error in the outer voltage loop.
The current loop not only allows for a faster transient response
and improved THD for nonlinear loads, but it also provides an
inherent current limit used to protect the converter. This limit
can be used to stop the converter if the current exceeds some
predefined boundary when for example a short circuit appears
at the load. The form of the two-pole two-zero compensators
used for each channel is shown below.
current loop. A
current loop and

Gc-K

Gc

(s + NJz )(s + CDz 2)

Kdq (s

+ )p(2

(21)

The integrator provides zero steady-state error, while the

placed as high as possible to provide as much as
phase margin as possible. The zeros will provide a boost in
phase to compensate for the phase drop created by the digital
delay. The additional pole is used to provide loop-gain
attenuation after crossover frequency and it is placed at half of
the switching frequency.
zeros are

IV. DQ AND SWITCHING MODEL SIMULAITON RESULTS

Inverter Parameters
Inductor
Capacitor
ESR
ESL
fs
Vdc
Vout
Pout

500 pH
22 RF
Io nQ
100 mQ
20kHz, 40kHz, 60kHz, lOOkHz
300 V
120 Vrms
2.5 kW

The switching model of the inverter studied was built in

Saber. The controller was created entirely in MAST code to
mimic the same C code that would be implemented in the DSP.
In this was the discrete transfer functions of the compensators
created were later used in the hardware. The controller of the
model updates its duty cycles based on a digital clock running
at different switching frequencies as defined in Table. 1. It is
worth mentioning that the state variables, output voltage and
inductor currents of the inverter were sampled every switching
period. To create a true balanced waveform these signals must
be sampled in the middle of each switching period. By
sampling each waveform at the middle of the switching period,
an average discrete waveform is obtained that can be used to
create the cosine and sine waveforms required for
transformation. Although parasitic components of the inverter
such as those of switches were ignored in the switching model,
it is still a great tool to evaluate the performance and study the
proposed controller without the hardware in hand.
The simulation results of the inverter DQ model are shown
in Fig. 7 while the results of the switching model are shown in
Fig. 8 for a load step from full load to no-load and back. As it
can be seen from Fig. 7 and Fig. 8, the voltage overshoot is less
than 15% while reaching steady-state operation in less than
Ims. The inverter was then studied with a 50% step on the
reference of the output voltage with the simulation result
shown in Fig. 9.

A single phase full-bridge inverter is selected to verify the

performance of the proposed DQ controller and the inverter
parameters selected for this design are listed in Table. 1.

The switching frequency of the converter was assumed to be

system selected option; thus four different frequencies were
studied. The controller was designed for the lowest frequency
given in Table. 1 while studied for other switching frequencies
using its switching model. A current loop bandwidth of 2 to
3kHz is desirable for this converter while the bandwidth of the
voltage loop should be a tenth of the current loop bandwidth to
eliminate undesired interactions between both loops. Given the
above conditions, the DQ controller was designed with the aid
a

of Matlab/Simulink.

645

Figure 7. Output voltage of channel D, Vd and its sinusoidal waveform

under load step from Full-load to no-load (DQ model in Simulink)

xem4.L-h@g;--?;;?_
JGafdta1iuN\\IX:kL'>/i.._,,rS;X\.Js.X_0\'>TE&:Ja-t,X..<i\*rJ'8-=l.:.s,i,X;1-'k/O_FL.S7.,X-xJtgs5.':.,<,-;X/iS_X.F.'f't!
mS.

an 1L

.1 S

i_1i

f5 .

w-\ Jrjf

g.S

.,

;i

.. .

\.8 : .

z'l,L,2:.iFjr

Sg1 ,,,

.Si

stage. A DSP/FPGA based Universal Controller (UC) board is

used to implement the controller design [21]. Fig. 11 shows the
hardware setup for the test as well as the output voltage and
inductor current under nominal operating conditions. The
controller board is sitting on top of the inverter power stage. It
connects to the ADCs on the power stage through its I/O pins
while fiber optic cables transmit the gating signals form the
controller board to the gate drivers of the IGBT switches,
required for as a form of isolation, protection and noise
immunity. The state variables of the inverter are sampled in the
middle of the period and a digital modulator including
deadtime and deadtime compensation was implemented in the
FPGA of the digital controller board. The DQ controller was
programmed in the DSP using C-language and its performance
was verified under load steps as well as step commands of the
voltage reference.

';

.,

g1W

iz,

',

.,,

,,

,,,

0zf.S;ffi0,.>8./:,...g.,..
r 4>

,,,

X\_,,\'sr

i2r.

1i"i.f_Srr

,,

f 2}

,,,

i.

i'

2SM MRRWG rlggg xa Xgr. m1> > 1JWJ erw W XQm Ww } W> Xmw lm rf EBw Irf

Figure 8. Output voltage, inductor current and duty cycle waveforms of

the inverter under load step from Full-load to no-load
(Switching model in Saber)

Figure 11. Single Phase full-bridge inverter hardware and its output voltage
and inductor current waveforms under nominal operation
Figure 9. Output voltage and reference waveforms of the inverter under
50% reference variation (Switching model in Saber)

The proposed controller was also simulated with a nonlinear

load. A single phase diode bridge loaded with a parallel RC
circuit used as the load and output voltage THD of 2% was
observed. Fig. 10 shows the output voltage as well as the
inductor current waveforms under nonlinear load operation of
the converter.

The output voltage and reference duty cycle of the Real

circuit are shown in Fig. 12a, while Fig.12b shows the output
voltage reference stepped down to 50% with the proposed DQ
controller. It can be seen that the output voltage reaches
steady-state operation in less than 2ms. Load steps were also
performed by stepping it from full-load to no-load and the
results are shown in Fig. 13. Clearly, simulation and
experimental results are in close agreement showing that the
proposed DQ controller is capable of providing good dynamic
response under different conditions.

a)
b)
Figure 12. a) Output voltage and duty reference of the inverter under
nominal operation b) Output voltage and inductor current with
50% output voltage reference step-down
Figure 10. Output voltage and inductor current with a nonlinear load
(Switching model in Saber)

V. EXPERIMENTAL RESULTS

The 2.5 kW full-bridge single phase inverter prototype

shown in Fig. 11 was used to verify the control design. The
power stage contains the full-bridge, dc link and output
capacitors. The ADCs and all the sensors are also on the power

646

Figure 13. Output voltage and inductor current of the inverter under load
step (Full-load to no-Load)

VI. CONCLUSIONS

A DQ rotating frame controller was proposed in this paper

for a 2.5kW single phase full-bridge inverter used in small
standalone hybrid power systems. To achieve this
transformation, an imaginary orthogonal circuit was created by
differentiating the state variables from the original inverter
circuit in order to emulate the Q-axis dynamics. In the rotating
frame, the controller design for the single phase inverter
became easy and equivalent to that of three phase converters,
so that an infinite loop gain at the fundamental frequency of
the system and fast dynamic response could be achieved while
evaluating the inverter DQ controller system under different
loading conditions. The proposed controller was verified using
simulations and a 2.5 kW experimental prototype controlled
with a DSP/FPGA based digital control system. It is also worth
mentioning that the controller design must take into account
the differentiation of noisy signals, where the implementation
of analog and digital filters will help cope with this greatly.
ACKNOWLEDGMENT

This work was supported primarily by the Engineering

Research Center Program of the National Science Foundation
under NSF Award number EEC-973 1677 and the CPES
Industry Partnership Program.
REFERENCES
[1]
[2]

[3]

[4]

[5]

[6]

[7]

[8]
[9]

[10]

Bekiarov, S.B and Emadi, A, "Uninterruptible power supplies:

classification, operation, dynamics, and control", IEEE Trans.
APEC2002, Vol 1, 10-14 March 2002 Page(s):597 - 604.
Yaosuo Xue, Liuchen Chang, Sren Baekhj, Kjaer Bordonau, J, Shimizu,
T, "Topologies of single-phase inverters for small distributed power
generators: an overview" IEEE Transactions on Power Electronics, Vol.
19, Issue 5, Sept. 2004 Page(s):1305 - 1314.
Zmood, D.N, Holmes, D.G, "Stationary frame current regulation of
PWM inverters with zero steady-state error" IEEE Transactions on
Power Electronics, Vol. 18, Issue 3, May 2003 Page(s):814 - 822.
Zhang R, Cardinal M, Szczesny, P, Dame M "A grid simulator with
control of single-phase power converters in D-Q rotating frame" Power
Electronics Specialists Conference, 2002. PESC 02. 2002 IEEE 33rd
Annual, Vol. 3, 23-27 June 2002 Page(s):1431- 1436.
Jiann-Fuh Chen, Ching-Lung Chu, "Combination voltage-controlled and
current-controlled PWM inverters for UPS parallel operation", IEEE
Transactions on Power Electronics, Vol. 10, Issue 5, Sept. 1995
Page(s):547 - 558.
Abdel-Rahim N.M, Quaicoe J.E, "Analysis and design of a multiple
feedback loop control strategy for single-phase voltage-source UPS
inverters", IEEE Transactions on Power Electronics, Vol. 11, Issue
4, July 1996 Page(s):532 - 541.
Zhongyi He, Mingzhu Li, Yan Xing, "Core techniques of digital control
for UPS", Industrial Technology, 2005. ICIT 2005. IEEE International
Conference, 14-17 Dec. 2005 Page(s):546- 551.
Ryan M.J, Brumsickle W.E, Lorenz R.D, "Control topology options for
single-phase UPS inverters", IEEE Transactions on Industry Applications,
Vol. 33, Issue 2, March-April 1997 Page(s):493 - 501.
Mihalache L, "DSP control method of single-phase inverters for UPS
applications", Applied Power Electronics Conference and Exposition,
2002. APEC 2002. Seventeenth Annual IEEE Vol. 1, 10-14 March 2002
Page(s):590 - 596.
Shih-Liang Jung, Hsiang-Sung Huang, Meng-Yueh Chang, Ying-Yu
Tzou, "DSP-based multiple-loop control strategy for single-phase
inverters used in AC power sources", Power Electronics Specialists
Conference, 1997. PESC '97 Record., 28th Annual IEEE, Vol. 1, 22-27
June 1997 Page(s):706 - 71.

[11] Hiti S. and Boroyevich D. "Small signal modeling of Three-Phase PWM

Modulators" Proceedings of the 1996 IEEE Power Electronics
Specialists Conference, vol. 1, pp. 550-555.
[12] Hiti S, Boroyevich D, Cuadros C, "Small-signal modeling and control of
three-phase PWM converters" Industry Applications Society Annual
Meeting, 1994., Conference Record of the 1994 IEEE, 2-6 Oct. 1994
Page(s):1143 - 1150 vol.2.
[13] C. D. Manning, "Control of UPS Inverters," in IEE Colloquium on
Uninterruptible Power Supplies, 1994, Page(s): 3/1 - 3/5.
[14] Y. Y. Tzou, R. S. Ou, S. L. Jung, M. Y. Chnag, " High-performance
programmable AC power source with low harmonic distortion using
DSP-based repetitive control technique", IEEE Transaction on Power
Electronics, Vol. 12, July 1997, Page(s):715-725.
[15] A. Kawamura, Yokoyama, "Comparison of five control methods for
digitally feedback controlled PWM inverters," EPE, 1991, Page(s): 35-40
[16] A. Kawamura, T. Haneyoshy, R. G. Hoft, "Deadbeat controlled PWM
inverter with parameter estimation using only voltage sensor", Proc.
IEEE Power Electronics Specialists Conference, 1986, Page(s): 576 583.
[17] A. von Jouanne, P.N. Enjeti, D. J. Lucas, "DSP control of high power
UPS systems feeding non-linear loads", IEEE Transaction on Industry
Electronics, Vol. 43, Feb 1996, Page(s): 121-125.
[18] P. Mattavelli, "Synchronous-frame harmonic control for highperformance AC power supplies", IEEE Transaction on Industry
Application, May/June 2001, Page(s): 864-872.
[19] S. Hiti, D. Borojevic, R. Ambatipudi, R. Zhang, J. Yimin, "Average
current control of three-phase PWM boost rectifier", Power Electronics
Specialist Conference, 1995, PESC '95 Record, 26th Annual IEEE, Vol.1
18-22 June 1995, Page(s): 131 -137.
[20] S. Hiti, D. Borojevic, "Control of front-end three-phase boost rectifier",
Applied Power Electronics Conference and Exposition, 1994, APEC 94,
Conference Proceedings, I0th Annual IEEE, Vol. 2, Feb 1994, Page(s):
927-933.
[21] J. Francis, "A Synchronous Distributed Digital Control Architecture for
High Power Converters", Mar 2004, Master's Thesis, Master of Science,
Electrical and Computer Engineering, Virginia Polytechnic Institute and
State University, Blacksburg, VA 24061

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