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OS Chap8
OS Chap8
Chap8 Memory
Management
National Tsing-Hua University
2015, Fall Semester
Overview
Background
Swapping
Contiguous Allocation
Paging
Segmentation
Segmentation with Paging
Background
Main memory and registers are the only storage
CPU can access directly
Collection of processes are waiting on disk to be
brought into memory and be executed
Multiple programs are brought into memory to
improve resource utilization and response time
to users
A process may be moved between disk and
memory during its execution
Outline
Compile
int data;
main( ) {
data = 3 * 7;
print(data);
}
Source Program
Chapter8 Memory Management
.BASE 0x1000
.START
PUSH
AX
MOVE
AX, 3
MULT
AX, 7
MOVE
(0x1018), AX
CALL
print, (0x1018)
POP
AX
.END
.SPACE (4)
0x1000
0x1010
PUSH
MOVE
MULT
MOVE
CALL
POP
AX
AX, 3
AX, 7
(0x1018), AX
print, (0x1018)
AX
0x1018
Disk Image
Operating System Concepts NTHU LSA Lab
Memory Content
6
Compile
int data;
main( ) {
data = 3 * 7;
print(data);
}
Source Program
Chapter8 Memory Management
.START
PUSH
AX
MOVE
AX, 3
MULT
AX, 7
MOVE
(.BS+0x18), AX
CALL
print, (.BS+0x18)
POP
AX
.END
.SPACE (4)
0x2000
0x2010
PUSH
MOVE
MULT
MOVE
CALL
POP
AX
AX, 3
AX, 7
(0x2018), AX
print, (0x2018)
AX
0x2018
Disk Image
Operating System Concepts NTHU LSA Lab
Memory Content
7
Compile
int data;
main( ) {
data = 3 * 7;
print(data);
}
Source Program
Chapter8 Memory Management
.START
PUSH
AX
MOVE
AX, 3
MULT
AX, 7
MOVE
(0x18), AX
CALL
print, (0x18)
POP
AX
.END
.SPACE (4)
Disk Image
0x2000
0x2010
PUSH
MOVE
MULT
MOVE
CALL
POP
AX
AX, 3 Virtual addr.
AX, 7
(0x18), AX
print, (0x18)
AX
0x2018
Physical addr.
Memory Content
8
Physical address
module
compile-time & load-time address binding
logical addr = physical addr
10
Outline
11
Dynamic Loading
12
13
Dynamic Loading
Disk image
Memory content
After B() called After C() called After C() ends
Init
Function A() {
B();
}
Function A()
Function B() {
C();
}
Function C() {
.;
}
Chapter8 Memory Management
Function A()
Function A()
Function A()
Function B()
Function B()
Function B()
Function C()
14
Static Linking
Program A
Program B
Memory
main ()
Libc.lib
main ()
Libc.lib
Program C
main ()
main ()
main ()
main ()
Libc.lib
Libc.lib
Libc.lib
Libc.lib
15
Dynamic Linking
Memory
main ()
stub
shared by everyone
A stub is included in the program inmemory image for each lib reference
Stub call check if the referred lib is
in memory if not, load the lib
execute the lib
DLL (Dynamic link library) on Windows
Chapter8 Memory Management
main ()
main ()
stub
stub
Libc.lib
16
Review Slides ( 1 )
17
Outline
18
Swapping
19
Swapping
context switch
different from
Free up memory
Roll out, roll in: swap lower-priority process with a
higher one
20
Swapping (contd)
21
22
Contiguous Memory
Allocation
23
Memory Allocation
Fixed-partition allocation:
number of partitions
is bounded by the
Variable-size partition
24
25
26
Fragmentation
External fragmentation
OS
600
700
P1
Internal fragmentation
Solution: compaction
External
900
Internal
OS
250
P1
500
P2
750
P2
1000
P3
1000
Compaction
0
OS
300
800
900
1000
P1
P2
27
Review Slides ( 2 )
Swapping?
Contiguous
memory allocation?
28
Non-Contiguous Memory
Allocation Paging
29
Paging Concept
Method:
Benefit:
30
Paging Example
Page table:
physical memory
A structure maintained by OS for each process
Page table includes only pages owned by a process
A process cannot access memory outside its space
31
(p)
32
5*(1KB)+20 =1,010,000,000,000+0,000,010,100
=1,010,000,010,100
MMU
33
Address Translation
34
Free Frames
35
/ page
4KB / 8KB page is commonly used
Internal fragmentation?
page fault)
36
Paging Summary
37
One for the page table and one for the real address
38
Associative Memory
39
MMU
40
41
Review Slides ( 3 )
memory frame? page? typical page size?
page table? virtual physical translation?
What is PTBR register? When to update it?
Memory reads # for each reference?
HW support for paging speed?
associative memory
TLB
42
Memory Protection
43
Potential issues:
12290
valid but illegal
Chapter8 Memory Management
10466
16383
44
Shared Pages
45
46
Solutions:
Hierarchical Paging
Hash Page Tables
Inverted Page Table
47
Hierarchical Paging
48
Level-2
212
210
000100
001000
210
101100
49
50
0000001000
010001001001
Bytes
0000010000
0000001000
0000010000
0000011000
23
entries
0000011000
0000100000
0010000000
0010100000
0000101000
0000110000
24
0000111000
entries
0011100000
.
.
.
1011100000
0001000000
0010
0011100000
01001
.
.
.
0001000000
51
64-bit Address
Examples:
SPARC (32-bit)
52
Hash function
f(p) = p%5
Chapter8 Memory Management
3
4
14
59
53
54
Hash Array
(size of a single page)
Next Ptr
Page# Frame#
M .
Buckets
Hash Array
(size of a single page)
Next Ptr
Page# Frame#
.
.
.
N
Source: M. Talluri, M. D. Hill, and Y. A. Khalidi. 1995. A new page table for 64-bit
address spaces. SIGOPS Oper. Syst. Rev. 29, 5 (December 1995), 184-200.
http://pages.cs.wisc.edu/~markhill/papers/sosp95_pagetables.pdf
Chapter8 Memory Management
55
56
57
Review Slides ( 4 )
58
Non-Contiguous Memory
Allocation Segmentation
59
Segmentation
Memory-management
scheme that supports
user view of memory
A program is a collection
of segments. A segment
is a logical unit such as:
main program
function, object
local/global variables,
stack, symbol table,
arrays, etc
60
61
Segmentation Table
62
Segmentation Hardware
10000
01000
base
d
Seg0
Seg1
00100
01100
Seg2
Chapter8 Memory Management
63
Segment
Page:
10000
01000
base
d
00100
Seg0
Seg1
01100
Seg2
64
Example of Segmentation
65
Sharing of Segments
66
67
Segmentation with
Paging
68
Basic Concept
Apply segmentation in logical address space
Apply paging in physical address space
Process
Segments
Pages
Page/
Frame
logical address
Chapter8 Memory Management
physical address
69
Address Translation
(seg0,20)
Chapter8 Memory Management
(x100020)
Operating System Concepts NTHU LSA Lab
(x500020)
70
Logical address:
offset
32
16
segment number
Chapter8 Memory Management
13
71
Segment descriptor
72
4MB
Chapter8 Memory Management
73
Example Question
Let the physical mem size is 512B, the page size is 32B and the
logical address of a program can have 8 segments. Given a 12
bits hexadecimal logical address 448, translate the addr.
With blow page and segment tables.
linear addr:010111110, phy addr:001011110
page offset
010001001000 Seg offset
Seg#
010111110
page#
4
1
3
0
5
2
8
000110110
010110110
001110110
000110110
100110110
100000100
010110110
000010110
001011110
Review Slides ( 5 )
Paging
Length
Fixed
Fragmentation Internal
segmentation
Varied
External
Table entry
View
Physical memory
User program
Paged segmentation?
75
Chap 8
Problem Set:
Interesting Reading:
76