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Project Programmed Using Avrstudio
Project Programmed Using Avrstudio
Project Programmed Using Avrstudio
ECE DEPARTMENT
DONE BY
P.MIHIRA
07241A0409
Chapter 1
INTRODUCTION
In this new world of automation while designing an autonomous robot, we often come
across a major problem that occurs is the obstacles that come across in the path of the robot. So,
there is a necessity for the designer to provide a proper mechanism to the robot so that the
obstacles are avoided. The obstacles can be human being or any non-living rigid obstacles.
The objective of the project was to design and build an autonomous robot which is
capable of moving wirelessly under assigned directions. We made use of four motors under
which our robot runs.The robot status is manipulated by the micro controller and accordingly the
robot is driven forward or backward or to turn right or left. . Applications of the project include
remote surveillance by adding a camera in hazardous and inaccessible areas. The decision to take
up the project was based on numerous factors which include the potential future applications and
also the complexity in designing and building the robot.
Our main challenge during the project was the 2months time constraint. We therefore
unable to incorporate additional features into our robot as we had anticipated.Hence we decided
to complete the main sections indicated in our design documentation report and are proud to say
that the majority of the design document objectives were met.This report includes a fine outline
of all the hardware equipment and softwares used in successful completion of the project. It
finally presents the reader with the results and concludes with future applications.
Chapter 2
INTRODUCTION TO ATMEGA 8515
2.1
TheMicrocontroller
2.2 Introduction
The AVR family of microcontrollers is made by a company called ATMEL. AVR is not
an acronym as per ATMEL. However, a story goes that they stand for the initials of the two
designers who made the first AVR microcontroller. AVR microcontrollers are among the most
popular microcontrollers for both hobbyists as well as serious designers.
The Microcontroller we are going to work on will be the ATmega8515. The basic
requirement of any Microcontroller is that it should be able to read inputs and set outputs. The
microcontroller pins are designed to be either input or output. In the program, we specify which
pins are inputs and which pins we want as outputs. All pins are called general-purpose I/O pins,
or GPIO pins.
The ATmega8515 has 35 GPIO lines. There are some of the general purpose I/O lines
that have alternate functions such as serial transmit, serial receive and so on. The GPIO lines are
clubbed in groups of eight. Each group of 8 I/O lines is called a port.
PORTA
PORTB
PORTC
PORTD
See for the notch on the chip. Pin on
the left of the notch is pin1
VCC=5V
PORTB
PORTA
ATmeg
a8515
PORTD
PORTC
GND
Figure: 2.2.1Ports of ATmega8515
The ATmega8515 we are going to work on is a 40-pin IC. It operates on 5V. Pin no. 40 is
VCC (5V) and pin no. 20 is GND. A notch on the top of the IC will help to make out which pin
is no. 1. It is important to know which pin is 1, since placing the IC upside down in the socket
and powering it up will damage the IC.
2.3 Pin Diagram of ATmega8515
Port C (PC7..PC0): Port C is an 8-bit bi-directional I/O port with internal pull-up resistors
(selected for each bit). The Port C output buffers have symmetrical drive characteristics with
both high sinkand source capability. As inputs, Port C pinsthat are externally pulled low will
sourcecurrent if the pull-up resistors are activated. The Port C pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port D (PD7..PD0): Port D is an 8-bit bi-directional I/O port with internal pull-up resistors
(selected for eachbit). The Port D output buffers have symmetrical drive characteristics with both
high sink and sourcecapability. As inputs, Port D pins that are externallypulled low will source
current if the pull-up resistors are activated. The Port D pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
RESET: Reset input. A low level on this pin for longer than the minimum pulse length will
generate a reset, even if the clock is not running.
XTAL1: Input to the inverting Oscillator amplifier and input tothe internal clock operating
circuit.
The AVR core combines a rich instruction set with 32 general purpose working registers.
All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two
independent registers to be accessed in one single instruction executed in one clock cycle. The
resulting architecture is more code efficient while achieving throughputs up to ten times faster
than conventional CISC microcontrollers.
The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and
Interrupt system to continue functioning. The Power-down mode saves the Register contents but
freezes the Oscillator, disabling all other chip functions until the next interrupt or hardware reset.
In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is
sleeping. This allows very fast start-up combined with low-power consumption.
The ATmega8515 is supported with a full suite of program and system development
tools including: C Compilers, Macro assemblers, Program debugger/simulators, In-circuit
emulators and evaluation kits.
The lower 608 Data Memory locations address the Register File, the I/O Memory, and
the internal data SRAM. The first 96 locations address the Register File and I/O Memory, and
the next 512 locations address the internal data SRAM.
An optional external data SRAM can be used with the ATmega8515. This SRAM will
occupy an area in the remaining address locations in the 64K address space. This area starts at
the address following the internal SRAM. The Register File, I/O, Extended I/O and Internal
SRAM occupies the lowest 608 bytes in normal mode, so when using 64KB (65536 bytes) of
External Memory, 64928 Bytes of External Memory are available.
When the addresses accessing the SRAM memory space exceeds the internal
Datamemory locations, the external data SRAM is accessed using the same instructions as for
the internal Data memory access. When the internal data memories are accessed, the read and
write strobe pins (PD7 and PD6) are inactive during the whole access cycle. External SRAM
operation is enabled by setting the SRE bit in the MCUCR Register.
Accessing external SRAM takes one additional clock cycle per byte compared to access
of the internal SRAM. This means that the commands LD, ST, LDS, STS,LDD, STD, PUSH,
and POP take one additional clock cycle. If the Stack is placed in external SRAM, interrupts,
subroutine calls and returns take three clock cycles extra because the two-byte Program Counter
is pushed and popped, and external memory access does not take advantage of the internal pipeline memory access. When external SRAM interface is used with wait-state, one-byte external
access takes two, three, or four additional clock cycles for one, two, and three wait-states
respectively. Interrupts, subroutine calls and returns will need five, seven, or nine clock cycles
more than specified in the instruction set manual for one, two, and three wait-states.
The five different addressing modes for the Data memory cover: Direct, Indirect with
Displacement, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the
Register File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space. The Indirect with Displacement mode
reaches 63 address locations from the base address given by the Y- or Z-register. When using
register indirect addressing modes with automatic pre-decrement and post increment, the address
registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O Registers, and the 512 bytes
ofinternal data SRAM in the ATmega8515 are all accessible through all these addressing modes.
I/O PORTS:
Introduction:
All AVR ports have true Read-Modify-Write functionality when used as general digital
I/O ports. This means that the direction of one port pin can be changed without unintentionally
changing the direction of any other pin with the SBI and CBI instructions. The same applies
when changing drive value (if configured as output) or enabling/disabling of pull-up resistors (if
configured as input). Each output buffer has symmetrical drive characteristics with both high
sink and source capability. The pin driver is strong enough to drive LED displays directly. All
port pins have individually selectable pull-up resistors with a supply-voltage invariant resistance.
All I/O pins have protection diodes to both VCC and Ground.
The DDxn bit in the DDRx Register selects the direction of this pin. If DDxn is written
logic one, Pxn is configured as an output pin. If DDxn is written logic zero, Pxn is configured as
an input pin. If PORTxn is written a logic one when the pin is configured as an input pin, the
pull-up resistor is activated. To switch the pull-up resistor off, PORTxn has to be written a logic
zero or the pin has to be configured as an output pin. The port pins are tri-stated when a reset
condition becomes active, even if no clocks are running. If PORTxn is written a logic one when
the pin is configured as an output pin, the port pin is driven high (one). If PORTxn is written a
logic zero when the pin is configured as an output pin, the port pin is driven low (zero). When
switching between tri-state ({DDxn, PORTxn} = 0b00) and output high ({DDxn, PORTxn} =
0b11), an intermediate state with either pull-up enabled ({DDxn, PORTxn} = 0b01) or output
low ({DDxn, PORTxn} = 0b10) must occur. Normally, the pull-up enabled state is fully
acceptable, as a high-impedant environment will not notice the difference between a strong high
driver and a pull-up. If this is not the case, the PUD bit in the SFIOR Register can be set to
disable all pull-ups in all ports.
Switching between input with pull-up and output low generates the same problem. The
user must use either the tri-state ({DDXN, PORTXN} = 0b00) or the output high state ({DDXN,
PORTXN} = 0b11) as an intermediate step.
as output. To do this, each port has a Data Direction Register, which will allow
DDRX
0 bit
0
Inputs
Outputs
By putting a 1 in a particular bit position of the DDR register of a port you are
configuring the port line corresponding to that bit as outpu.t
By putting a 0 in a particular bit position of the DDR register of a port you are
configuring the port line corresponding to that bit as input.
It is not necessary that all the lines of a port have to be made either input or output. You
can have any combination of inputs/outputs as per your requirement in a single port. For
example, in the figure above, the lower nibble lines are outputs while the lines in the upper
nibble are inputs.
Writing to ports:
After configuring the ports, we can write a 0 or a 1 to the port lines we have configured
as outputs. Each port has a separate register called PORTX which will enable you to make
individual lines in the port high or low.
0 bit
7 bit
PORTX
Low
High
7 bit
PINX
0 bit
1
If the above register is for PORTB, the following piece of code will read the PORTB
pins:
Unsigned char status;
Status = PINB;
The value of status will be 0xD5
When switches are connected to port lines, their status can be read using the PINX
register.When the switch is not pressed, the status of port line will be 1 and when the switch is
pressed, the status of the port line will be 0.
A typical snippet of code to declare switches as inputs and read their status will be:
DDRC = 0x00 ;// make port C lines as input
PORTC = 0xFF;// enable pull-ups on all the PORTC lines
data = PINC; // read the status of PORTC
USART:
The Universal Synchronous and Asynchronous serial Receiver and Transmitter
(USART) is a highly flexible serial communication device.
However, the receive buffering has two improvements that will affect the compatibility in
some special cases like
A second Buffer Register has been added. The two Buffer Registers operate as acircularFIFO
buffer. Therefore the UDR must only be read once for eachincoming data. More important is the
fact that the Error Flags (FE and DOR) and the ninth data bit (RXB8) are buffered with the data
in the receive buffer. Therefore the status bits must always be read before the UDR Register is
read. Otherwise the error status will be lost since the buffer state is lost.
The Receiver Shift Register can now act as a third buffer level. This is done byallowing the
received data to remain in the serial Shift Register (see Figure 64) if the Buffer Registers are full,
until a new start bit is detected. The USART is therefore more resistant to Data Overrun (DOR)
error conditions.
The following control bits have changed name, but have same functionality and register location:
CHR9 is changed to UCSZ2
OR is changed to DOR
Internal clock generation is used for the asynchronous and the synchronous master modes
of operation. The USART Baud Rate Register (UBRR) and the down-counter connected to it
function as a programmable presale or baud rate generator. The down-counter, running at system
clock (FOSC), is loaded with the UBRR value each time the counter has counted down to zero or
when the UBRRL Register is written. A clock is generated each time the counter reaches zero.
This clock is the baud rate generator clock output (= FOSC/(UBRR+1)). The Transmitter divides
the baud rate generator clock output by 2, 8, or 16 depending on mode. The baud rate generator
output is used directly by the Receivers clock and data recovery units. However, the recovery
units use a state machine that uses 2, 8, or 16 states depending on mode set by the state of the
UMSEL, U2X, and DDR_XCK bits.
Table: 2.5.2 Calculation of baud rate and UBRR value as per Operating modes
Note: 1. The baud rate is defined to be the transfer rate in bit per second (bps).
BAUD Baud rate (in bits per second, bps)
fOSC System Oscillator clock frequency
UBRR Contents of the UBRRH and UBRRL Registers, (0-4095)
Chapter 3
MOTOR DRIVER
3.1 Introduction
Motor Drivers are the ICs used to drive motors when interfaced with Microcontrollers.
These ICs give a higher voltage output ranging from 4.5V to 36V for logic 1 input. The motor
driver ICs generally used L293D, ULN2003 series, etc.
These ICs are used to drive both DC motors and stepper motors.
3.2 L293D IC
The L293 and L293D are quadruple high-current half-H drivers. The L293 is designed to
provide bidirectional drive currents of up to 1 A at voltages from 4.5 V to 36 V. The L293D is
designed to provide bidirectional drive currents of up to 600-mA at voltages from 4.5 V to 36 V.
Both devices are designed to drive inductive loads such as relays, solenoids, dc and bipolar
stepping motors, as well as other high-current/high-voltage loads in positive-supply applications.
All inputs are TTL compatible. Each output is a complete totem-pole drive circuit, with a
Darlington transistor sink and a pseudo-Darlington source. Drivers are enabled in pairs, with
drivers 1 and 2 enabled by 1,2EN and drivers 3 and 4 enabled by 3,4EN. When an enable input is
high, the associated drivers are enabled and their outputs are active and in phase with their
inputs. When the enable input is low, those drivers are disabled and their outputs are off and in
the high-impedance state. With the proper data inputs, each pair of drivers forms a full-H (or
bridge) reversible drive suitable for solenoid or motor applications. On the L293, external highspeed output clamp diodes should be used for inductive transient suppression. A VCC1 terminal,
separate from VCC2, is provided for the logic inputs to minimize device power dissipation. The
L293 and L293D are characterized for operation from 0C to 70C.
Similarly, the input pins 10, 5 and their respective pins 11, 4 are enabled by enabling EN2 i.e.
giving vcc to pin 9.
Chapter 4
4.1 Introduction
The board is designed in such a way that all the required peripherals can be interfaced.It
should have the facility of on board programming.Importantly it should have the scope for future
expansion. This is done by providing flexibility of interfacing multiple sensors and other
Peripheral devices like the RF control and LCD in this case.
Eagle is CAD tool or Platform that enables us to design PCBs as per our requirement.We
design the circuit of the requirement by adding and connecting the required components on a
sheet called schematic.It provides flexibility of designing or creating library of the components
which are not available in the default list of components.Its a very user friendly CAD processing
tool.
4.4 Schematic Diagram
Figure: 4.4.3 Schematic Diagram of Motor control and sensor ports interfaced with8515
Figure: 4.4.4 Schematic Diagram of MAX232 IC for Serial Communication and on-board
Programming
4.5 Board Diagram
Chapter 5
PROGRAMMING THE MICROCONTROLLER
Edit and debug in the same application windows. Faster error tracking.
2.
Breakpoints are saved and restored between sessions, even if code are
edited
The startup wizard is displayed every time you start AVR Studio 4. From within this
dialog you can quickly reopen the latest used projects, change debug platform/device setup or
create a new project. Just double-click on the wanted project and it will automatically open and
restore to its last settings.
New project
Double-click on the AVR Studio icon on your Desktop
Click on New Project tab in the pop-up window and the following screen opens up.
The following screen opens up. Type in the name of your project myrobot. Check the
boxes Create file and Create Folder. Creating separate folders for different projects will help
you maintain them properly. Since the folder does not exist, AVR Studio will prompt you saying,
the folder does not exist and it will create a new folder. Say yes to this prompt.
Click on Finish.
Device selection
We have to select which device we are going to use , in this project we use AVR
Simulator as debug platform and AT mega 8515 as device.
AVR Studio creates a folder called myrobot in the path specified by you and a project
Key in the blinking.cprogram. Click on the File Save icon. Now you have written C
code, you need to compile the program. For this, you need to select the microcontroller and the
speed at which it works. The microcontroller we are using is ATmega8515 and the speed at
which it is working is 8MHz.These two parameters are set as follows in the Project Options in
Device and Frequency options.
ConfigurationOptions icon.
Now, that we have set the Project Options, we will compile it. This can be done by clicking on
the Build Active Configuration icon.
When the Build is successful, you are intimated that the Build has gone through with 0 warnings.
This display will be in the Build Window.
If there are errors, you will need to correct those and do a Build again. The Build will create
many files, but the one we are interested in will be the .hexfile. This is a file whichcan be
downloaded to the GRIET trainer kit and executed.
RECEIVER PROGRAM
#include <avr/io.h>
#include<util/delay.h>
Void uart_init ( );
Unsigned char start, address, data, checksum;
int main (void)
{
DDRB= oxff; // port B motor I/P
Port B=oxff; //write to port B
Uart_init( );
Port B = oxAA;
_delay_ms (3000);
Port B = oxff;
_delay_ms(1000);
Port B=ox55;
_delay_ms (3000);
PortB = oxff;
_delay_ms (1000) ;
PortB = ox22;
_delay_ms (3000);
While(1)
{
While (!(USRA & ox80));
Start=UDR; //start byte
if (start==oxaa)
{
While (!(UCSRA & ox80);
address=UDR ; //address byte
While (!(UCSRA & ox80));
data= UDR; //data byte
TRANSMITTER PROGRAM:
#include <avr/io.h>
#include<util/delay.h>
Void uart_init ( );
}
Void txchar(unsigned chartx)
{
While(!(UCSRA&0x20));
UDR=tx;
}