Professional Documents
Culture Documents
Pss Win-Pro: Programming Manual - Item No. 20 363-07
Pss Win-Pro: Programming Manual - Item No. 20 363-07
All rights to this documentation are reserved by Pilz GmbH & Co. KG. Copies may be made
for internal purposes.
Suggestions and comments for improving this documentation will be gratefully received.
Pilz, PIT, PMI, PNOZ, Primo, PSEN, PSS, PVIS, SafetyBUS p, SafetyEYE,
SafetyNET p, the spirit of safety are registered and protected trademarks of
Pilz GmbH & Co. KG in some countries.
Schnittmarke
EB
00.00 - 08.242)
32.00 - 95.243)
132.00 - 195.246)
EW
00.00 - 08.162)
32.00 - 95.163)
132.00 - 195.166)
00.00 - 08.312)
32.00 - 95.313)
132.00 - 195.316)
00.00 - 08.242)
32.00 - 95.243)
132.00 - 195.246)
00.00 - 08.162)
32.00 - 95.163)
132.00 - 195.166)
00.00 - 08.242)
32.00 - 95.243)
132.00 - 195.246)
2)
Indirect
PB
Set
Direct
Direct
00.00 - 08.312)
32.00 - 95.313)
132.00 - 195.316)
Read
Read
AW
Access Addressing
Description
Write
Description
Address range
Indirect
Address range
AB
Type
Set
Type
Write
Overview of Operands: FS
MB
064.00 - 099.24
114.00 - 114.244)
130.00 - 255.244)
Flag byte
MW
064.00 - 099.16
114.00 - 114.164)
130.00 - 255.164)
Flag word
100.00 - 104.31
105.00 - 109.314)
x1)
MB
x1)
100.00 - 104.24
105.00 - 109.244)
MW
100.00 - 104.16
105.00 - 109.164)
x1)
110.00
110.01
111.00
111.01
111.02
111.03
112.00
112.01
112.02
112.03
112.04
112.05
113.00
113.01
PW
00.00 - 08.16
32.00 - 95.163)
132.00 - 195.166)
DB
x1)
DB
010 - 255
Data block
x1)
DL
0000 - 1023
(bit 8 - 15)
DR
0000 - 1023
(bit 0 -7)
DW
0000 - 1023
Data word
(bit 0 - 15)
FB
001 - 255
Function block
KB
0-255
Constant
Byte
KC
Constant
Character (2 characters)
KF
-32768...+32767
Constant
KH
0000 - FFFF
Constant
Hexadecimal figure
KM
16 bit
Constant
Bit state
KY
Constant
2 Byte
064.00 - 099.31
114.00 - 114.314)
130.00 - 255.314)
Flags
1)
2)
3)
4)
5)
6)
Access Addressing
Description
Read
Direct
Set
Access Addressing
113.02
113.03
113.04
113.05
113.06
113.08
MB
114.00, 114.08,
114.16, 114.24
x4)
MW
114.00, 114.16
x4)
115.00 - 115.31
MB
115.00 - 115.24
MW
115.00 - 115.16
116.00 - 116.31
MB
116.00 - 116.24
MW
116.00 - 116.16
117.00 - 117.31
MB
117.00 - 117.24
MW
117.00 - 117.16
Indirect
Address range
Write
Type
Continued
Access Addressing
OB
010 - 073
OB
OB
OB
200 - 231
PB
001 - 255
Program block
SB
001 - 255
064 - 127
Timer
XW
00000-00071
064 - 127
Counter
ZW
064 - 127
x
x
Direct
Read
Indirect
Description
Set
Address range
Write
Type
Contents
Introduction
1-1
Definition of symbols
1-2
Basics
2-1
Project
Programming languages
Blocks
2-1
2-3
2-4
Structure
Organisation blocks (OB)
Organisation blocks for the FS section
Organisation blocks for the ST section
Program blocks (PB)
Function blocks (FB)
Parameters
Programming and calling FBs
Function blocks from Pilz
Standard function blocks (SB)
Parameters
Programming and calling SBs
Standard function blocks from Pilz
Data blocks (DB)
Approved blocks for the FS section
Encrypted blocks
Segments
Networks
Operations
Operands
Flags
Constants
Access to inputs and outputs
Periphery access via process images
Direct periphery access
Direct periphery access to bit modules
Direct periphery access to word modules (ST section only)
Access rights of the FS and ST section
2-4
2-5
2-5
2-8
2-10
2-11
2-11
2-13
2-16
2-17
2-17
2-18
2-18
2-19
2-23
2-24
2-24
2-25
2-25
2-25
2-25
2-26
2-26
2-26
2-27
2-28
2-28
2-29
Contents
Addressing
Absolute addresses
Tags
Direct addressing
Indirect addressing
Set addressing
Free addressing in the FS section
Free addressing in the ST section
Offset fr freie Adressierung
Positive logic
Program cycle
2-29
2-30
2-31
2-32
2-34
2-36
2-37
2-38
2-39
2-40
Program structure
Linear programming
Structured programming
Alarm processing
Alarm processing in the FS section
Alarm processing in the ST section
Error processing
Error processing in the FS section
Error processing in the ST section
2-40
2-40
2-41
2-42
2-42
2-43
2-44
2-44
2-44
IL
3-1
Programming in IL
3-1
Structure of an operation
Segment operation
Comments
Accumulator, auxiliary accumulator and RLO
Programming rules
3-1
3-1
3-2
3-2
3-3
Operations in IL
3-4
Overview
Bit operations
Timers and counters
Byte/word operations
Load and transfer operations
Convert operations
Compare operations
Arithmetic operations
Logic operations
Shift and rotate operations
2
2-29
3-4
3-7
3-16
3-20
3-20
3-22
3-24
3-26
3-33
3-37
Programming Manual PSS WIN-PRO
Jump operations
Organisational operations
3-42
3-44
LD
4-1
Programming in LD
4-1
Networks
Network comment
Labels
Segments
RLO
4-1
4-2
4-2
4-2
4-3
Graphic elements in LD
4-4
Overview
Bit operations
Timers and counters
Byte/word operations
Compare operations
Jump operations
Organisational operations
4-4
4-8
4-12
4-16
4-16
4-20
4-20
FBD
5-1
Programming in FBD
5-1
Networks
Network comment
Labels
Segments
RLO
5-1
5-2
5-2
5-2
5-3
5-4
Overview
Bit operations
Timers and counters
Byte/word operations
Load and transfer operations
Convert operations
Compare operations
Arithmetic operations
Logic operations
Shift and rotate operations
Programming Manual PSS WIN-PRO
5-4
5-12
5-17
5-22
5-22
5-23
5-26
5-29
5-38
5-44
3
Contents
Jump operations
Organisational operations
5-48
5-49
Predefined SBs
6-1
Overview
6-2
Appendix
7-1
7-1
7-3
Index
8-1
Introduction
1-1
Introduction
Definition of symbols
Information in this manual that is of particular importance can be identified
as follows:
DANGER!
This warning must be heeded! It warns of a hazardous situation that
poses an immediate threat of serious injury and death and indicates
preventive measures that can be taken.
WARNING!
This warning must be heeded! It warns of a hazardous situation that
could lead to serious injury and death and indicates preventive
measures that can be taken.
CAUTION!
This refers to a hazard that can lead to a less serious or minor injury plus
material damage, and also provides information on preventive measures
that can be taken.
NOTICE
This describes a situation in which the unit(s) could be damaged and also
provides information on preventive measures that can be taken.
INFORMATION
This gives advice on applications and provides information on special
features, as well as highlighting areas within the text that are of particular
importance.
1-2
Basics
Project
A project is required in order to operate a PSS-range programmable
safety system. All the necessary files are combined within this project. The
project is created and maintained using PSS WIN-PRO.
SafetyBUS p configuration
Project
Diagnostic configuration
PSS configuration
FS project section
ST project section
FS program
ST program
PSS configuration
DB (FS)
OBs
SBp configuration
DB
PSS configuration
DB (ST)
OBs
DBs
DBs
PBs
PBs
FBs
SBs
FS allocation table
FBs
SBs
ST allocation table
2-1
Basics
2-2
Programming languages
Description
Symbol
IL
(Instruction List)
L
AND
OR
FBD
(Function Block
Diagram)
LD
(Ladder Diagram)
2-3
Basics
Blocks
For the sake of clarity, the program is divided into a maximum of 511
blocks. There are 5 different types of block:
Organisation blocks (OB)
Form the interface between the PSS operating system and the program
Program blocks (PB)
For elemental and plant-specific functions
Function blocks (FB)
For specific individual tasks
Standard function blocks (SB)
For standard functions
Data blocks (DB)
Contain fixed or variable data
Structure
Each block consists of a block header and a body.
The block header contains the following details:
Block name
Name consisting of 5 characters XXyyy, e.g. DB124
XX: Block type (OB, PB, ...)
yyy: Block number (OB, PB, FB, SB: 1 ... 255; DB: 0 ... 255)
Block short tag
Block description, max. 8 characters. The short tag is not unique, i.e.
several blocks may have the same short tag.
Date and time the block was last saved
CRC check sum
Check sum formed via the block. This can be used to detect whether the
block has been modified. The PSS uses the CRC sum to detect whether
the block has been transmitted without error.
Formal parameters (FB and SB only)
To enter values and issue results
2-4
The body of an OB, PB, FB and SB contains the actual programming for
the function that the block is to perform.
A block may contain a maximum of 512 operations. It should be noted that
a graphic element in LD or FBD may correspond to several operations.
The body of a DB contains data, maximum 1024 data words.
2-5
Basics
2-6
2-7
Basics
OB133
OB133 is called as soon as an I/O-Group on SafetyBUS p 1 switches to
a STOP condition.
For further information please refer to the SafetyBUS p System
Description, under OB133.
2-8
OB025 with error class S-21 (addressing error) and S-22 (error
accessing data block)
If OB025 is not available, the ST section will immediately switch to a
STOP condition; if OB025 is available, the status will remain unchanged
after OB025 is run, in other words, it will not switch to a STOP
condition.
OB027 with error class S-23 (error accessing read-only data block) or S24 (set addressing error)
If OB027 is not available, the ST section will immediately switch to a
STOP condition; if OB027 is available, the status will remain unchanged
after OB027 is run, in other words, it will not switch to a STOP
condition.
OB29 with error class S-04 (battery error)
The ST section remains in a RUN condition, whether or not OB029 is
available.
OB020 (Start-up OB)
The operating system calls the start-up OB when the ST section switches
from a STOP to a RUN condition. It can be used for initialisation, for
example.
If a general reset is to be performed when switching from STOP-RUN, the
general reset OB must be available and not the start-up OB.
INFORMATION
Please note the following for the start-up OB:
Periphery access (PB, PW) is not permitted.
Access to word modules is not permitted.
All communication flags are initialised with 0.
All FS status flags are initialised with 0.
Polling the PII results in 0.
Access to the process image of outputs (PIO) is performed immediately,
but the PIO is not sent to the outputs until the end of the cycle OB.
Some of the functions of standard function block SB254 may not be used
in the start-up OB. Further information is available in the descriptions of
the SB254 functions.
2-9
Basics
2-10
Parameters
Function blocks may have formal parameters. These formal parameters
are used to enter values in the FB and to issue results from the FB. Each
FB may have 64 parameters in total.
Formal parameters must be established when the block is created. They
are shown in the block header.
Name of formal parameter
Max. 4 characters, special characters are permitted, case-sensitive
Type of formal parameter
Type
Key
Bit
Byte
Word
Data block
Timer/counter
2-11
Basics
Formal parameters
Input side
Formal parameters
Output side
2-12
Formal parameters
Actual parameters
Data blocks: DB
Timers or counters: T, Z
INFORMATION
If an FBs formal parameters are edited (parameters inserted, deleted or
transposed, type changed), the block calls will need to be updated and
the actual parameters adapted in all the blocks in which the FB is called.
Each formal parameter must be assigned a corresponding actual
parameter. Errors in the assignment of actual parameters may cause the
program to malfunction.
2-13
Basics
Example:
Body of FB100 in IL
Body of FB100 in LD
2-14
When a function block is called up, the formal parameters are assigned
actual parameters.
Example:
Call FB100 in PB025 in IL
2-15
Basics
2-16
2-17
Basics
2-18
2-19
Basics
2-20
2-21
Basics
Entry
SB255
FUNK = 50
Output
Key
Confirm reset of remanent DBs
ERG = 4
ERG = 16
Please refer to the FS System Description for the PSS-Range for details
of how to use SB255.
If a new user program is downloaded into the programmable safety and
control system and this program contains the same remanent data blocks
as the previous user program (quantity of DBs, DB numbers and length of
DBs must be identical, content may vary), the current values on the old
DBs are not automatically overwritten. A prompt will appear in PSS WINPRO, asking whether the values are to be overwritten. If the values are
not overwritten, the programmable safety and control system will start up
with the old values when it is cold/warm started.
If the remanent DBs on the new user program are not identical to those
on the old program, the remanent data blocks on the programmable
safety and control system must be reset before downloading. PSS WINPRO performs the reset after approval from the user.
If the user program is stopped via the Stop program operation or a
programming error occurs (error F-21 to F-28), processing of the user
program will be aborted within the cycle and the PSS will switch to a
STOP condition. If there are any remaining write operations to remanent
blocks programmed between this point and the end of the cycle, these
will not be carried out. The data in the remanent DBs will not have the
status that it would have had at the end of the cycle.
2-22
2-23
Basics
Encrypted blocks
Blocks can be encrypted using a special encryption tool. Two encryption
levels are available:
Level 1: Type 1 lock
The block cannot be modified. The block may be shown in dynamic
program display in PSS WIN-PROs online mode.
Level 2: Type 2 lock
The block can neither be opened nor shown in dynamic program display
in PSS WIN-PROs online mode.
Segments
Blocks can be sub-divided into segments (with the exception of data
blocks). A block can have a maximum of 64 segments.
The first segment (Segment: ) begins at the start of the block and ends at
the first segment operation (IL) or at the first label (LD, FBD). If there is no
segment operation/label, it finishes at the end of the block.
Additional segments (Segment: 0, Segment: 1, ...) extend from one
segment operation/label to the next. The last segment finishes at the end
of the block.
When a new segment operation/label is inserted, the numbering of the
segments is updated automatically.
2-24
Networks
Segments can be sub-divided into networks. Networks only exist in LD and
FBD. They are used to indicate a linked current path in LD and connected
graphic elements in FBD.
Operations
Each block (with the exception of the data block) consists of a maximum of
512 operations. These operations will be displayed differently, depending
on the programming language. It should be noted that a graphic element in
LD or FBD may correspond to several operations.
The operations that are available are described in the chapters entitled IL,
LD and FBD.
Operands
The signal status of inputs and outputs, plus the contents of flags, timers
and counters are known as operands. The name of an operand consists
mostly of a prefix for the operand type plus the operand address.
The table on the front cover flap shows all the operands for the FS section,
with their address ranges; the table on the back cover flap shows those of
the ST section.
Flags
Flags are internal memories, which can be accessed in bit, byte and word
mode. Flags 064.00 to 099.31 in the FS section and flags 000.00 to 063.31
in the ST section are available to use as required.
Flags 100.00 to 116.31 are special flags with a pre-defined function (see
Overview of Operands on the cover flaps).
The ST section is only permitted read-only access to flags 064.00-099.31
in the FS section and to all the flags marked FS in the operand overview
on the back cover flap.
2-25
Basics
Constants
Constants may also be stated as operands or parameters.
Type
Range
Prefix
Example
Byte
0 ... 255
KB
KB016
2-Byte
KY
KY016,065
Bit state
16 bit
KM
KM1111000011110000
KF
KF-523
KH
KHFAD3
KCM-
2-26
The ST section only has a process image for bit modules. This is also
divided into two memory areas:
Memory area for input statuses: PII
Memory area for output statuses: PIO
Access to the process images is via operations such as Load or Transfer. The operands are called E, AB and XW for example (FS only).
The benefit of periphery access via process images is that the status of
inputs and outputs remains the same during a program cycle. The input
modules are polled as cyclical program processing starts up, before
organisation block OB101 (FS) or OB001 (ST) is called. The process
image of inputs (FS: PII, XW-PII; ST: PII) is stored. The program operates
with this process image. If the input status changes as the program is
processed, the new image is not loaded until the next time OB101 (FS) or
OB001 (ST) is started up, in other words, at the next cycle.
The process image of outputs is transmitted to the outputs at the end of the
cycle.
Access to the process image also requires less time than direct access.
The FS System Description and the ST System Description for the
PSS-range describe in detail how communication via the process images
operates.
2-27
Basics
2-28
Addressing
Absolute addresses
The name of an operand consists mostly of a prefix for the operand type
plus the operand address. On most operands (e.g. XW, DB, ), the
address is a number; only on inputs, outputs, periphery access and flags
does the address consist of two numbers separated by a decimal point.
On flags, the number before the decimal point is the flag number; on inputs,
outputs and periphery access it is the slot number. The number after the
decimal point is the bit number.
When addressing words or bytes, the bit number indicates the least
significant bit (LSB). Bytes can only start with bit numbers 0, 8, 16 or 24
and words with bit numbers 0 and 16 (words starting with 8 or 24 are
permitted, but require more access time than words starting with 0 or 16).
Examples
E
02.17:
EB 02.08:
AW 03.00:
MB 75.08:
Z
60:
The table on the front cover flap shows all the operands for the FS section,
with their address ranges; the table on the back cover flap shows those of
the ST section.
2-29
Basics
INFORMATION
With inputs, outputs and periphery access please note the following:
The addresses that can be addressed will vary from PSS to PSS, and on
modular PSS systems will depend on the hardware configuration; details
are given in the operating manuals for the programmable safety system.
It will not be possible to access a word with the address x.24 if x is the
number of the last slot on the programmable safety system.
On compact programmable safety systems, not all of a slots inputs/
outputs are always available on the screw terminals. An error occurs
when such an output is set. If you wish to address an output byte/word
containing such an output, you will need to mask the output byte/word in
such a way that 0 is written to this output.
Inputs that are not available are read with 0.
Tags
Tags can be defined for all operands, with the exception of constants and
blocks; for example, the operand EB02.08 could have the tag
AUTOMATIC_ON.
When programming, you can enter EB02.08 or AUTOMATIC_ON as the
operand.
In this way, tags can be used as an expressive description for operands.
The assignment between operands and tags is stored in the allocation
table. The FS and ST project section each have their own allocation table.
Each allocation table may contain a max. 4000 allocations. Each allocation
may have a comment text, containing up to 256 characters.
Conventions for tags: Max. 32 characters, special characters are
permitted, not case-sensitive.
2-30
Direct addressing
The simplest type of addressing is direct addressing. The operands absolute address (see section entitled Addresses, in this chapter) is stated
directly within the operation.
Example:
Load input E 2.12. The tag Start has been defined for the input in the
allocation table.
IL:
L E2.12
.Start
LD:
E2.12
Start
FBD:
E2.12
Start
2-31
Basics
Indirect addressing
With indirect addressing, a flag word is stated instead of the operand
address. This flag word contains the current address and is called the
address indicator. Indirect addressing enables an address to be changed
while the program is being processed.
Please note the following with indirect addressing:
Flag words MW114.00 and MW114.16 are available as address
indicators for indirect addressing. On PSS with an FS operating system
version 43, flags in the range 00 - 63 in the ST section and flags in the
range 64 - 99 and 130 - 255 in the FS section can also be used as
address indicators.
No other flags are permitted as address indicators.
The address indicator (flag word) must always be in parentheses. The
type of operand being addressed must be stated before the parentheses
(see examples).
The operand address in the address indicator (flag word) can be
specified as a constant or can be calculated within the program.
The PSS will detect any access outside the permitted operand range
(e.g. DB400) and will switch to a STOP condition.
Load errors or unintentionally overwriting the address indicator (flag
word) can cause the user program to operate incorrectly.
The configuration of the address indicator depends on the operands that
are to be addressed; see table.
Address indicator
Operand type
Bit 15 ... 8
Bit 7 0
E, EB, EW
Slot number
A, AB, AW
Slot number
M, MB, MW
Flag number
Z, ZW
Any
Counter number
Time base
Timer number
DW, DL, DR
DB
XW
2-32
Examples
Indirect addressing using the address indicator MW114.16.
Before the address indicator is used, flag word MW114.16 must be
assigned the corresponding values.
Address
direct
Address
indirect
Contents of
MB114.24
MB114.16
E1.6
E(114.16)
AB2.8
AB(114.16)
MW64.00
MW(114.16)
64
Z88
Z(114.16)
Any
88
ZW88
ZW(114.16)
Any
88
T67.1
T(114.16)
67
Contents of MW114.16
DL100
DL(114.16)
100
DB199
DB(114.16)
199
XW40
XW(114.16)
40
2-33
Basics
Set addressing
Set addressing can only be used in function blocks and standard function
blocks that have parameters.
When programming, the parameters are simply used as operands, with an
= placed in front. Make sure that the parameter type is permitted for that
operation.
When the standard/function block is called, the (formal) parameters are
then replaced by actual parameters.
Example
An FB100 has been defined. The parameters and their types can be seen
in the block header.
2-34
LD:
FBD:
2-35
Basics
Operand
Example
There is a word module on slot 3. The 3rd and 4th words are to be
addressed.
Slot 3 corresponds to words XW24 XW31 (see table above)
1st word XW24
2nd word XW25
3rd word XW26
4th word XW27
5th word XW28
6th word XW29
7th word XW30
8th word XW31
The 3rd word is XW26 and the 4th word XW27.
2-36
2-37
Basics
1st output
2nd output
DW0000
Slot 0
DW0001
Slot 1
.
.
.
.
.
.
DW0008
DW0009
DW0010
.
.
.
.
.
.
DW0023
2-38
Block
Entry
SB254
FUNK = 180
DB004
DW200
Output
Key
Offset for free addressing
ERG = 1
ERG = 16
Please refer to the ST System Description for the PSS-Range for details of
how to use SB254.
Positive logic
Positive logic is valid when programming, i.e. 1 is TRUE and 0 is
FALSE.
2-39
Basics
Program cycle
The sequence of a program on the PSS is determined by its program
structure. The program cycle can be interrupted by alarms or errors.
Program structure
The program for the FS/ST section of a PSS is composed of several
blocks. A block consists of a series of operations. Either linear or structured
programming can be used, depending on the scope of the control task.
Linear programming
Linear programming only uses the cycle organisation block OB101 (FS
section) or OB001 (ST section). It contains all the instructions. This
structure is only recommended on very simple control tasks.
.
.
.
2-40
Structured programming
Extensive control functions should only be managed using structured
programming. Several blocks are used, each one fulfilling part of the
control function. This gives a better overview of the process. Modifications
and tests can be done piecemeal (per block).
Blocks are called from within each other and within the cycle organisation
block OB101 (FS section) or OB001 (ST section). When a block is called,
the program exits the current block and processes the operations in the
block that has been called. At the end of the block the program returns to
the original block and continues processing it.
There are 8 nesting levels for block calls:
1st level: OB101 (FS section) or OB001 (ST section) calls block 1
2nd level: Block 1 calls block 2
3rd level: Block 2 calls block 3
.
.
.
8th level: Block 6 calls block 7
OB101 (FS section)
or OB001 (ST section)
Block 2
Call
Block 1
Call
Call
Block 7
Call
Block 2
Call
Call
Block 1
Call
Block 2
Block 7
Call
Level 1
Level 2
Level 3
Level 8
2-41
Basics
Alarm processing
Alarm processing in the FS section
The program for the FS section is processed in cycles. OB101 and the
blocks called within it are run periodically. Only an alarm or an error can
interrupt this process.
If an alarm occurs, the alarm OB is called and processed at the start of the
next segment or at the next block change. The program then returns to the
original block and continues processing it.
OB101
Block call
Block X
Block call
Block call
Alarm OB
Alarm
Block call
Block Y
Block call
INFORMATION
On the subject of Alarms, you should also refer to the FS System
Description for the PSS-range.
2-42
OB001
Block call
Block X
Block call
Block call
FS Alarm OB
Alarm from
FS section
Block call
Block Y
Block call
INFORMATION
On the subject of Alarms, you should also refer to the FS System
Description for the PSS-range.
2-43
Basics
Error processing
Error processing in the FS section
If an error occurs, the FS program is interrupted immediately and one of
the error OBs is called. The error will determine which error OB is called
(see section entitled Organisation blocks for the FS section).
When the error OB has been run, or if no error OB is available, the FS
section will switch to a STOP condition.
2-44
IL
Programming in IL
IL
Structure of an operation
Operator
Operand
Tag
E01.00
.INPUT1
Operator:
Each operation consists of an operator at the very least. The operator is a
short description of the command to be executed. You can enter one of the
operators listed in the section entitled Operations in IL.
Operand:
Operand on which the operator is to be used. The section entitled
Operations in IL contains details of which operands are permitted for
each operator, and whether there are any restrictions when addressing the
operands.
General information on operands and addressing is available in the
chapter entitled Basics.
Tag:
A symbol can be defined for each operand in the allocation table. If a
symbol has been defined, it will be placed after the operand, preceded by
a dot.
Segment operation
One particular operation is the segment operation, which marks the start
of a segment. It consists of the SEG operator and the number of the
segment.
A label may be entered before the segment operation. The label is used as
the target in jump operations. The label may be a maximum of 14
3-1
IL
characters and may not contain spaces or colons. The label must be
followed by a colon.
Label
Segment operation
xxx:
SEG 13
Comments
Comments may be added within a block.
Comments start with // and finish at the end of each line.
Example:
// This is a comment
L
E01.12
// This is a comment
3-2
High byte
15
...
Auxiliary accumulator
Low byte
87
...
High byte
0
15
...
Low byte
87
...
Programming rules
The following rules must be followed when programming:
Several binary logic operations (U, UN, O, ON) can follow in succession
to form a logic chain.
A binary load operation (L, LN) or a compare instruction (>, !=, <) must
precede an individual binary logic operation or the first logic operation in
a binary logic chain.
The first operation within parentheses must be a binary load operation
(L, LN) or a compare operation (>, !=, <). This may only be followed by
binary logic operations (U, UN, O, ON).
One of the operations =, S, R, SPB, CALC, ), SE, ZV or ZR must follow
an individual binary logic operation or a binary logic chain.
The operations =, S, R, SPB, CALC, SE, ZV and ZR must always be
preceded by an operation that affects the RLO.
Binary logic operations and binary logic chains may not be interrupted by
byte or word operations.
The final operation within a block must be BE.
The operation BE may only occur once within a block.
3-3
IL
Accumulator
IL
Operations in IL
Overview
Operator Description
Page
Bit operations
L
Load
3-7
L(
3-7
LN
Load NOT
3-8
AND connection
3-8
U(
3-9
UN
3-10
OR operation
3-11
O(
OR open parenthesis
3-12
ON
3-13
Close parenthesis
3-13
Set
3-14
Reset
3-14
Store
3-15
=N
Store NOT
3-15
Start timer
3-16
ZV
3-18
ZR
3-19
Byte/word operations
3-4
Load
3-20
Store
3-21
DEF
3-22
DUF
3-23
>
3-24
!=
Equals comparison
3-25
<
3-25
Increment
3-26
Decrement
3-27
KZW
3-28
Page
Addition
3-29
Subtraction
3-30
Multiplication
3-31
Division
3-32
AND
3-33
OR
3-34
XOR
3-35
KEW
3-36
RL
Rotate left
3-37
RR
Rotate right
3-38
SLV
Shift left
3-39
SRV
Shift right
3-40
TA
3-41
IL
Operator Description
Jump operations
SPA
Unconditional jump
3-42
SPB
Conditional jump
3-43
Organisational operations
A
3-44
CAL
3-45
CALC
3-46
BE
Block end
3-47
SEG
Start of segment
3-47
AS
Disable alarms
3-48
AF
Enable alarms
3-48
BAS
3-49
STP
Stop program
3-49
CRC calculation
see
Chapter 6
SB001
CRC calculation
32 bit arithmetic
SB003
Addition
SB007
Subtraction
SB011
Multiplication
SB015
Division
SB041
Comparison
3-5
IL
INFORMATION
Only the operands stated as Permitted operands in the operations
description may be used for the operations. The corresponding address
ranges can be found on the cover flaps.
Please note that some operands are read-only. Example: if MW (flag
words) is stated for an operation under Permitted operands and the
operation is able to write to the operand, it will only be possible to use
those flag words to which write access is permitted, as stated on the cover
flaps. See column: Access, Write
3-6
Bit operations
Load
[Operand] => [RLO]
IL
Description
The status of a bit operand is copied to the RLO.
Permitted operands
A, E, M, T, Z
Example
L
M 064.00
L(
E
A
E
E
01.10
02.13
02.31
01.04
3-7
IL
LN
Load NOT
[Operand negated] => [RLO]
Description
The negated status of the operand is copied to the RLO.
Permitted operands
A, E, M, T, Z
Example
LN
064.00
AND operation
[Operand] AND [RLO] => [RLO]
Description
The status of the operand and the RLO are AND-linked. The result is
copied to the RLO.
Operand
RLO
Result in RLO
0
0
1
1
0
1
0
1
0
0
0
1
Permitted operands
A, E, M, T, Z
Example
U
3-8
01.00
U(
Parenthesis RLO
result
Result in RLO
0
0
1
1
0
0
0
1
0
1
0
1
IL
Description
The result of a logic operation (U, UN, O, ON) and the status of the RLO
are AND-linked. The result of the logic AND operation is copied to the
RLO.
The logic operation must be within parentheses, i.e. the logic operation
starts with the operation U( and ends with the operation ).
Max. nesting level for parentheses: 3
Permitted operands
None
Example
L
U(
L
O
O
)
02.05
E
A
E
01.10
02.13
02.31
3-9
IL
UN
RLO
Result in RLO
0
0
1
1
0
1
0
1
0
1
0
0
Permitted operands
A, E, M, T, Z
Example
UN A 01.00
3-10
OR operation
[Operand] OR [RLO] => [RLO]
Description
The status of the operand and the RLO are OR-linked. The result is copied
to the RLO.
Operand
RLO
Result in RLO
0
0
1
1
0
1
0
1
0
1
1
1
Permitted operands
A, E, M, T, Z
Example
O
A 01.00
3-11
IL
IL
O(
OR open parenthesis
[Result from parentheses] OR [RLO] => [RLO]
Description
The result of a logic operation (U, UN, O, ON) and the status of the RLO
are OR-linked. The result of the logic OR operation is copied to the RLO.
Parenthesis RLO
result
Result in RLO
0
0
1
1
0
1
1
1
0
1
0
1
The logic operation must be within parentheses, i.e. the logic operation
starts with the operation O( and ends with the operation ).
Max. nesting level for parentheses: 3
Permitted operands
None
Example
L
O(
L
U
U
)
3-12
02.05
E
A
E
01.10
02.13
02.31
ON
Operand
RLO
Result in RLO
0
0
1
1
0
1
0
1
1
1
0
1
IL
Description
The status of the RLO and the negated status of the operand are ORlinked. The result is copied to the RLO.
Permitted operands
A, E, M, T, Z
Example
ON A 01.00
Close parenthesis
Description
Closes the last parenthesis level to be opened. The RLO contains the
result from the overriding logic operation.
Max. nesting level for parentheses: 3
Permitted operands
None
Example
See operation L(, O( and U(
3-13
IL
Set
[Operand] = 1, if RLO = 1
Description
If the status of the RLO is 1, the status of the operand is set to 1. If the
status of the RLO is 0, the status of the operand is unchanged. The RLO
remains unchanged.
Permitted operands
A, M
Example
S
088.00
Reset
[Operand] = 0, if RLO = 1
Description
If the status of the RLO is 1, the status of the operand is set to 0. If the
status of the RLO is 0, the status of the operand is unchanged. The RLO
remains unchanged.
If the operand is a timer, the timers status bit is reset. If the operand is a
counter, the status bit of the counter and the counter word are both reset.
The counter is locked as a result of the reset. To enable the counter to
continue, the status of the RLO must be set to 0 and the R operation
must be reapplied to the counter.
Permitted operands
A, M, T, Z
Example
R
3-14
088.00
Store
[RLO] => [Operand]
IL
Description
The status of the RLO is stored in the operand.
Permitted operands
A, M
Example
=
=N
64.01
Store NOT
[RLO negated] => [Operand]
Description
The negated status of the RLO is stored in the operand.
Permitted operands
A, M
Example
=N
64.01
3-15
IL
Start timer
Description
The SE operation is used to create a switch-on delay using a timer.
Timers:
Time base:
0 corresponds to 50 ms
1 corresponds to 100 ms
2 corresponds to 1 s
3 corresponds to 10 s
4 corresponds to 1 min
The time value must be loaded into the accumulator before the SE
operation. The time base and timer are stated as operands in the SE
operation.
Sequence:
The timer is started as soon as the RLO before the SE operation
switches from 0 to 1. The timer status is then 0 (see Fig. 3-1, c).
Once the switch-on delay has elapsed, the timer status is set to 1 (d).
A falling edge at the RLO before the SE operation will reset the timer
status (e).
The timer can also be reset using the R operation (f). If the RLO before
the R operation is set permanently to 1, it will not be possible to start
the timer (g).
The timer status can be polled using the operations L, U, O.
Example for loading the status bit of timer 127: L T 127
It is even possible to read the FS section timers from the ST section.
3-16
RLO before
SE instruction
IL
RLO before
R instruction
Timer running
Status of
timer
t = programmed time
Examples
Addressing
Direct:
Set:
Indirect:
L
L
KF 00003
E 01.02
SE
L
L
KF 00003
E 01.02
SE
=TIME.1
L
T
L
L
KY
MW
KF
E
SE
T(114.00)
127.1
001,067
114.00
00003
01.02
3-17
IL
ZV
3-18
01.00
ZV
064
01.00
ZR
064
3-19
IL
ZR
IL
Byte/word operations
Load and transfer operations
L
Load
[Operand] => [Accumulator]
Description
The operand is loaded into the accumulator. If the operand is a byte, only
the accumulators low byte will be written (Bit 0 ... 7). If the operand is a
word, the entire contents of the accumulator will be overwritten.
This operation may not be followed by an operation that is dependent on
the RLO.
Permitted operands
AB/AW, EB/EW, PB/PW, DL, DR, DW, KB, KC, KF, KH, KM, KY, MB/MW,
XW, ZW
Example
L
3-20
MW 064.00
Store
[Accumulator] => [Operand]
Description
The contents of the accumulator is stored in the operand. If the operand is
a byte, only the accumulators low byte will be stored (Bit 0 ... 7). If the
operand is a word, the entire contents of the accumulator will be stored.
The contents of the accumulator will remain unchanged.
This operation may not be followed by an operation that is dependent on
the RLO.
Permitted operands
AB/AW, EB/EW, PB/PW, DL, DR, DW, MB/MW, XW, ZW
Example
T
MB 64.24
//Store contents of
//accumulator (low byte) in
//flag byte MB64.24
3-21
IL
IL
Convert operations
DEF
3-22
00000010 10010110
00000001 00101000
DUF
IL
INFORMATION
This operation is only available in the ST section.
Description
The contents of the accumulator is interpreted as a binary figure and
converted into BCD.
This operation may not be followed by an operation that is dependent on
the RLO.
Permitted operands
None
Example
DUF
00000010 00101000
00000101 01010010
3-23
IL
Compare operations
>
3-24
AB 01.24
Equals comparison
[Accumulator] = [Operand] => RLO = 1
Description
The contents of the accumulator is compared with the contents of the
operand. If both contents are the same, the RLO is set to 1.
If the operand is a byte, it is compared with the accumulators low byte
(unsigned). Compare operations with words must be signed comparisons.
Neither the contents of the accumulator nor that of the operand is
changed.
Permitted operands
AB/AW, EB/EW, DL, DR, DW, KB, KC, KF, KH, KM, KY, MB/MW, ZW
Example
!= AB 01.24
<
AB 01.24
IL
!=
IL
Arithmetic operations
I
Increment
[Accumulator] + 1 => [Accumulator]
[Operand] + 1 => [Operand]
Description
The contents of the operand is increased by one. The contents of the
accumulator remains unchanged. If no operand is stated, the operation is
performed in the accumulator and the contents of the accumulator will
therefore be changed.
Overflows
Overflow when incrementing byte operands:
255 +1 = 0
An overflow occurs if the contents of the operand is 255. After
incrementing, the contents of the operand is 0.
Overflow when incrementing word operands:
+32.767 +1 = -32.768
An overflow occurs if the contents of the operand is +32.767. After
incrementing, the contents of the operand is -32.768.
This operation may not be followed by an operation that is dependent on
the RLO.
Permitted operands
AB/AW, DW, MB/MW
Example
I
3-26
MB 064.16
Decrement
[Accumulator] -1 => [Accumulator]
[Operand] - 1 => [Operand]
Description
The contents of the operand is decreased by one. The contents of the
accumulator remains unchanged. If no operand is stated, the operation is
performed in the accumulator and the contents of the accumulator will
therefore be changed.
Overflows
Overflow when decrementing byte operands:
0 - 1 = 255
An overflow occurs if the contents of the operand is 0. After
decrementing, the contents of the operand is 255.
Overflow when decrementing word operands:
-32.768 - 1 = +32.767
An overflow occurs if the contents of the operand is -32.768. After
decrementing, the contents of the operand is +32.767.
This operation may not be followed by an operation that is dependent on
the RLO.
Permitted operands
AB/AW, DW, MB/MW
Example
D
MB 064.16
3-27
IL
IL
KZW
3-28
Addition
[Operand] + [Accumulator] => [Accumulator]
Description
The contents of the operand is added to the contents of the accumulator.
The result is stored in the accumulator. The arithmetic flags are set. The
accumulator contents and word operands are always interpreted as signed
16 bit fixed point numbers, byte operands are unsigned.
Overflow:
If an overflow occurs (if the result exceeds +32786 or falls below -32786),
the value FFFFH (corresponding to -1) is entered in the auxiliary
accumulator. The contents of the accumulator is then invalid!
This operation may not be followed by an operation that is dependent on
the RLO.
Permitted operands
AB/AW, EB/EW, DL, DR, DW, KB, KF, MB/MW, ZW
Example
+
KB 028
//Add 28 to contents of
//accumulator
3-29
IL
IL
Subtraction
[Accumulator] - [Operand] => [Accumulator]
Description
The contents of the operand is subtracted from the contents of the
accumulator. The result is stored in the accumulator. The arithmetic flags
are set. The accumulator contents and word operands are always
interpreted as signed 16 bit fixed point numbers, byte operands are
unsigned.
Overflow:
If an overflow occurs (if the result exceeds +32786 or falls below -32786),
the value FFFFH (corresponding to -1) is entered in the auxiliary
accumulator. The contents of the accumulator is then invalid!
This operation may not be followed by an operation that is dependent on
the RLO.
Permitted operands
AB/AW, EB/EW, DL, DR, DW, KB, KF, MB/MW, ZW
Example
-
3-30
KB 028
Multiplication
[Operand] * [Accumulator] => [Accumulator], [Auxiliary accumulator]
Description
The contents of the operand is multiplied by the contents of the
accumulator. The accumulator contents and word operands are always
interpreted as signed 16 bit fixed point numbers, byte operands are
unsigned. The result is a signed 32 bit fixed point number. The low word is
stored in the accumulator, the signed high word in the auxiliary
accumulator. The arithmetic flags are set.
This operation may not be followed by an operation that is dependent on
the RLO.
Permitted operands
AB/AW, EB/EW, DL, DR, DW, KB, KF, MB/MW, ZW
Example
*
EB 04.08
//Multiply contents of
//accumulator by contents
//of input byte EB04.08
3-31
IL
IL
Division
[Accumulator] : [Operand] => [Accumulator], [Auxiliary accumulator]
Description
The contents of the accumulator is divided by the contents of the operand.
The accumulator contents and word operands are always interpreted as
signed 16 bit fixed point numbers, byte operands are unsigned. The result
is also a signed 16 bit fixed point number. The remainder from the division
is stored in the auxiliary accumulator. The arithmetic flags are set.
This operation may not be followed by an operation that is dependent on
the RLO.
Permitted operands
AB/AW, EB/EW, DL, DR, DW, KB, KF, MB/MW, ZW
Example
:
3-32
EB 04.08
//Divide contents of
//accumulator by contents
//of input byte EB04.08
Logic operations
Bitwise AND operation (bytes/words)
[Accumulator] AND [Operand] => [Accumulator]
Description
The contents of the accumulator and the contents of the operand are ANDlinked bit by bit.
If the operand is a byte, it is linked with the accumulators low byte. The
accumulators high byte remains unchanged. If the operand is a word, all
16 bits of the operand and accumulator are linked.
The result of the AND operation will be 1 if both bits equal 1. If one of
the bits or both bits equal 0, the result will be 0.
Example:
11110000 01011100
AND 01010010 11101110
=
01010000 01001100
//AND-link contents of
//accumulator and constant
//52EE
3-33
IL
AND
IL
OR
11110000 01011100
OR 01010010 11101110
=
11110010 11111110
3-34
//OR-link contents of
//accumulator and constant
//52EE
11110000 01011100
XOR 01010010 11101110
=
10100010 10110010
//EXCLUSIVE OR-link
//contents of accumulator
//and constant 52EE
3-35
IL
XOR
IL
KEW
// Invert accumulator
3-36
10010010 10110000
01101101 01001111
10010010 10110000
00100101 01100001
01001010 11000010
1st rotation
2nd rotation
10010101 10000100
3rd rotation
3-37
IL
RL
IL
RR
Rotate right
[Accumulator] rotate n times to the right => [Accumulator]
Description
The contents of the accumulator is rotated right n times. n is the number of
rotation cycles (0 ... 15). Bits that drop out on the right (Bit 0) are read in
again on the left (Bit 15).
This operation may not be followed by an operation that is dependent on
the RLO.
Permitted operands
Number of rotation cycles, 0 ... 15
Example
RR 3
3-38
10010010 10110000
01001001 01011000
00100100 10101100
1st rotation
2nd rotation
00010010 01010110
3rd rotation
Shift left
[Accumulator] <-- [RLO] shift n times to the left
Description
The contents of the accumulator is shifted left n times. n is the number of
shift operations (0 ... 15). The status of the RLO is read into Bit 0.
Permitted operands:
Number of shift operations, 0 ... 15
Example
SLV 3
10010010 10110000
1
00100101 01100001 1st shift,
Bit 0 = 1 (RLO)
01001010 11000011 2nd shift
Bit 0 = 1 (RLO)
10010101 10000111 3rd shift
Bit 0 = 1 (RLO)
3-39
IL
SLV
IL
SRV
Shift right
[RLO] --> [Accumulator] shift n times to the right
Description
The contents of the accumulator is shifted right n times. n is the number of
shift operations (0 ... 15). The status of the RLO is read into Bit 15.
Permitted operands
Number of shift operations, 0 ... 15
Example
SRV 3
3-40
10010010 10110000
1
11001001 01011000 1st shift,
Bit 15 = 1 (RLO)
11100100 10101100 2nd shift,
Bit 15 = 1 (RLO)
11110010 01010110 3rd shift,
Bit 15 = 1 (RLO)
TA
IL
Description
The contents of the accumulator and the auxiliary accumulator are
transposed.
This operation may not be followed by an operation that is dependent on
the RLO.
Permitted operands
None
Example
TA
10010010 10110000
00001111 00001111
00001111 00001111
10010010 10110000
3-41
IL
Jump operations
SPA
Unconditional jump
Description
A jump to the stated label is always carried out, irrespective of the
contents of the accumulator or RLO. An unconditional jump only makes
sense in a segment that it is processed conditionally.
Jumps are only permitted within a block. A block may contain a maximum
of 300 jumps.
Permitted operands
Label preceded by =, example =xxx
Example
M1:
M2:
3-42
SEG
L
!=
SPB
.
.
.
.
.
I
SPA
0
MB 064.00
KH 0001
=M2
MB 064.00
=M1
SEG 1
.
.
.
Conditional jump
Description
A jump to the stated label is only carried out if the status of the RLO
equals 1.
If the status of the RLO is 0, the jump command is not performed and the
RLO is set to 1.
Jumps are only permitted within a block. A block may contain a maximum
of 300 jumps.
Permitted operands
Label preceded by =, example =xxx
Example
M1:
M2:
SEG
L
!=
SPB
.
.
.
.
.
I
SPA
0
MB 064.00
KH 0001
=M2
MB 064.00
=M1
SEG 1
.
.
.
3-43
IL
SPB
IL
Organisational operations
A
3-44
DB 025
DW 0100
MW
64.00
3-45
IL
CAL
IL
CALC
3-46
MW
64.00
Block end
Description
The BE operation is the final operation within a block. When the BE
operation occurs within a called block, the program will jump back to the
block that initiated the call.
Permitted operands
None
SEG
Start of segment
Description
This operation marks the start of a segment. It consists of the SEG
operator and the number of the segment.
A label may be entered before the segment operation. The label is used as
the target in jump operations. The label may be a maximum of 14
characters and may not contain spaces or colons. The label must be
followed by a colon.
There is no need to enter SEG and the number when programming; you
only need to enter ***. This will automatically be replaced by SEG and
the correct number.
Permitted operands
Segment number
Example
Label
xxx:
Segment operation
SEG 13
3-47
IL
BE
IL
AS
Disable alarms
Description
The AS operation disables the alarms on modules with alarm
capabilities. Alarms are detected and stored but are not triggered.
Disabling the alarms can prevent a program section being interrupted at a
point where this would not be desirable.
A max. of 32 alarms can be stored. If this limit is exceeded, the PSS will
switch to a STOP condition. The alarms must be re-enabled before the
next cycle change (AF operation), otherwise an error message will be
triggered and the PSS will switch to a STOP condition.
INFORMATION
This operation is only available in the FS section.
Permitted operands
None
AF
Enable alarms
Description
Re-enables the alarms that were disabled through the AS operation.
Stored alarms will be triggered.
INFORMATION
This operation is only available in the FS section.
Permitted operands
None
3-48
STP
Stop program
Description
The STP operation stops the program running in the FS / ST section.
Organisation block OB128 (FS) or OB028 (ST) will be run. The user program can only be restarted by a PSS cold start.
Permitted operands
None
3-49
IL
BAS
IL
Notes
3-50
LD
Programming in LD
LD
4-1
LD
parallel. However, graphic elements with several inputs and outpus may
also be added. These elements each have a bit input and a bit output,
which are used to incorporate them into the current path. The other inputs
and outputs may be of any type, e.g. byte or even word.
The processing sequence on a network is from top to bottom and from left
to right.
On the graphic elements, the operand is placed above the element and the
symbol below the element.
Network comment
In LD, any comment may be entered before each network. Comments are
shown in green. A comment may be a maximum of 16000 characters. A
block may not contain more than 64000 characters of comment in total.
Labels
A label may be entered before a network. The label is used as the target
in jump operations. The label may be a maximum of 14 characters and
may not contain spaces or colons.
Segments
Blocks can be sub-divided into a max. of 64 segments. Each segment may
comprise several networks.
The first segment (Segment: ) begins at the start of the block and ends at
the first label. If there is no label, it finishes at the end of the block.
Additional segments (Segment: 0, Segment: 1, ...) extend from one label to
the next. The last segment finishes at the end of the block.
When a new label is inserted, the numbering of the segments is updated
automatically.
4-2
RLO
LD
The status of the current path is stored in the RLO memory (result of
logic operation). The RLO is 1 when the current path is live and 0 when
it is not live.
The RLO is used for all bit operations, but can also be influenced by some
other operations, e.g. compare operations. There are also operations which
are RLO-dependent, i.e. they are only performed when the RLO has a
particular status (e.g. the jump operation).
4-3
LD
Graphic elements in LD
INFORMATION
If you wish to program operations that are not available in LD, you can also
enter IL or FBD networks within an LD block.
The next time the block is opened, PSS WIN-PRO will check whether the
network can be displayed in LD; if it can, it will change the display to LD. If
LD cannot be used but FBD can, the network will be shown in FBD.
Overview
Graphic element
Description
Page
Bit operations
Op.
N/O contact
4-8
Op.
N/C contact
4-9
Op.
Set
4-10
Reset
4-10
Op.
Store
4-10
Op.
Store NOT
4-11
S
Op.
R
4-4
Graphic element
Description
Page
Op.
Start timer
4-12
4-15
4-15
SD
Start
Range
Op.
CU
Op.
LD
CD
Byte/word operations
GT_B
4-16
4-17
4-18
OUT
IN1
IN2
GT_I
OUT
IN1
IN2
EQ_B
OUT
IN1
IN2
4-5
LD
Graphic element
EQ_I
Description
Page
4-18
4-19
4-19
OUT
IN1
IN2
LT_B
OUT
IN1
IN2
LT_I
OUT
IN1
IN2
Jump operations
Op.
Unconditional jump
4-20
Conditional jump
4-20
JMP
Op.
JMPC
Organisational operations
Op.
4-20
4-21
4-21
OPEN
Op.
CAL
Op.
CALC
4-6
Graphic element
Description
Page
Disable alarms
4-22
Enable alarms
4-22
4-23
Stop program
4-23
CRC calculation
See
Chapter 6
ID
IE
STOP
SB001
CRC calculation
32 bit arithmetic
SB003
Addition
SB007
Subtraction
SB011
Multiplication
SB015
Division
SB041
Comparison
4-7
LD
OFF
LD
Bit operations
Op.
N/O contact
[Operand] AND [RLO] => [RLO]
Description
This graphic element is a N/O contact with positive logic (1 is closed, 0
is open). In other words, if the status of the stated operand is 1, the value
on the right of the N/O contact will always equal the value on the left. If the
status of the stated operand is 0, the value on the right will always be 0.
This corresponds to an AND-link between the RLO and the status of the
operand.
Operand
RLO
Result in RLO
0
0
1
1
0
1
0
1
0
0
0
1
Permitted operands
A, E, M, T, Z
4-8
Op.
N/C contact
[Operand negated] AND [RLO] => [RLO]
Operand
RLO
Result in RLO
0
0
1
1
0
1
0
1
0
1
0
0
LD
Description
This graphic element is a N/C contact with positive logic (1 is open, 0 is
closed). In other words, if the status of the stated operand is 0, the value
on the right of the N/C contact will always equal the value on the left. If the
status of the stated operand is 1, the value on the right will always be 0.
This corresponds to an AND-link between the RLO and the status of the
operand.
Permitted operands
A, E, M, T, Z
4-9
LD
Op.
S
Set
[Operand] = 1, if RLO = 1
Description
If there is a 1 to the left of the coil symbol, the stated operand will also be
set to 1. If there is a 0 on the left, the operand will be unchanged.
Permitted operands
A, M
Op.
R
Reset
[Operand] = 0, if RLO = 1
Description
If there is a 1 to the left of the coil symbol, the stated operand will be
reset to 0. If there is a 0 on the left, the operand will be unchanged.
If the operand is a timer, the timers status bit is reset. If the operand is a
counter, the status bit of the counter and the counter word are both reset.
The counter is locked as a result of the reset. To enable the counter to
continue, the R operation must be reapplied to the counter. There must
be a 0 to the left of the coil symbol.
Permitted operands
A, M, T, Z
Op.
Store
[RLO] => [Operand]
Description
The value to the left of the coil symbol is stored in the stated operand.
Permitted operands
A, M
4-10
Op.
/
Store NOT
[RLO negated] => [Operand]
Description
The value to the left of the coil symbol is inverted and then stored in the
stated operand.
LD
Permitted operands
A, M
4-11
LD
Operand
Op.
Parameters
Start
Start timer
Start = 0 -> 1: Timer is started, timer status is set
Start = 1 -> 0: Timer status is reset
Range
Time value
Value range: 1 ... 32767
Description
The SD block is used to create a switch-on delay using a timer.
Timer:
Time base:
0 corresponds to 50 ms
1 corresponds to 100 ms
2 corresponds to 1 s
3 corresponds to 10 s
4 corresponds to 1 min
The time value is transferred to the Range parameter. The time base and
timer are stated as operands.
The timer is inserted directly on to the right power rail.
4-12
Start
RLO before
R coil
Timer running
Timer status
t = programmed time
Sequence:
The timer is started as soon as Start switches from 0 to 1. The timer
status is then 0 (see Fig. 4-2, c).
Once the switch-on delay has elapsed, the timer status is set to 1 (d).
A falling edge at Start will reset the timer status (e).
The timer can also be reset using the R coil (f). If the RLO before the R
coil is set permanently to 1, it will not be possible to start the timer (g).
The timer status can be polled using a contact; in this case the timer is
stated as an operand (e.g. T127).
It is even possible to read the FS section timers from the ST section.
Permitted operands
Op.
Start
A, E, M, T, Z
Range
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
4-13
LD
LD
Example
Timer T127 is used to implement a switch-on delay of 300 ms
(time base = 1, time value = 3).
4-14
Op.
CU
The counter status indicates whether the counter status is greater than or
less than/equal to 0. The counter status will be 1 if the counter status is
greater than 0. The counter status can be polled under the counters
address (e.g. Z064).
The counter can be reset using the Reset coil (counter status = 0, counter
word = 0). The counter must be unlocked after the reset, see R operation.
Permitted operands
Z (FS: Z064 ... 127; ST: Z000 ... 063)
Op.
CD
4-15
LD
The current counter status is located in the ZW counter word that corresponds
to the counter (e.g. counter Z064 in counter word ZW064). The counter status
can accept the values -32768 ... +32767. If counter status 32767 is reached,
counting will continue at -32768.
LD
The counter status indicates whether the counter status is greater than or
less than/equal to 0. The counter status will be 1 if the counter status is
greater than 0. The counter status can be polled under the counters
address (e.g. Z064).
The counter can be reset using the Reset coil (counter status = 0, counter
word = 0). The counter must be unlocked after the reset, see R operation.
Permitted operands
Z (FS: Z064 ... 127; ST: Z000 ... 063)
Byte/word operations
Compare operations
GT_B
OUT
IN1
IN2
IN1, IN2
OUT
Result
Out = 1: IN1 > IN2
Description
IN1 and IN2 are compared. If IN1 is greater than IN2, Out is set to 1.
The comparison is inserted directly on to the left power rail.
Permitted operands
4-16
IN1
IN2
OUT
Current path
GT_I
OUT
IN1
IN2
IN1, IN2
OUT
Result
Out = 1: IN1 > IN2
Description
IN1 and IN2 are compared. If IN1 is greater than IN2, Out is set to 1.
The comparison is inserted directly on to the left power rail.
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
IN2
OUT
Current path
4-17
LD
Permitted operands
LD
EQ_B
OUT
IN1
IN2
IN1, IN2
OUT
Result
Out = 1: IN1 = IN2
Description
IN1 and IN2 are compared. If IN1 and IN2 are equal, Out is set to 1.
The comparison is inserted directly on to the left power rail.
Permitted operands
EQ_I
OUT
IN1
IN2
IN1
IN2
OUT
Current path
IN1, IN2
OUT
Result
Out = 1: IN1 = IN2
Description
IN1 and IN2 are compared. If IN1 and IN2 are equal, Out is set to 1.
The comparison is inserted directly on to the left power rail.
Permitted operands
4-18
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
IN2
OUT
Current path
LT_B
OUT
IN1
IN2
IN1, IN2
OUT
Result
Out = 1: IN1 < IN2
Description
IN1 and IN2 are compared. If IN1 is less than IN2, Out is set to 1.
The comparison is inserted directly on to the left power rail.
LT_I
OUT
IN1
IN2
OUT
Current path
LD
Permitted operands
IN1
IN2
Parameters
IN1, IN2
OUT
Result
Out = 1: IN1 < IN2
Description
IN1 and IN2 are compared. If IN1 is less than IN2, Out is set to 1.
The comparison is inserted directly on to the left power rail.
Permitted operands
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
IN2
OUT
Current path
4-19
LD
Jump operations
Op.
JMP
Unconditional jump
Description
A jump to the stated label is always carried out.
Jumps are only permitted within a block. A block may contain a maximum
of 300 jumps.
Permitted operands
Label preceded by =, example =xxx
Op.
JMPC
Conditional jump
Description
If there is a 1 to the left of the coil symbol, a jump to the stated label will
be carried out.
Jumps are only permitted within a block. A block may contain a maximum
of 300 jumps.
Permitted operands
Label preceded by =, example =xxx
Organisational operations
Op.
OPEN
4-20
Op.
CAL
Description
The block call activates the PB, FB or SB stated as operand. Processing of
the current block will be interrupted and the called block will be processed.
When CAL is inserted into a network, the block header of the stated block
is displayed. If the block contains formal parameters, these must be
replaced by actual parameters, i.e. they must be assigned operands. The
operands are simply added to the formal parameters connection lines.
They must conform to the type required by the formal parameter.
Permitted operands
FB, PB, SB
Op.
CALC
4-21
LD
A different data block can be selected from within the called block. When
the called block has been processed, the DB selected before the CAL
operation will automatically be reselected.
LD
ID
Disable alarms
Description
ID disables the alarms on modules with alarm capabilities. Alarms are
detected and stored but are not triggered. Disabling the alarms can
prevent a program section being interrupted at a point where this would not
be desirable.
A max. of 32 alarms can be stored. If this limit is exceeded, the PSS will
switch to a STOP condition. The alarms must be re-enabled before the
next cycle change (IE operation), otherwise an error message will be
triggered and the PSS will switch to a STOP condition.
INFORMATION
This operation is only available in the FS section.
Permitted operands
None
IE
Enable alarms
Description
IE is used to re-enables the alarms that were disabled through ID.
Stored alarms will be triggered.
INFORMATION
This operation is only available in the FS section.
Permitted operands
None
4-22
OFF
LD
STOP
Stop program
Description
STOP halts the program running in the FS / ST section. Organisation
block OB128 (FS) or OB028 (ST) will be run. The user program can only
be restarted by a PSS cold start.
Permitted operands
None
4-23
LD
Notes
4-24
FBD
Programming in FBD
FBD
5-1
FBD
On the graphic elements, the operand is placed in the upper field and the
symbol in the lower field above the element.
Network comment
In FBD, any comment may be entered before each network. Comments
are shown in green. A comment may be a maximum of 16000 characters.
A block may not contain more than 64000 characters of comment in total.
Labels
A label may be entered before a network. The label is used as the target
in jump operations. The label may be a maximum of 14 characters and
may not contain spaces or colons.
Segments
Blocks can be sub-divided into a max. of 64 segments. Each segment may
comprise several networks.
The first segment (Segment: ) begins at the start of the block and ends at
the first label. If there is no label, it finishes at the end of the block.
Additional segments (Segment: 0, Segment: 1, ...) extend from one label to
the next. The last segment finishes at the end of the block.
When a new label is inserted, the numbering of the segments is updated
automatically.
5-2
RLO
FBD
The RLO memory (result of logic operation) is one bit wide. The RLO is
used for all bit operations, but can also be influenced by some other
operations, e.g. compare operations. There are also operations which are
RLO-dependent, i.e. they are only performed when the RLO has a
particular status (e.g. the jump operation Conditional jump).
5-3
FBD
Overview
Graphic element
Description
Page
Bit operations
&
>1
Op.
Input
5-12
Inverted input
5-12
AND operation
5-12
OR operation
5-13
Set
5-13
Reset
5-14
Store
5-14
S
Op.
R
Op.
ST
5-4
Graphic element
Op.
Description
Page
Store NOT
5-14
STN
Op.
SR Flip-Flop
5-15
SR
Q
S
R
RS Flip-Flop
Op.
5-16
RS
Q
R
S
Op.
Start timer
5-17
5-20
5-21
SD
FBD
Start
Range
Op.
CU
Op.
CD
Byte/word operations
Store
5-22
Op.
ST
5-5
FBD
Graphic element
B2W
Description
Page
5-23
5-23
5-24
5-25
5-26
5-26
5-27
5-27
OUT
IN
W2B
OUT
IN
BCD2BIN
OUT
IN
BIN2BCD
OUT
IN
GT_B
IN1
OUT
IN2
GT_I
IN1
OUT
IN2
EQ_B
IN1
OUT
IN2
EQ_I
IN1
OUT
IN2
5-6
Graphic element
LT_B
Description
Page
5-28
5-28
Increment operands
5-29
Increment
5-30
Decrement operands
5-31
Decrement
5-32
5-33
Addition
5-34
OUT
IN1
IN2
LT_I
OUT
IN1
IN2
Op.
INC_OP
INC
OUT
IN
FBD
Op.
DEC_OP
DEC
OUT
IN
NEG
OUT
IN
ADD_I
IN1
OUT
IN2
5-7
FBD
Graphic element
Description
Page
Subtraction
5-35
Multiplication
5-36
Division
5-37
5-38
5-39
5-40
5-40
SUB_I
IN1
OUT
IN2
MUL_I
IN1
OUT1
IN2
OUT2
DIV_I
IN1
OUT1
IN2
OUT2
AND_B
IN1
OUT
IN2
AND_W
IN1
OUT
IN2
OR_B
IN1
OUT
IN2
OR_W
IN1
OUT
IN2
5-8
Graphic element
Description
Page
5-41
5-42
5-43
Rotate left
5-44
Rotate right
5-45
Shift left
5-46
Shift right
5-47
XOR_B
OUT
IN1
IN2
XOR_W
OUT
IN1
IN2
NOT
OUT
IN
ROL
OUT
IN
ROR
FBD
OUT
IN
N
SRL
OUT
IN
FILL
N
SRR
IN
OUT
FILL
N
Programming Manual PSS WIN-PRO
5-9
FBD
Graphic element
Description
Page
Jump operations
Op.
Unconditional jump
5-48
Conditional jump
5-48
JMP
Op.
JMPC
Organisational operations
Op.
5-49
5-49
5-50
Disable alarms
5-51
Enable alarms
5-51
OPEN
Op.
CAL
Op.
CALC
ID
IE
5-10
Graphic element
Description
Page
5-52
Stop program
5-52
CRC calculation
See
Chapter 6
OFF
STOP
SB001
CRC calculation
32 bit arithmetic
Addition
SB007
Subtraction
SB011
Multiplication
SB015
Division
SB041
Comparison
FBD
SB003
5-11
FBD
Bit operations
Input
Description
Input of an element. The status of the input is passed to the element
unchanged.
Additional inputs may only be inserted with logic AND-/OR operations.
Permitted operands
A, E, M, T, Z
Inverted input
Description
The status of the input is inverted.
Inputs positioned between two elements may not be inverted.
Additional inverted inputs may only be inserted with logic AND-/OR
operations.
Permitted operands
A, E, M, T, Z
&
AND operation
Description
The operands at the inputs are AND-linked. The result is copied to the
RLO.
A maximum of 510 inputs are possible. The operands can be negated
before they are linked. Such inputs are identified by the negation symbol
.
Permitted operands
A, E, M, T, Z
5-12
Example
The status of input E1.0 and the negated status of E1.1 are AND-linked.
The result is 1, if the status of E1.0 is 1 and the status of E1.1 is 0.
E1.0
E1.1
>1
&
A2.1
OR operation
Description
The operands at the inputs are OR-linked. The result is copied to the RLO.
A maximum of 510 inputs are possible. The operands can be negated
before they are linked. Such inputs are identified by the negation symbol
.
Permitted operands
A, E, M, T, Z
E1.0
E1.1
Op.
S
>1
FBD
Example
The status of input E1.0 and the negated status of E1.1 are OR-linked. The
result is 1, if the status of E1.0 is 1 and/or the status of E1.1 is 0.
A2.1
Set
[Operand] = 1, if RLO = 1
Description
If there is a 1 at the input, the stated operand will also be set to 1. If
there is a 0 at the input, the operand will be unchanged.
Permitted operands
A, M
5-13
FBD
Op.
R
Reset
[Operand] = 0, if RLO = 1
Description
If there is a 1 at the input, the stated operand will be reset to 0. If there
is a 0 at the input, the operand will be unchanged.
If the operand is a timer, the timers status bit is reset. If the operand is a
counter, the status bit of the counter and the counter word are both reset.
The counter is locked as a result of the reset. To enable the counter to
continue, the R operation must be reapplied to the counter. There must
be a 0 at the input.
Permitted operands
A, M, T, Z
Op.
ST
Store
[RLO] => [Operand]
Description
The value at the input is stored in the stated operand.
Permitted operands
A, M
Op.
STN
Store NOT
[RLO negated] => [Operand]
Description
The value at the input is negated and then stored in the stated operand.
Permitted operands
A, M
5-14
SR Flip-Flop
Op.
SR
S
R
Operand
Op.
Parameters
S
R
Set input
Result
Reset input
Description
Q (Op.)
No change
A, E, M, T, Z
A, E, M, T, Z
Q (Op.)
A, M, T, Z
FBD
Permitted operands
5-15
FBD
RS Flip-Flop
Op.
RS
R
S
Operand
Op.
Parameters
S
R
Set input
Result
Reset input
Description
Q (Op.)
No change
5-16
A, E, M, T, Z
A, E, M, T, Z
Q (Op.)
A, M, T, Z
Start timer
Operand
Op.
Parameters
Start
Start timer
Start = 0 -> 1: Timer is started, timer status is set
Start = 1 -> 0: Timer status is reset
Range
Time value
Value range: 1 ... 32767
Description
The SD block is used to create a switch-on delay using a timer.
Timer:
Time value:
Time base:
0 corresponds to 50 ms
1 corresponds to 100 ms
2 corresponds to 1 s
3 corresponds to 10 s
4 corresponds to 1 min
FBD
The time value is transferred to the Range parameter. The time base and
timer are stated as operands.
5-17
FBD
Start
Op. of "Reset"
operation
Timer running
Timer status
t = programmed time
Sequence:
The timer is started as soon as Start switches from 0 to 1. The timer
status is then 0 (see Fig. 5-2, c).
Once the switch-on delay has elapsed, the timer status is set to 1 (d).
A falling edge at Start will reset the timer status (e).
The timer can also be reset using the Reset (R) operation (f). If the
operand for the Reset operation is set permanently to 1, it will not be
possible to start the timer (g).
The timer status can be polled under the timers address (e.g. T127).
It is even possible to read the FS section timers from the ST section.
Permitted operands
5-18
Op.
Start
A, E, M, T, Z
Range
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
FBD
Example
Timer T127 is used to implement a switch-on delay of 300 ms
(time base = 1, time value = 3).
5-19
FBD
Op.
CU
5-20
Op.
CD
FBD
Permitted operands
Z (FS: Z064 ... 127; ST: Z000 ... 063)
5-21
FBD
Byte/word operations
Load and transfer operations
INFORMATION
FBD does not have a graphic element for loading bytes and words. Byte
and word operands are written directly on to the blocks connection lines or
above the block.
Op.
ST
Store
[Current value] => [Operand]
Description
The current value is stored in the operand.
This operation is required to transfer the output parameters from graphic
elements to operands.
This operation is not required with function and standard function blocks
because the operands are written directly on the outputs connection lines.
Permitted operands
Byte and word operands that are permitted as output parameters for the
preceding graphic element.
Example
EB8.00
5-22
B2W
IN
OUT
MW65.00
ST
Convert operations
B2W
IN
OUT
IN
Byte
OUT
Word
Description
8 zeros are added to the byte operand at IN, to form a word. Example:
IN
OUT
10010110
00000000 10010110
Permitted operands
IN
OUT
OUT
FBD
W2B
IN
Parameters
IN
Word
OUT
Byte
Description
The first 8 bits of the word operand at IN are deleted, to form a byte.
Example:
IN
OUT
10010111 10010110
10010110
Permitted operands
IN
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
OUT
5-23
FBD
BCD2BIN
IN
OUT
INFORMATION
This block is only available in the ST section.
Parameters
IN
BCD figure
OUT
Binary figure
Description
The operand at IN is interpreted as a BCD figure and converted into
binary. Example:
IN
OUT
Permitted operands
5-24
IN
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
OUT
BIN2BCD
IN
OUT
INFORMATION
This block is only available in the ST section.
Parameters
IN
OUT
Binary figure
BCD figure
Description
The operand at IN is interpreted as a binary figure and converted into
BCD. Example:
IN
OUT
Permitted operands
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
OUT
FBD
IN
5-25
FBD
Compare operations
GT_B
IN1
OUT
IN2
IN1, IN2
OUT
Result
Out = 1: IN1 > IN2
Description
IN1 and IN2 are compared. If IN1 is greater than IN2, Out is set to 1.
Permitted operands
GT_I
IN1
IN2
OUT
IN1
IN2
OUT
A, M
IN1, IN2
OUT
Result
Out = 1: IN1 > IN2
Description
IN1 and IN2 are compared. If IN1 is greater than IN2, Out is set to 1.
Permitted operands
5-26
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
IN2
OUT
A, M
EQ_B
IN1
OUT
IN2
IN1, IN2
OUT
Result
Out = 1: IN1 = IN2
Description
IN1 and IN2 are compared. If IN1 and IN2 are equal, Out is set to 1.
Permitted operands
IN1
IN2
OUT
IN2
OUT
A, M
IN1, IN2
OUT
Result
Out = 1: IN1 = IN2
FBD
EQ_I
IN1
Description
IN1 and IN2 are compared. If IN1 and IN2 are equal, Out is set to 1.
Permitted operands
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
IN2
OUT
A, M
5-27
FBD
LT_B
IN1
OUT
IN2
IN1, IN2
OUT
Result
Out = 1: IN1 < IN2
Description
IN1 and IN2 are compared. If IN1 is less than IN2, Out is set to 1.
Permitted operands
LT_I
IN1
IN2
OUT
IN1
IN2
OUT
A, M
IN1, IN2
OUT
Result
Out = 1: IN1 < IN2
Description
IN1 and IN2 are compared. If IN1 is less than IN2, Out is set to 1.
Permitted operands
5-28
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
IN2
OUT
A, M
Arithmetic operations
Op.
INC_OP
Increment operands
[Operand] +1 => [Operand]
Description
The contents of the operand is increased by one.
Overflows
Overflow when incrementing byte operands:
255 +1 = 0
An overflow occurs if the contents of the operand is 255. After
incrementing, the contents of the operand is 0.
Overflow when incrementing word operands:
+32.767 +1 = -32.768
An overflow occurs if the contents of the operand is +32.767. After
incrementing, the contents of the operand is -32.768.
FBD
Permitted operands
AB/AW, DW, MB/MW
5-29
FBD
INC
IN
OUT
Increment
[IN] + 1 => [OUT]
Parameters
IN
OUT
Result
Description
The contents of IN is increased by one and assigned to OUT.
Overflows
Overflow when incrementing byte operands:
255 +1 = 0
An overflow occurs if IN equals 255. After incrementing, OUT equals
0.
Overflow when incrementing word operands:
+32.767 +1 = -32.768
An overflow occurs if IN equals +32.767. After incrementing, OUT
equals -32.768.
IN and OUT must be of the same type, i.e. both bytes or both words.
Permitted operands
5-30
IN
AB/AW, EB/EW, PB/PW, DL, DR, DW, KB, KC, KF, KH,
KM, KY, MB/MW, XW, ZW
OUT
Op.
DEC_OP
Decrement operands
[Operand] -1 => [Operand]
Description
The contents of the operand is decreased by one.
Overflows
Overflow when decrementing byte operands:
0 - 1 = 255
An overflow occurs if the contents of the operand is 0. After
decrementing, the contents of the operand is 255.
Overflow when decrementing word operands:
-32.768 - 1 = +32.767
An overflow occurs if the contents of the operand is -32.768. After
decrementing, the contents of the operand is +32.767.
FBD
Permitted operands
AB/AW, DW, MB/MW
5-31
FBD
DEC
IN
OUT
Decrement
[IN] -1 => [OUT]
Parameters
IN
OUT
Result
Description
Overflows
Overflow when decrementing byte operands:
0 - 1 = 255
An overflow occurs if IN equals 0. After decrementing, OUT equals
255.
Overflow when decrementing word operands:
-32.768 - 1 = +32.767
An overflow occurs if IN equals -32.768. After decrementing, OUT
equals 32.767.
IN and OUT must be of the same type, i.e. both bytes or both words.
Permitted operands
5-32
IN
AB/AW, EB/EW, PB/PW, DL, DR, DW, KB, KC, KF, KH,
KM, KY, MB/MW, XW, ZW
OUT
NEG
IN
OUT
IN:
OUT:
Result
Description
A twos complement is formed from IN, inverting bit by bit. The result is
incremented.
Forming a twos complement corresponds to multiplying a fixed point
number by -1. Example:
IN:
OUT:
10010010 10110000
01101101 01010000
IN and OUT must be of the same type, i.e. both bytes or both words.
Permitted operands
AB/AW, EB/EW, PB/PW, DL, DR, DW, KB, KC, KF, KH,
KM, KY, MB/MW, XW, ZW
OUT
FBD
IN
5-33
FBD
ADD_I
IN1
IN2
OUT
Addition
[IN1] + [IN2] => [OUT]
Parameters
IN1
Addend 1
IN2
Addend 2
OUT
Result
Description
IN1 and IN2 are added. IN1 and IN2 are interpreted as signed 16 bit fixed
point numbers. The result is stored in OUT. The arithmetic flags are set. If
the arithmetic flag M110.01 is set, an overflow has occurred and the result
is invalid.
Permitted operands
5-34
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
IN2
OUT
SUB_I
IN1
IN2
OUT
Subtraction
[IN1] - [IN2] => [OUT]
Parameters
IN1
Minuend
IN2
Subtrahend
OUT
Result
Description
IN2 is subtracted from IN1. IN1 and IN2 are interpreted as signed 16 bit
fixed point numbers. The result is stored in OUT. The arithmetic flags are
set. If the arithmetic flag M110.01 is set, an overflow has occurred and the
result is invalid.
Permitted operands
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
IN2
OUT
FBD
IN1
5-35
FBD
MUL_I
IN1
OUT1
IN2
OUT2
Multiplication
[IN1] * [IN2] => [OUT1], [OUT2]
Parameters
IN1
Multiplicand
IN2
Multiplier
OUT1
OUT2
Description
IN1 and IN2 are multiplied. IN1 and IN2 are interpreted as signed 16 bit
fixed point numbers. The result is a signed 32 bit fixed point number. The
low word is stored in OUT1, the signed high word in OUT2. The arithmetic
flags are set.
Permitted operands
5-36
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
IN2
OUT1, OUT2
DIV_I
IN1
OUT1
IN2
OUT2
Division
[IN1] : [IN2] => [OUT1], [OUT2]
Parameters
IN1
Dividend
IN2
Divisor
OUT1
Result
OUT2
Description
IN1 is divided by IN2. IN1 and IN2 are interpreted as signed 16 bit fixed
point numbers. The result OUT1 is also a signed 16 bit fixed point number.
The remainder from the division is stored in OUT2. The arithmetic flags are
set.
Permitted operands
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
IN2
OUT1, OUT2
FBD
IN1
5-37
FBD
Logic operations
AND_B
IN1
IN2
OUT
IN1
Byte 1
IN2
Byte 2
OUT
Result
Description
IN1 and IN2 are AND-linked bit by bit.
The result of the AND operation will be 1 if both bits equal 1. If one of
the bits or both bits equal 0, the result will be 0.
Example: IN1 11110000
IN2 01010010
OUT 01010000
Permitted operands
5-38
IN1
IN2
OUT
AND_W
IN1
IN2
OUT
IN1
Word 1
IN2
Word 2
OUT
Result
Description
IN1 and IN2 are AND-linked bit by bit.
The result of the AND operation will be 1 if both bits equal 1. If one of
the bits or both bits equal 0, the result will be 0.
Example: IN1 11110000 01011100
IN2 01010010 11101110
OUT 01010000 01001100
Permitted operands
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
IN2
OUT
FBD
IN1
5-39
FBD
OR_B
IN1
OUT
IN2
IN1
Byte 1
IN2
Byte 2
OUT
Result
Description
IN1 and IN2 are OR-linked bit by bit.
The result of the logic OR operation will be 1 if one of the bits or both bits
equal 1. If both bits equal 0, the result will be 0.
Example: IN1 11110000
IN2 01010010
OUT 11110010
Permitted operands
OR_W
IN1
IN2
OUT
IN1
IN2
OUT
IN1
Word 1
IN2
Word 2
OUT
Result
Description
IN1 and IN2 are OR-linked bit by bit.
The result of the logic OR operation will be 1 if one of the bits or both bits
equal 1. If both bits equal 0, the result will be 0.
5-40
XOR_B
IN1
IN2
OUT
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
IN2
OUT
IN1
Byte 1
IN2
Byte 2
OUT
Result
FBD
Description
IN1 and IN2 are EXCLUSIVE OR-linked bit by bit.
The result of the EXCLUSIVE OR operation will be 1 if both bits are
different. If both bits are the same, the result will be 0.
Example: IN1 11110000
IN2 01010010
OUT 10100010
Permitted operands
IN1
IN2
OUT
5-41
FBD
XOR_W
IN1
IN2
OUT
IN1
Word 1
IN2
Word 2
OUT
Result
Description
IN1 and IN2 are EXCLUSIVE OR-linked bit by bit.
The result of the EXCLUSIVE OR operation will be 1 if both bits are
different. If both bits are the same, the result will be 0.
Example: IN1 11110000 01011100
IN2 01010010 11101110
OUT 10100010 10110010
Permitted operands
5-42
IN1
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
IN2
OUT
NOT
IN
OUT
Parameters
IN
OUT
Result
Description
A ones complement is formed from the contents of IN, inverting bit by bit.
Example: IN 10010010 10110000
OUT 01101101 01001111
IN and OUT must be of the same type, i.e. both bytes or both words.
Permitted operands
AB/AW, EB/EW, PB/PW, DL, DR, DW, KB, KC, KF, KH,
KM, KY, MB/MW, XW, ZW
OUT
FBD
IN
5-43
FBD
OUT
Rotate left
[IN] rotate n times to the left => [OUT]
Parameters
IN
OUT
Result
Description
IN is rotated n times to the left. N is the number of rotation cycles (0 ... 15).
Bits that drop out on the left (Bit 15) are read in again on the right (Bit 0).
IN and OUT must be of the same type, i.e. both bytes or both words.
Example: N = 3, IN is a word
IN
OUT
10010010 10110000
00100101 01100001
01001010 11000010
10010101 10000100
1st rotation
2nd rotation
3rd rotation
Example: N = 3, IN is a byte
IN
OUT
xxxxxxxx 10110000
xxxxxxx1 0110000x
xxxxxx10 110000xx
xxxxx101 10000xxx
1st rotation
2nd rotation
3rd rotation
5-44
IN
AB/AW, EB/EW, PB/PW, DL, DR, DW, KB, KC, KF, KH,
KM, KY, MB/MW, XW, ZW
0 ... 15
OUT
ROR
IN
N
OUT
Rotate right
[IN] rotate n times to the right => [OUT]
Parameters
IN
OUT
Result
Description
IN is rotated n times to the right. N is the number of rotation cycles
(0 ... 15). Bits that drop out on the right (Bit 0) are read in again on the left
(Bit 15).
IN and OUT must be of the same type, i.e. both bytes or both words.
Example: N = 3, IN is a word
IN
OUT
10010010 10110000
01001001 01011000
00100100 10101100
00010010 01010110
1st rotation
2nd rotation
3rd rotation
IN
OUT
xxxxxxxx 10110000
0xxxxxxx x1011000
00xxxxxx xx101100
000xxxxx xxx10110
FBD
Example: N = 3, IN is a byte
1st rotation
2nd rotation
3rd rotation
IN1
AB/AW, EB/EW, PB/PW, DL, DR, DW, KB, KC, KF, KH,
KM, KY, MB/MW, XW, ZW
0.. 15
OUT
5-45
FBD
SRL
IN
FILL
N
OUT
Shift left
[IN] <-- [FILL] shift n times to the left
Parameters
IN
FILL
OUT
Result
Description
IN is shifted n times to the left. N is the number of shift operations (0 ... 15).
FILL is written in Bit 0.
IN and OUT must be of the same type, i.e. both bytes or both words.
Example: N = 3, FILL = 1, IN is a word
IN
OUT
10010010 10110000
00100101 01100001
01001010 11000011
10010101 10000111
1st shift
2nd shift
3rd shift
IN
OUT
xxxxxxxx
xxxxxxx1
xxxxxx10
xxxxx101
10110000
01100001
11000011
10000111
1st shift
2nd shift
3rd shift
Permitted operands
5-46
IN
AB/AW, EB/EW, PB/PW, DL, DR, DW, KB, KC, KF, KH,
KM, KY, MB/MW, XW, ZW
FILL
A, E, M, T, Z
0... 15
OUT
SRR
IN
FILL
N
OUT
Shift right
[FILL] --> [IN] shift n times to the right
Parameters
IN
FILL
OUT
Result
Description
IN is shifted n times to the right. N is the number of shift operations
(0 ... 15). FILL is written in Bit 15.
IN and OUT must be of the same type, i.e. both bytes or both words.
Example: N = 3, FILL = 1, IN is a word
10010010 10110000
11001001 01011000
11100100 10101100
OUT11110010 01010110
1st shift
2nd shift
3rd shift
FBD
IN
IN
xxxxxxxx 10110000
1xxxxxxx x1011000
11xxxxxx xx101100
OUT111xxxxx xxx10110
1st shift
2nd shift
3rd shift
IN
AB/AW, EB/EW, PB/PW, DL, DR, DW, KB, KC, KF, KH,
KM, KY, MB/MW, XW, ZW
FILL
A, E, M, T, Z
0 ... 15
OUT
5-47
FBD
Jump operations
Op.
Unconditional jump
JMP
Description
A jump to the stated label is always carried out, irrespective of the contents
of the RLO. An unconditional jump only makes sense in a network that it is
processed conditionally.
Jumps are only permitted within a block. A block may contain a maximum
of 300 jumps.
Permitted operands
Label preceded by =, example =xxx
Op.
JMPC
Conditional jump
Description
A jump to the stated label is only carried out if the status of the RLO
equals 1.
If the status of the RLO is 0, the jump command is not performed and the
RLO is set to 1.
Jumps are only permitted within a block. A block may contain a maximum
of 300 jumps.
Permitted operands
Label preceded by =, example =xxx
5-48
Organisational operations
Op.
OPEN
Op.
CAL
When CAL is inserted into a network, the block header of the stated block
is displayed. If the block contains formal parameters, these must be
replaced by actual parameters, i.e. they must be assigned operands. The
operands are simply added to the formal parameters connection lines.
They must conform to the type required by the formal parameter.
Permitted operands
FB, PB, SB
5-49
FBD
A different data block can be selected from within the called block. When
the called block has been processed, the DB selected before the CAL
operation will automatically be reselected.
FBD
Op.
CALC
5-50
ID
Disable alarms
Description
ID disables the alarms on modules with alarm capabilities. Alarms are
detected and stored but are not triggered. Disabling the alarms can
prevent a program section being interrupted at a point where this would not
be desirable.
A max. of 32 alarms can be stored. If this limit is exceeded, the PSS will
switch to a STOP condition. The alarms must be re-enabled before the
next cycle change (IE operation), otherwise an error message will be
triggered and the PSS will switch to a STOP condition.
INFORMATION
This operation is only available in the FS section.
Permitted operands
None
IE
Enable alarms
FBD
Description
IE is used to re-enables the alarms that were disabled through ID.
Stored alarms will be triggered.
INFORMATION
This operation is only available in the FS section.
Permitted operands
None
5-51
FBD
OFF
STOP
Stop program
Description
STOP halts the program running in the FS / ST section. Organisation
block OB128 (FS) or OB028 (ST) will be run. The user program can only
be restarted by a PSS cold start.
Permitted operands
None
5-52
Predefined SBs
6-1
Predefined SBs
Overview
Graphic element
Description
Page
CRC calculation
6-4
SB001
CRCPOLYN
B
B
B
W
SSNR ERG
DBNR CRC
STRT
CNT
W
W
32 bit arithmetic
Addition
6-6
Subtraction
6-8
Multiplication
6-10
SB003
ADD:32
W
W
W
W
Z12
Z11
Z22
Z21
0V
Z3=0
Z32
Z31
X
X
W
W
SB007
SUB:32
W
W
W
W
Z12
Z11
Z22
Z21
0V
Z3=0
Z32
Z31
X
X
W
W
SB011
MUL:32
W
W
W
W
6-2
Z12
Z11
Z22
Z21
Z3=0
Z34
Z33
Z32
Z31
X
X
W
W
W
Graphic element
Description
Page
Division
6-12
Comparison
6-14
SB015
DIV:32
W
W
W
W
Z12
Z11
Z22
Z21
0V
FEH
Z3=0
Z4=0
Z32
Z31
Z42
Z41
X
X
X
X
W
W
W
W
SB041
CMP:32
W
W
W
W
X
Z12
Z11
Z22
Z21
VZ
ERGE
6-3
Predefined SBs
SB001
CRC calculation
INFORMATION
SB001 is only available for the FS section.
Description
Standard function block SB001 is used to calculate the CRC via data and
flag ranges. Using this block, up to five CRC calculations can be made in
one cycle. The maximum run time per call is 2 ms.
The CRC calculation is made on the basis of the generator polynomial
1021H with the start value FFFFH.
SB001
CRCPOLYN
B
B
B
W
SSNR ERG
DBNR CRC
STRT
CNT
W
W
6-4
SSNR
Number of call,
Value range: 0 ... 255
DBNR
Data block number of data range over which the CRC sum is to
be calculated; only if parameter STRT = DL or DR (if STRT =
MB: DBNR is irrelevant)
Value range: 10 ... 255
STRT
CNT
ERG
Result
ERG = 2: CRC calculation incomplete,
another call is required.
ERG = 4: CRC calculation is complete.
ERG = 16: Error, because CNT = 0
CRC
Permitted operands
Parameter
Permitted operands
AW, EW, PW, DW, KC, KF, KH, KM, KY, MW, XW, ZW
ERG, CRC
6-5
Predefined SBs
SB003
Addition
Description
Standard function block SB003 adds two signed 32 bit fixed point numbers
(-2.147.483.648 ... +2.147.483.647).
SB003 is supplied with PSS WIN-PRO. It is stored in the
PSSBLOCKS\FS (FS section) or PSSBLOCKS\ST (ST section) folder in
the installation path and must be imported into the project before it can be
called.
The standard function blocks for the FS and ST section have the same
number and function, but are not identical.
SB003
ADD:32
W
W
W
W
Z12
Z11
Z22
Z21
0V
Z3=0
Z32
Z31
X
X
W
W
Z12
Z11
Z22
Z21
OV
Overflow
6-6
Z3=0
Z32
Z31
Permitted operands
Parameters
Permitted operands
Z11, Z12,
Z21, Z22
EW, PW (in ST section only), DW, KF, KH, KM, MW, XW, ZW
OV, Z3=0
A, M
Z31, Z32
6-7
Predefined SBs
SB007
Subtraction
Description
Standard function block SB007 subtracts two signed 32 bit fixed point
numbers (-2.147.483.648 ... +2.147.483.647).
SB007 is supplied with PSS WIN-PRO. It is stored in the
PSSBLOCKS\FS (FS section) or PSSBLOCKS\ST (ST section) folder in
the installation path and must be imported into the project before it can be
called.
The standard function blocks for the FS and ST section have the same
number and function, but are not identical.
SB007
SUB:32
W
W
W
W
Z12
Z11
Z22
Z21
0V
Z3=0
Z32
Z31
X
X
W
W
Z12
Z11
Z22
Z21
OV
Overflow
Z3=0
6-8
Z32
Z31
Permitted operands
Parameters
Permitted operands
Z11, Z12,
Z21, Z22
EW, PW (in ST section only), DW, KF, KH, KM, MW, XW, ZW
OV, Z3=0
A, M
Z31, Z32
6-9
Predefined SBs
SB011
Multiplication
Description
Standard function block SB011 multiplies two signed 32 bit fixed point
numbers (-2.147.483.648 ... +2.147.483.647). The result is a signed 64 bit
fixed point number.
SB011 is supplied with PSS WIN-PRO. It is stored in the
PSSBLOCKS\FS (FS section) or PSSBLOCKS\ST (ST section) folder in
the installation path and must be imported into the project before it can be
called.
The standard function blocks for the FS and ST section have the same
number and function, but are not identical.
SB011
MUL:32
W
W
W
W
Z12
Z11
Z22
Z21
Z3=0
Z34
Z33
Z32
Z31
X
X
W
W
W
6-10
Z12
Z11
Z22
Z21
Z3=0
Z34
Z33
Z32
Z31
Permitted operands
Parameters
Permitted operands
Z11, Z12,
Z21, Z22
EW, PW (in ST section only), DW, KF, KH, KM, MW, XW, ZW
OV, Z3=0
A, M
Z31, Z32,
Z33, Z34
6-11
Predefined SBs
SB015
Division
Description
Standard function block SB015 divides two signed 32 bit fixed point
numbers (-2.147.483.648 ... +2.147.483.647). The result is a signed 64 bit
fixed point number.
SB015 is supplied with PSS WIN-PRO. It is stored in the
PSSBLOCKS\FS (FS section) or PSSBLOCKS\ST (ST section) folder in
the installation path and must be imported into the project before it can be
called.
The standard function blocks for the FS and ST section have the same
number and function, but are not identical.
SB015
DIV:32
W
W
W
W
Z12
Z11
Z22
Z21
0V
FEH
Z3=0
Z4=0
Z32
Z31
Z42
Z41
X
X
X
X
W
W
W
W
6-12
Z12
Z11
Z22
Z21
OV
Overflow
OV = 1: An overflow has occurred (the quotient or the remainder
exceeds +2.147.483.647); the result is therefore invalid. Z42,
Z41, Z32 and Z31 are set to 0.
With division, an overflow can occur if 8000 0000H is divided by
FFFF FFFFH or FFFF FFFFH is divided by
8000 0000H.
Programming Manual PSS WIN-PRO
Error
FEH = 1: Division by 0
FEH = 0: No error
Z3=0
Z4=0
Z32
Z31
Z42
Z41
Permitted operands
Parameters
Permitted operands
Z11, Z12,
Z21, Z22
EW, PW (in ST section only), DW, KF, KH, KM, MW, XW, ZW
OV, Z3=0,
Z4=0, FEH
A, M
Z31, Z32,
Z42, Z41
6-13
Predefined SBs
SB041
Comparison
Description
Standard function block SB041 either compares two unsigned 32 bit fixed
point numbers (0 ... 4.294.967.295) or two signed 32 bit fixed point
numbers (-2.147.483.648 ... +2.147.483.647).
SB041 is supplied with PSS WIN-PRO. It is stored in the
PSSBLOCKS\FS (FS section) or PSSBLOCKS\ST (ST section) folder in
the installation path and must be imported into the project before it can be
called.
The standard function blocks for the FS and ST section have the same
number and function, but are not identical.
SB041
CMP:32
W
W
W
W
X
Z12
Z11
Z22
Z21
VZ
ERGE
Z12
Z11
Z22
Z21
VZ
Sign
VZ = 1: Comparison is to be signed
VZ = 0: Comparison is to be unsigned
ERGE
6-14
Result
ERGE = 00000001:
ERGE = 00000010:
ERGE = 00000100:
ERGE = 00001000:
ERGE = 00010000:
ERGE = 00100000:
Permitted operands
Parameters
Permitted operands
Z11, Z12,
Z21, Z22
AW, EW, PW (in ST section only), DW, KF, KH, KM, MW, XW, ZW
VZ
A, E, M
ERGE
6-15
Predefined SBs
Notes
6-16
Appendix
Addressing
3rd generation
PSS
FS section [s]
3rd generation
PSS
ST section [s]
L, L(, LN,
Direct
0.5
0.5
O, O(, ON,
Set
1.7
1.2
U, U(, UN, ),
Indirect
1.3
1.1
Direct
6.8
6.8
Set
6.7
6.5
Indirect
8.5
8.5
L, when timer is
Direct
1.6
3.9
stopped
Set
3.8
3.9
Indirect
3.1
6.3
L, when timer is
Direct
15.9
5.2
running
Set
18.3
4.7
Indirect
16.4
7.8
Direct
1.3
1.3
Set
2.2
1.9
Indirect
3.5
1.7
Bit operations
S, R, =, =N
Timers and counters
SE
ZV, ZR
7-1
Appendix
Addressing
3rd generation
PSS
FS section [s]
3rd generation
PSS
ST section [s]
Direct
0.3
0.3
Set
2.5
1.4
Indirect
1.3
1.1
L, T from periphery
byte/word
(PB/PW)
Direct
49.6
1.3
Direct
0.4
0.4
Set
2.5
1.1
Indirect
1.2
1.1
D, I accumulator
Accumulator
0.2
0.1
D, I operand
Direct
0.9
0.9
Set
1.9
1.3
Indirect
1.4
1.2
Direct
1.4
1.3
Set
2.6
2.5
Indirect
1.7
1.7
Direct
0.6
0.6
Set
2.8
1.4
Indirect
1.2
1.2
Accumulator
0.5
0.5
SPA
Label
0.1
0.1
SPB
Label
0.1
0.1
Direct
8.5
10.5
CAL with 10
parameters
Direct
17.5
19.4
2.0
1.4
2.0
2.3
Operation
Byte/word
operations
L, T
+, -, *, :
RL, RR,
SLV, SRV
Jump operations
Organisational
operations
SEG
A
7-2
Direct
New
page
Change
FS and ST overview of operands:
Changes for PSS with FS operating system version 43,
see entries with footnotes 4) and 5)
2-6
2-6
2-9
2-9
2-30
2-30
New
page
Change
FS and ST operand overview:
Changes for PSS with FS operating system version 47
and two SafetyBUS p interfaces, see entries with
footnote 6)
2-1
2-1
Diagnostic configuration
2-7
2-8
2-8
2-8
2-25
2-25
5-15
5-15
5-17
5-18
5-20
5-19
5-21
6-4
7-3
Appendix
New
page
Change
2-32
2-32
New
page
Change
FS and ST operand overview:
New M113.08
2-20
5-12
6-4
6-4
7-4
Old
page
New
page
Change
2-20
2-20
2-21
2-21
3-14
4-10
5-14
3-14
4-10
5-14
Index
A
Access rights
FS to ST section 2-29
ST to FS section 2-29
Accumulator 3-2
decrement
IL 3-27
increment
IL 3-26
load
IL 3-20
negate
IL 3-28
ones complement
IL 3-36
rotate left
IL 3-37
rotate right
IL 3-38
shift left
IL 3-39
shift right
IL 3-40
store
IL 3-21
transpose
IL 3-41
twos complement
IL 3-28
Actual parameters 2-12
Add
32 Bit 6-6
Byte
FBD 5-34
IL 3-29
Word
FBD 5-34
IL 3-29
Addresses 2-29
Addressing 2-29
direct 2-31
free
FS section 2-36
ST section 2-37
indirect 2-32
set 2-34
Address indicator 2-32
Alarm OBs
FS section 2-7
SafetyBUS p 2-5
Alarms
disable
FBD 5-50
IL 3-48
LD 4-22
enable
FBD 5-51
IL 3-48
LD 4-22
organisation blocks
FS section 2-7
SafetyBUS p 2-5
processing
FS section 2-42
ST section 2-43
AND operation
Bit
FBD 5-12
IL 3-8
Bit negated
FBD 5-12
IL 3-10
Bit, open parenthesis
IL 3-9
Byte
FBD 5-38
IL 3-33
Word
FBD 5-39
IL 3-33
Approval
of blocks 2-23
Arithmetic operations
32 Bit 6-6
FBD 5-29
IL 3-26
Auxiliary accumulator 3-2
B
Bit operations
FBD 5-12
AND operation 5-12
OR operation 5-13
reset 5-14
set 5-13
store 5-14
8-1
Index
8-2
divide 5-37
equals comparison 5-27
EXCLUSIVE OR operation 5-41
greater than comparison 5-26
increment 5-29, 5-30
invert 5-43
less than comparison 5-28
multiply 5-36
negate 5-33
ones complement 5-43
OR operation 5-40
store 5-22
subtract 5-35
twos complement 5-33
IL 3-20
add 3-29
AND operation 3-33
convert BCD to binary 3-22
convert binary to BCD 3-23
decrement 3-27
divide 3-32
equals comparison 3-25
EXCLUSIVE OR operation 3-35
greater than comparison 3-24
increment 3-26
invert 3-36
less than comparison 3-25
load 3-20
multiply 3-31
negate accumulator 3-28
ones complement 3-36
OR operation 3-34
subtract 3-30
twos complement from accumulator 3-28
LD 4-16
decrement 4-20
equals comparison 4-18
greater than comparison 4-16
less than comparison 4-19
C
Check sum see CRC sum
Check sum calculation 6-4
Close parenthesis
Bit
IL 3-13
Comments
FBD 5-2
IL 3-2
LD 4-2
Compare
32 bit 6-14
Byte equals
FBD 5-27
IL 3-25
LD 4-18
Byte greater than
FBD 5-26
IL 3-24
LD 4-16
Byte less than
FBD 5-28
IL 3-25
LD 4-19
Word equals
FBD 5-27
IL 3-25
LD 4-18
Word greater than
FBD 5-26
IL 3-24
LD 4-17
Word less than
FBD 5-28
IL 3-25
LD 4-19
Constants 2-26
types 2-26
Convert
BCD to binary
FBD 5-24
IL 3-22
Binary to BCD
FBD 5-25
IL 3-23
Byte to word
FBD 5-23
Word to byte
FBD 5-23
Count backwards
FBD 5-20
IL 3-19
LD 4-15
Counters
decrement
FBD 5-20
IL 3-19
LD 4-15
increment
FBD 5-20
IL 3-18
LD 4-15
Count forwards
FBD 5-20
IL 3-18
LD 4-15
CRC calculation 6-4
CRC sum
of blocks 2-4
Current path 4-1
Cycle OB
FS section 2-5
ST section 2-8
D
Data blocks 2-19
formats 2-19
select
FBD 5-49
IL 3-44
LD 4-20
system data blocks
FS section 2-19
ST section 2-20
Data byte
left 2-19
right 2-19
DB 2-19
Deactivation OBs 2-8
Decrement
FBD 5-31, 5-32
IL 3-27
Definition of symbols 1-2
Diagnostic configuration 2-2
Direct addressing 2-31
Disable
alarms
FBD 5-50
IL 3-48
LD 4-22
Divide
32 Bit 6-12
Byte
FBD 5-37
IL 3-32
Word
8-3
Index
IL 3-46
LD 4-22
from Pilz 2-16
unconditional call
FBD 5-49
IL 3-45
LD 4-21
FBD 5-37
IL 3-32
DL 2-19
DR 2-19
DW 2-19
E
Enable
alarms
FBD 5-51
IL 3-48
LD 4-22
Encryption 2-24
Equals see Store
Error OBs
FS section 2-7
ST section 2-8
Error processing
FS section 2-44
ST section 2-44
EXCLUSIVE OR operation
Byte
FBD 5-41
IL 3-35
Word
FBD 5-42
IL 3-35
Jump operations
FBD 5-47
IL 3-42
LD 4-20
Jumps
conditional
FBD 5-47
IL 3-43
LD 4-20
unconditional
FBD 5-47
IL 3-42
LD 4-20
FALSE 2-39
FB 2-11
FBD 2-3, 5-1
Flags 2-25
Flip-Flop
RS 5-16
SR 5-15
Formal parameter
names 2-11
of function blocks 2-11
types 2-11
Formats
of data blocks 2-19
Free addressing
FS section 2-36
ST section 2-37
Function Block Diagram 2-3, 5-1
Function blocks 2-11
conditional call
FBD 5-49
8-4
I
IL 2-3, 3-1
Increment
FBD 5-29, 5-30
IL 3-26
Indirect addressing 2-32
Instruction list 2-3, 3-1
Invert
accumulator
FBD 5-43
IL 3-36
L
Labels
FBD 5-2
IL 3-1
LD 4-2
Ladder diagram 2-3, 4-1
LD 2-3, 4-1
Load
Bit
IL 3-7
LD 4-8
Bit negated
IL 3-8
Bit, open parenthesis
IL 3-7
Byte
IL 3-20
Word
IL 3-20
Logic 2-39
Logic operations
FBD 5-38
IL 3-33
M
Multiply
32 bit 6-10
Byte
FBD 5-36
IL 3-31
Word
FBD 5-36
IL 3-31
N
Negate
FBD 5-33
IL 3-28
Nesting level 2-38
Networks 2-25
comment
FBD 5-2
LD 4-2
FBD 5-1
LD 4-1
O
OBs 2-5
Ones complement
FBD 5-43
IL 3-36
Operands 2-25
IL 3-1
Operations 2-25
execution times 7-1
FBD 5-4
IL 3-4
LD 4-4
structure
IL 3-1
Operators
IL 3-1
Organisation blocks 2-5
alarm OBs
FS section 2-7
SafetyBUS p 2-5
cycle OB
FS section 2-5
ST section 2-8
deactivation OBs 2-8
error OBs
FS section 2-7
ST section 2-8
FS section 2-5
general reset OB 2-10
OB001 2-8
OB010 ... 073 2-5
OB020 2-9
OB022 2-10
OB023 2-8
OB024 2-10
OB025 2-8
OB027 2-8
OB028 2-10
OB029 2-8
OB101 2-5
OB120 2-6
OB124 2-6
OB125 2-7
OB127 2-7
OB128 2-6
OB130 ... 133 2-7
OB140 ... 171 2-7
OB200 ... 231 2-8
SafetyBUS p OBs 2-7
start-up OB
FS section 2-6
ST section 2-9
STOP OBs
FS section 2-6
ST section 2-10
ST section 2-8
OR operation
8-5
Index
Bit
FBD 5-13
IL 3-11
Bit negated
FBD 5-13
IL 3-13
Bit, open parenthesis
IL 3-12
Byte
FBD 5-40
IL 3-34
Word
FBD 5-40
IL 3-34
Outputs
shut down
FBD 5-51
IL 3-49
LD 4-23
P
Parameters
of function blocks 2-11
of standard function blocks 2-17
PB 2-10
Periphery access 2-26
PII
2-26
PIO 2-26
Process images 2-26
Process interrupts see Alarms
Program 2-2
stop
FBD 5-52
IL 3-49
LD 4-23
Program blocks 2-10
conditional call
FBD 5-49
IL 3-46
LD 4-21, 4-22
unconditional call
FBD 5-49
IL 3-45
LD 4-21
Program cycle 2-40
Programming
linear 2-40
structured 2-41
Programming languages
8-6
FBD 5-1
Function Block Diagram 2-3
IL 3-1
Instruction List 2-3, 3-1
Ladder Diagram 2-3
LD 4-1
Programming model 2-1
Programming rules
IL 3-3
Project 2-1
PSS configuration 2-2
R
Read-only
on data blocks 2-20
Read/Write
on data blocks 2-20
Reset
Bit
FBD 5-14
IL 3-14
LD 4-10
Result of logic operation
FBD 5-3
IL 3-2
LD 4-3
RLO
FBD 5-3
IL 3-2
LD 4-3
Rotate
left
FBD 5-44
IL 3-37
right
FBD 5-45
IL 3-38
RS Flip-Flop 5-16
S
SafetyBUS p
alarm OBs 2-5
configuration 2-2
organisation blocks 2-7
SB 2-17
SB001 6-4
SB003 6-4, 6-6
SB007 6-8
SB011 6-10
SB015 6-12
SB041 6-14
SB254
FUNK 180 2-38
SB255
FUNK 50 2-22
Segments
FBD 5-2
LD 4-2
Operation
IL 3-1, 3-47
Select data block
FBD 5-49
IL 3-44
LD 4-20
Set
Bit
FBD 5-13
IL 3-14
LD 4-10
Set addressing 2-33
Shift
left
FBD 5-45
IL 3-39
right
FBD 5-46
IL 3-40
Shut down
outputs
FBD 5-51
IL 3-49
LD 4-23
SR Flip-Flop 5-15
Standard function blocks 2-17
call 2-18
conditional call
FBD 5-49
IL 3-46
LD 4-22
from Pilz 2-18
program 2-18
unconditional call
FBD 5-48
IL 3-45
LD 4-21
Start-up OB
FS section 2-6
ST section 2-9
Stop
program
FBD 5-51
IL 3-49
LD 4-23
STOP OB
FS section 2-6
ST section 2-10
Store
Bit
FBD 5-14
IL 3-15
LD 4-10
Byte
FBD 5-22
IL 3-21
Word
FBD 5-22
IL 3-21
Store NOT
Bit
FBD 5-14
IL 3-15
LD 4-11
Subtract
32 bit 6-8
Byte
FBD 5-35
IL 3-30
Word
FBD 5-35
IL 3-30
Switch-on delay
FBD 5-17
IL 3-16
LD 4-12
Symbols
FBD 5-2
for operands 2-30
IL 3-1
LD 4-2
System data blocks
FS section 2-19
ST section 2-20
8-7
Index
T
Tags 2-30
Time
operation execution times 7-1
Time base
FBD 5-17
IL 3-16
LD 4-12
Timer
start
FBD 5-17
IL 3-16
LD 4-12
Timer status
FBD 5-18
IL 3-16
LD 4-13
Time value
FBD 5-17
IL 3-16
LD 4-12
Transfer see Store
Transpose accumulator
IL 3-41
TRUE 2-39
Twos complement
FBD 5-33
IL 3-28
IL
add 3-29
AND operation 3-33
convert BCD to binary 3-22
convert binary to BCD 3-23
decrement 3-27
divide 3-32
equals comparison 3-25
EXCLUSIVE OR operation 3-35
greater than comparison 3-24
increment 3-26
invert 3-36
less than comparison 3-25
load 3-20
multiply 3-31
negate accumulator 3-28
ones complement 3-36
OR operation 3-34
rotate left 3-37
rotate right 3-38
shift left 3-39
shift right 3-40
subtract 3-30
twos complement from accumulator 3-28
LD 4-16
equals comparison 4-18
greater than comparison 4-17
less than comparison 4-19
W
Word modules
address
FS section 2-36
ST section 2-37
Word operations 3-20
FBD 5-21
add 5-34
AND operation 5-38
convert BCD to binary 5-24
convert binary to BCD 5-25
convert word to byte 5-23
decrement 5-31, 5-32
divide 5-37
equals comparison 5-26
EXCLUSIVE OR operation 5-42
greater than comparison 5-25
increment 5-29, 5-30
invert 5-43
8-8
X
XW
FS section 2-36
ST section 2-37
XW addresses
FS section 2-36
ST section 2-37
XW process image
FS section 2-36
Type
Address range
Description
Write
Read
Direct
Set
Indirect
Access Addressing
00.00 - 23.312)
32.00 - 95.313)
132.00 - 195.316)
EB
00.00 - 23.242)
32.00 - 95.243)
132.00 - 195.246)
EW
00.00 - 23.162)
32.00 - 95.163)
132.00 - 195.166)
00.00 - 23.312)
32.00 - 95.313)
132.00 - 195.316)
AB
00.00 - 23.242)
32.00 - 95.243)
132.00 - 195.246)
AW
00.00 - 23.162)
32.00 - 95.163)
132.00 - 195.166)
PB
00.00 - 23.242)
32.00 - 95.243)
132.00 - 195.246)
PW
00.00 - 23.162)
32.00 - 95.163)
132.00 - 195.166)
DB
DB
010 - 255
Data block
DL
0000 - 1023
(bit 8 - 15)
DR
0000 - 1023
(bit 0 -7)
DW
0000 - 1023
Data word
(bit 0 - 15)
FB
001 - 255
Function block
KB
0-255
Constant
Byte
KC
Constant
Character (2 characters)
KF
-32768...+32767
Constant
KH
0000 - FFFF
Constant
Hexadecimal figure
KM
16 bit
Constant
Bit state
KY
Constant
2 Byte
000.00 - 063.31
114.00 - 114.314)
Flags
Schnittmarke
Flag byte
MB
064.00 - 099.24
130.00 - 255.244)
MW
000.00 - 063.16
114.00 - 114.164)
Flag word
MW
064.00 - 099.16
130.00 - 255.164)
100.00 - 104.31
105.00 - 109.314)
MB
100.00 - 104.24
105.00 - 109.244)
MW
x1)
x1)
100.00 - 104.16
105.00 - 109.164)
x1)
110.00
110.01
111.00
111.01
111.02
111.03
112.00
112.01
112.02
112.03
112.04
112.05
Write
1)
2)
3)
4)
5)
6)
Access Addressing
113.00
113.01
113.02
113.03
113.04
113.05
113.06
113.08
MB
114.00, 114.08,
114.16, 114.24
x4)
MW
114.00, 114.16
x4)
115.00 - 115.31
MB
115.00 - 115.24
MW
115.00 - 115.16
116.00 - 116.31
MB
116.00 - 116.24
MW
116.00 - 116.16
117.00 - 117.31
MB
117.00 - 117.24
Indirect
000.00 - 063.24
114.00 - 114.244)
Description
Set
MB
Address range
Direct
Flags (FS)
Type
Write
064.00 - 099.31
130.00 - 255.314)
Indirect
Access Addressing
Set
Description
Direct
Address range
Read
Type
Read
Overview of Operands: ST
Continued)
117.00 - 117.16
OB
PB
001 - 255
Program block
SB
001 - 255
000 - 063
Timer
064 - 127
Timer (FS)
XW
00000-16383
000 - 063
Counters
064 - 127
Counter (FS)
ZW
000 - 063
ZW
064 - 127
...
www
www.pilz.com
Technical support
+49 711 3409-444
Indirect
MW
Set
Access Addressing
Direct
Description
Read
Address range
Write
Type