UNIVERSITY OF MAURITIUS

FACULTY OF ENGINEERING

SECOND SEMESTER / YEARLY EXAMINATIONS

MAY 2008
PROGRAMME

BEng (Hons) Manufacturing Engineering Level 1

BEng (Hons) Mechanical Engineering Level 1

MODULE NAME

Electrical Engineering and Electronics

DATE

Tuesday
6 May 2008

TIME

13:30 16:30 Hours

NO. OF
QUESTIONS SET

INSTRUCTIONS TO CANDIDATES
Answer ANY FIVE (5) Questions.

MODULE CODE

DURATION
NO. OF QUESTIONS
TO BE ATTEMPTED

ELEC 1041Y(1)
3 Hours
5

1 ELECTRONICS ELEC 1041Y(1)

ELECTRICAL ENGINEERING AND
Answer ANY FIVE (5) Questions.

Question 1 [20 marks]

Find the total resistance between terminals a and b in the circuit of Figure Q1a.
[5 marks]
2

5.2

10

12

(a)

10

10

b
3

Figure Q1a
(b)

For the circuit shown in Figure Q1b, use node-to-datum analysis to determine Va .
[10 marks]

is = 5ix
ix

5V

Va

10V

10
Datum
Figure Q1b

(c)

For the circuit shown in Figure Q1c, all the diodes have an on voltage VF = 0.7 V.
Calculate the current supplied by the battery.
1 k

D1

500
5V
D2

Figure Q1c
Page 1 of 6

[5 marks]
1.5k
D3

2 ELECTRONICS ELEC 1041Y(1)

ELECTRICAL ENGINEERING AND

Question 2 [20 marks]

(a)

Use mesh analysis to evaluate the mesh currents i1 and i2 in Figure Q2a.
[8 marks]

40 V

i1

i2

20 V

Figure Q2a
(b)

For the circuit shown in Figure Q2b, the capacitor is initially uncharged and the
switch is closed at time t = 0 .
(i)

Find the Thevenins equivalent of the circuit on the left of section a-b.

(ii)

Find the time constant of the circuit and the final capacitor voltage.

(iii)

Sketch the waveform of vc (t ) and ic (t ) .

[12 marks]

10

12 V

ic (t)
0.2 F

15

b
Figure Q2b

Page 2 of 6

vc(t)

3 ELECTRONICS ELEC 1041Y(1)

ELECTRICAL ENGINEERING AND

Question 3 [20 marks]

(a)

Consider the circuit in Figure Q3a. The voltage source is described by:

v s = 750 cos(5000t + 30 o ) (Volts)

(i)

Construct the phasor-domain circuit.

(ii)

Calculate the phasor of current i.

(iii)

Write down the time domain expression for current i.

[8 marks]
32 mH

90

vs

5 F

Figure Q3a
(b)

A.c. power with r.m.s voltage 250V is transmitted to an industrial load of

impedance 39 + j 26 over a transmission line with impedance 1 + j 4 .
(i)

Calculate the phasors for the load current and voltage.

(ii)

Calculate the average and reactive power delivered to the load.

(iii)

What is the power factor of the load, and state how it can be improved.
[12 marks]

Page 3 of 6

4 ELECTRONICS ELEC 1041Y(1)

ELECTRICAL ENGINEERING AND

Question 4 [20 marks]

(a)

With the help of a circuit diagram, show how a 240V (r.m.s.) 50Hz a.c. supply can
be converted into a d.c supply of roughly 16V, with a ripple voltage not exceeding
1V for a resistive load of 500. Assume a centre tapped transformer is available,
but specify the turn ratio.
[7 marks]

(b)

A Zener diode regulator circuit is shown in Figure Q4b. It is given that VS varies
between 12 and 16 V, and the load current IL varies between 0 and 50 mA. Also,
the Zener diode has a breakdown voltage VZ of 10 V, a knee current IZK of 2 mA
and a maximum power dissipation PM of 2 W. Calculate the range of values of RA
such that the load voltage is constant at 10 V.
[8 marks]
RS = 20

RA

IL

RL

Vs

Figure Q4b
(c)

Draw the output characteristics of an n-p-n transistor in the common-emitter

mode. Show several values of base current. Indicate clearly the cut-off region,
forward-active region and saturation region.
[5 marks]

Page 4 of 6

5 ELECTRONICS ELEC 1041Y(1)

ELECTRICAL ENGINEERING AND

Question 5 [20 marks]

(a)

For the circuit shown in Figure Q5a, the transistor has the following parameters:
F = 100, VBE,ON = 0.7 V, VCE,SAT = 0.1 V. Calculate IB, IC, VCE and the power
dissipated in the transistor.
[6 marks]
+10 V

200

50 k

0V

Figure Q5a
(b)

State four ways in which a practical op-amp deviate from the ideal behaviour,
giving typical values.
[4 marks]

(c)

For the circuit shown in Figure Q5c, all the op-amps are ideal and are powered
with a 15V supply. Calculate the voltages Va and Vo .
[10 marks]

1 k

4 k

1 k

1V

2V

Va

2 k
4 k
Figure Q5c

Page 5 of 6

Vo

6 ELECTRONICS ELEC 1041Y(1)

ELECTRICAL ENGINEERING AND

Question 6 [20 marks]

(a)

In certain 8-bit fixed point computer, negative numbers are represented in their
signed-2s-complement form. The contents of two registers A and B are 01100101
and 10011100 respectively. Perform the following arithmetic operations in binary
and interpret the 8-bit result in decimal. Detect any overflow.
(i)

(b)

A+B

(ii)

A-B

[7 marks]

Use Boolean algebra to simplify the following function:

f ( A, B, C ) = ( A + B) ( A + C ) + C + A + B + C

(c)

[7 marks]

Implement the function g ( A, B, C ) = A B + B C + A B C using only 3-input

NAND gates. Assume that the input variables are available in their normal form
only (i.e. not complemented).
[6 marks]

Question 7 [20 marks]

(a)

Use the Karnaugh map method to find the minimal sum-of-products expression in each
of the following:

(i)

f (a, b, c, d ) = m(0, 2, 3, 8, 9, 10, 11)

(ii)

f ( A, B, C , D) = C D + B D + BCD + B C

(iii)

f (W , X , Y , Z ) = m(0, 5, 7, 12, 15) + d (2, 4, 6, 8, 10)

[8 marks]
(b)

Show how a 4-bit parallel adder may be constructed using full-adder blocks.
Explain how the circuit may be modified for 4-bit parallel subtraction.
[6 marks]

(c)

With the help of diagrams, explain the operation of the following sensors:
(i)

a thermocouple;

(ii)

a piezoelectric sensor.

[6 marks]

END OF QUESTION PAPER

/nr

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