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Project4 15
Project4 15
Project4 15
Supervisor: Mr Denis Ng
1.0
Introduction
1.1
Objective
The goal of this project is to design, simulate and implement circuits to demonstrate
either FSK or FM modulation and demodulation of signals. This project is mainly divided
into two parts; transmitter and receiver. At the transmitter, the oscillator generates the
required frequency to produce a direct modulation signal and is transmitted by means of
wireless transmission. At the receiver, the transmitted signals will be collected and
demodulated via the receiver blocks to retrieve the message signal.
1.2
Specification
In this project, a transmitter with carrier frequency of 155MHz is used. The transmitter and
receiver should have low power consumption, low noise and good linearity. All modules are
built using the basic SMD electronic component e.g.; Resistor, capacitor, inductor and
transistor only.
Message Frequency
fm: 18MHz Signal
Carrier Frequency
fLO: 155MHz
Task allocation
2.0
Transmitter
Modulator
b)
Oscillator
c)
Mixer
d)
e)
Power amplifier
f)
Antenna
2.1
Modulator
The oscillator design is proposed in order to implement local oscillator and voltage controlled
oscillator. We will need to assume the values of C2 and C3 in the following diagram with
good estimation of L1 inductance value in order to get the Colpitts oscillator part. Before
doing this, we need to define and biasing current and values according to the requirements
and specifications of the transistor. The choice of the transistor is very important in designing
oscillator since it is needed that the transistors maximum oscillation and transition frequency
must be a higher than the oscillation frequency. For this case, we managed to choose RF
transistors which are BFR92P which has good transition frequency of 5GHz typical frequency
which is higher than our desired oscillation frequency of 171MHz. The model for RF
transistor which we use in the design is BFR92P.
There is a varactor which is used in the terminal of the supply voltage (0<V<5v) which will
make the circuit produce the frequency of center frequency plus or minus the message
frequency. Figure 1 shows the modulator circuit.
Figure 1: Fm modulator
R2 and R1 are used to control biasing of the transistor. Varactor is used as voltagecontrolled capacitors. C1, C2 and L2 form the colpitt oscillator. C4 is used for biasing. C3 and C6
are used to block the dc. L1 is a RF choke that used to block higher-frequency alternating
current (AC) in an electrical circuit, while passing lower-frequency or direct current (DC).
Calculation:
From the BFR92P datasheet, the maximum collector current is 40mA. so we choose
collector current equal to 15mA. Dc current gain () from the datasheet is equal to 90.
From BBY92P datasheet, when input is 1V, the capacitor is 40pF.
1. Colpitt Oscillator
We assume that L=5.6nH, C1=6.8nF, Cv=40pF and message frequency for our project is
18MHz. Insert all these values into formula below to find C2.
=
( + )
+
= .
2. Biasing
= = 15
15
= =
= 1.667 x 104
90
= 10 = 1.667 x 103
10 5
1 =
=
= 333
15
R1=333, R2=10, L1=5.6nH, C1=6.8nF, C2=6.8nF,L1=100n,c3=c4=c5=c6=2.2u,R3=50
Simulation:
Time domain waveform:
Frequency domain
2.2
Oscillator
In Colpitts oscillator capacitors C1,C2 and inductor L1 forms the tank circuit. The frequency
of the oscillation is determined by the value of the capacitors and inductor in the tank circuit.
In Colpitts, the capacitive voltage divider setup in the tank circuit works as the feedback
source and this arrangement gives better frequency stability when compared to the Hartley
oscillator which uses an inductive voltage divider setup for feedback. In the circuit diagram,
R1 and R2 give voltage divider biasing to the transistor. R3 and R4 are used to control biasing
current. C4 is a decoupling capacitor which prevent ac signal flow into DC source that mean
short ac signal to ground.
Calculation:
1. Oscillator frequency
=
1
21 1 2 /(1 + 2 )
15
=
= 1.667 x 104
90
= 10 = 1.667 x 103
3 + 4 =
10 5
=
= 333
15
=
1 + 2
10 x
1 + 2 =
2
= 5.7
1 + 2
= 6000
2 = 3420
Simulation:
Time domain waveform:
Frequency spectrum:
Implementation:
Time domain waveform:
Frequency Spectrum:
From spectrum analyser, we know that the signal attenuate by -19.2dBm and the
oscillator output frequency is about 153.8MHz. We cant get the 155MHz frequency
because of the stray capacitance of high frequency printed circuit board.
2.3
Mixer
fRf = 18 MHz
In the circuit diagram, R3, R4, R5 and R6 are used to control biasing of the transistor. C4 is a
decoupling capacitor which prevent ac signal flow into DC source that mean short ac signal to
ground. C1 and C3 are used to block dc. C2 is the emitter bypass capacitor. Job of the emitter
bypass capacitor is to bypass the AC signal from dropping across R5 (is to short the ac signal
to ground) and it will alter the DC biasing conditions of the transistor and result will be
reduced gain. R1 and R2 are the source resistance which is always 50. R7 is SMA connector
resistance which is 50.
Calculation
1. Dc Biasing Analysis
From the BFS17 datasheet, the maximum collector current is 25mA so we choose collector
current equal to 15mA. Dc current gain () from the datasheet is around 90 under the
condition VCE= 1V.
= = 15
=
15
=
= 1.667 x 104
90
= 10 = 1.667 x 103
6 =
4
= 266
15
= 6 = 5
5 =
5
=
= 330
15
= + 0.8 = 5.8
=
3 + 4
10 x
3 + 4 =
4
= 5.8
3 + 4
= 6000
4 = 3480
So we let R1=50, R2= 50, R3 = 2500, R4=3000, R5=300, R6= 200, R7 = 50,
C1=C2=C3=C4= 2.2uF
Simulation:
Time domain:
Frequency domain
From the simulation, we can see that the output of the mixer contain harmonic term that is
155MHz and the up convert frequency that is 155MHz + 18MHz = 173MHz.
Hardware Implementation:
Time domain waveform
Frequency Spectrum:
From frequency spectrum analyser, we can see that the output of the mixer is matched the
simulation result.
The oscillator oscillate at 153.4MHz and we set message frequency to 20MHz (message
frequency is 18Mhz for our project). so the output of the mixer will be
153.4+20=173.4MHz which is matchedthe implementation result. So the mixer is
functioning well.
2.4
Bandpass filter
A band-pass filter is a device that passes frequencies within a certain range and rejects
(attenuates) frequencies outside that range. The main function of such a filter in a transmitter
is to limit the bandwidth of the output signal to the band allocated for the transmission. This
prevents the transmitter from interfering with other stations. In a receiver, a bandpass filter
allows signals within a selected range of frequencies to be heard or decoded, while preventing
signals at unwanted frequencies from getting through. There are two main types of filter are
considered namely Chebyshev and Butterworth. We have decided to use passive Chebyshev
filter because it is steeper compare to the Butterworth filter. Figure 5 shows the frequency
response of the bandpass filter.
Figure 5
The bandwidth of the filter is simply the difference between the upper fH and lower fL frequencies.
In our project, the centre frequency is the up converted frequency that is 171MHz and we select
bandwidth 20MHz so lower frequency will be 161MHz and upper frequency is 181MHz. Figure 6
show the bandpass filter circuit with fifth order.
Figure 6
Calculation:
To design band pass filter with cut off frequency at 153MHz 18MHz, from Chebyshev low
pass prototype element table with 0.5dB Ripple, we can see that at N=5,
1 = 1.7058, 2 = 1.2296, 3 = 2.5408, 4 = 1.2296, 5 = 1.7058, 6 = 1
BW = 181-161 = 20 MHz
= 181 161 = 170.707
1 = 5 =
3 =
1.7058
= 34.1;
50
2.5408
= 50.82;
50
2 = 4 = 1.2296 50 = 61.48;
L1 = L5 =
2 20 106
=
= 3.203
2 (2 170.707 106 )2 34.1 103
C1 = C5 =
L2 = L4 =
C2 = C4 =
61.48
=
= 489.242
2 20 106
2 20 106
=
= 1.779
2 (2 170.707 106 )2 61.48
C3 =
L3 =
34.1 103
=
= 0.271
2 20 106
50.82 103
=
= 0.405
2 20 106
2 20 106
=
= 2.1494
2 (2 170.707 106 )2 50.82 103
Simulation:
FFT for bandpass filter
Hardware implementation:
There are two frequency components beside the upconverted frequency because the bandpass
filter is not steeper enough so the two signals are not filtered out.
Figure 7
In the circuit diagram, R1, R2, R4 and R5 are used to control biasing of the transistor. C3 is
the emitter bypass capacitor which is used to short the AC signal to ground. DC biasing
conditions of the transistor will alter if there is not emitter bypass capacitor and result in
reduce gain. C1 and C2 are used to block dc. R7 is source resistance which is always 50 and
R3 is SMA connector resistor that is 50.
Calculation:
1. DC Biasing Analysis:
From the BFR520 datasheet, the maximum collector current is 70mA. We select
collector current equal to 60mA. Dc current gain () from the datasheet is around 110.
= = 60
60
= =
= 5.45x 104
110
= 10 = 5.45 x 103
5 =
10 4
=
= 100
60
4 =
5
=
= 100
60
= + 0.8 = 5.8
=
1 + 2
10 x
1 + 2 =
2
= 5.8
1 + 2
= 1834
2 = 1063
2. Ac small signal
25
=
= 46
5.45x 104
= 1 ||2 || = 42
= 5 = 100
= 5 ||3 = 5 ||3
5 ||3
=
x x
5 ||3
=
x
= 33.1
Simulation:
From simulation, the gain is around 9.5 which is different from calculation.
The graph above shows that the signal is amplified from 0dBm to 6.6dBm. Actually there are
some losses in the cable which is around -9.8dBm, so the signal is amplified from
9.8dBm to 6.6dBm.
Output
-64
-57
-48
-38
-28
-16
-6.5
2.9
6.6
6.7
5
Output Power(dBm)
15
5
-80 -75 -70 -65 -60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5-5 0
-15
-25
-35
-45
-55
-65
-75
10 15 20
3.0 Receiver
b)
c)
Mixer
d)
oscillator
e)
Power amplifier
* Bandpass filter for high frequency, mixer, oscillator and power amplifier circuit is the same
as the transmitter.
3.1
This bandpass filter circuit is the same as the transmitter. In a receiver, a bandpass filter allows
signals within a selected range of frequencies to be heard or decoded, while preventing signals at
unwanted frequencies from getting through. Figure 8 shows the circuit of the bandpass filter with
centre frequency=171MHz and BW=20MHz with fifth order.
Calculation:
From Chebyshev low pass prototype element table with 0.5dB Ripple, we can see that at N=5,
1 = 1.7058, 2 = 1.2296, 3 = 2.5408, 4 = 1.2296, 5 = 1.7058, 6 = 1
Simulation:
Hardware Implementation:
Calculation:
From the BFS17 datasheet, the maximum collector current is 25mA so we select collector
current equal to 15mA. Dc current gain () from the datasheet is equal to 90.
= = 15
=
15
=
= 1.667 x 104
90
= 10 = 1.667 x 103
1 =
10 5
=
= 333
15
Implementation:
The waveform above show that the signal is amplified from -9.6dBm to -3.1dBm
3.3 Oscillator
An oscillators function is to generate stable harmonic oscillations at a fixed carrier
frequency. In our project, the carrier frequency is 155MHz. Figure 10 shows the oscillator
circuit which is the same as the transmitter oscillator.
Calculation:
1.
Oscillator frequency
=
1
21 1 2 /(1 + 2 )
2.
Dc Biasing Analysis
From the BFS17 datasheet, the maximum collector current is 25mA. We cant set the
collector current to 25mA because the transistor will get hotter so we choose collector current
equal to 15mA. Dc current gain () from the datasheet is equal to 90.
= = 15
=
15
=
= 1.667 x 104
90
= 10 = 1.667 x 103
3 + 4 =
10 5
=
= 333
15
=
1 + 2
10 x
1 + 2 =
2
= 5.7
1 + 2
= 6000
2 = 3420
Simulation:
Frequency spectrum:
Implementation:
3.4
Mixer
Received signal from antenna (173MHz) and LO signal is 155MHz from the oscillator are the
input to the mixer. In the receiver, we want to down convert the frequency components that
mean fReceiver - fLO so the expected output from mixer will be 18MHz which is our message
frequency. Figure 11 show the input and output of the mixer for our project. Figure 12 shows
the mixer circuit.
Calculation
2. Dc Biasing Analysis
From the BFS17 datasheet, the maximum collector current is 25mA so we choose collector
current equal to 15mA. Dc current gain () from the datasheet is around 90 under the
condition VCE= 1V.
= = 15
=
15
=
= 1.667 x 104
90
= 10 = 1.667 x 103
6 =
4
= 266
15
= 6 = 5
5 =
5
=
= 330
15
= + 0.8 = 5.8
=
3 + 4
10 x
3 + 4 =
4
= 5.8
3 + 4
= 6000
4 = 3480
So we let R1=50, R2= 50, R3 = 2500, R4=3000, R5=300, R6= 200, R7 = 50,
C1=C2=C3=C4= 2.2uF
Simulation:
Time domain waveform
Frequency Spectrum:
Implementation:
3.5
This filter is used to extract the wanted frequency that is 18MHz and remove all the other
unwanted frequency. The centre frequency is the down converted frequency that is 18MHz and
we select bandwidth 20MHz so lower frequency will be 8MHz and upper frequency is 28MHz.
Figure 13 shows the bandpass filter with fifth order.
Calculation:
BW = 28 - 8 = 20 MHz
= 28 8 = 14.97
1 = 5 =
3 =
1.7058
= 34.1;
50
2.5408
= 50.82;
50
2 = 4 = 1.2296 50 = 61.48;
L1 = L5 =
2 20 106
=
= 416.3
2 (2 14.97 106 )2 34.1 103
C1 = C5 =
34.1 103
=
= 271.5
2 20 106
L2 = L4 =
61.48
=
= 489.2
2 20 106
C2 = C4 =
2 20 106
=
= 231.0
2 (2 14.97 106 )2 61.48
C3 =
L3 =
50.82 103
=
= 404.4
2 20 106
2 20 106
=
= 279.5
2 (2 14.97 106 )2 50.82 103
Simulation:
3.6
Power Amplifier
The main purpose of the power amplifier is to boost the transmitting signal. Figure 14 shows
the power amplifier circuit which is the same as transmitters amplifier.
Calculation:
1. DC Biasing Analysis:
From the BFR520 datasheet, the maximum collector current is 70mA. We select
collector current equal to 60mA. Dc current gain () from the datasheet is around 110.
= = 60
60
= =
= 5.45x 104
110
= 10 = 5.45 x 103
5 =
10 4
=
= 100
60
4 =
5
=
= 100
60
= + 0.8 = 5.8
=
1 + 2
10 x
1 + 2 =
2
= 5.8
1 + 2
= 1834
2 = 1063
2. Ac small signal
25
=
= 46
5.45x 104
= 1 ||2 || = 42
= 5 = 100
= 5 ||3 = 5 ||3
5 ||3
=
x x
5 ||3
=
x
= 33.1
Simulation:
From simulation, the gain is around 9.5 which is different from calculation.
Implementation:
The graph above shows that the signal is amplified from 0dBm to 4.4dBm. Actually there are
some losses in the cable which is around -9.8dBm, so the signal is amplified from
9.8dBm to 4.4dBm.