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School of Engineering and Information Technology

ASSESSMENT COVER SHEET


Student Name

Muhammad Moeez Sheikh

Student ID

S275122

Assessment Title

Lab 1

Unit Number and Title

Analogue Deviced

Lecturer/Tutor

Dr Sina Vafi

Date Submitted

3rd April 2015

Date Received
Office use only
KEEP A COPY
Please be sure to make a copy of your work. If you have submitted assessment work electronically make sure
you have a backup copy.
PLAGIARISM
Plagiarism is the presentation of the work of another without acknowledgement. Students may use a limited
amount of information and ideas expressed by others but this use must be identified by appropriate referencing.
CONSEQUENCES OF PLAGIARISM
Plagiarism is misconduct as defined under the Student Conduct By-Laws. The penalties associated with
plagiarism are designed to impose sanctions on offenders that reflect the seriousness of the Universitys
commitment to academic integrity.
I declare that all material in this assessment is my own work except where there is a clear
acknowledgement and reference to the work of others. I have read the Universitys
Academic and Scientific Misconduct Policy and understand its implications.*
http://www.cdu.edu.au/governance/policies/pol-001.pdf

Signed Muhammad Moeez Sheikh. Date3 rd April 2016..

* By submitting this assignment and cover sheet electronically, in whatever form you are deemed to have made the declaration set out
above.

School of Engineering and Information Technology


Faculty of Engineering, Health, Science and Environment

1
Higher Education

Part 1- Current Mirror source

b. For Ref=1 K, measure operating points of transistors (The values of


VG, VS , VD and ID).
Vs= 0, Vg= 8.97
c. Vary the value of voltage Vout from 1 V to 9 Vdc. Measure the value
of Iout passes through the load resistance for each value of Vout.
ANSWER 1 ( c ) :
Vo
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5

School of Engineering and Information Technology


Faculty of Engineering, Health, Science and Environment

Io
0.06
0.23
0.44
0.65
0.95
1.2
1.52
1.81

2
Higher Education

d. Plot the graph Vout versus Iout. Why is the output current is not
constant?

Part 2- Common-source amplifier with active PMOS


load

School of Engineering and Information Technology


Faculty of Engineering, Health, Science and Environment

3
Higher Education

b. Without connecting RL , CC1 and CC2, determine voltage values of


V12, VD and VG. what is the value of drain current?
ANSWER : V12= 12.2Volts, VD=2,81, VG=2.72Volts
ID=!/2*kn*W/L*(VGS)2
c. Apply a sinusoidal input source Vsig with amplitude of 50 mV and
frequency 5 KHz. Measure the output voltage Vd without connecting the
load resistor RL and CC2. If necessary, adjust the amplitude so as to
remove distortion of the output signal. What is the open-circuit voltage
gain (Avo)?
Vout=2.8Volts
Vin=15
Aout= Vout/Vin =>2.8/15 => 0.186
d. Now, connect Cc2 and load resistor RL=10 K. Measure the output
voltage Vout over the resistor RL . What is the overall voltage gain of the
amplifier (Av)? What is effect of RL on the voltage gain?
Vout= 1.92
Vin= 0.24
Av= Vout/Vin => 1.92/0.24 => 8
With the addition of Rl the overall voltage Gain of the Circuit is increased

School of Engineering and Information Technology


Faculty of Engineering, Health, Science and Environment

4
Higher Education

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