IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO.

3, MARCH 2012

1401

Modeling and Control for a Bidirectional

BuckBoost Cascade Inverter
Honglin Zhou, Student Member, IEEE, Shuai Xiao, Geng Yang, Senior Member, IEEE, and Hua Geng, Member, IEEE

AbstractThis paper proposes a bidirectional buckboost cascade inverter and presents its modeling and control methods. The
proposed inverter can be seen as the cascade of a buck converter
and a boost converter, both with bipolar outputs. The buck stage
maintains the main inductor current and the boost stage controls
the output voltage to track a given reference. With detailed analysis, the switching function model is established, which reveals that
the inverter has an extra control freedom for achieving high performance. Then, the averaged model for control is given and thereby
the buckboost capability is proven. Afterward, utilizing the feedforward compensation technique, a decoupled control scheme is
designed. A new modulation strategy is also proposed to minimize
the dead time effect. By simulations and experiments, it is verified that the proposed system possesses the following features: 1)
bidirectional operation with bipolar buckboost output voltage; 2)
reduced output distortion due to advanced modulation minimizing
the dead time effect; 3) reduced size and weight with only one main
energy storage component; 4) decoupled linear controller design;
and 5) good steady-state and dynamic performance including wide
operation range, strong robustness to load and input voltage variations, fast dynamic response, and excellent overload protection.
Index TermsBidirectional converter, buckboost cascade converter, control system, inverter, modeling.

I. INTRODUCTION
ODAY, dcac inverters have been widely used in various
commercial and industrial areas such as motor driving,
energy storage, renewable energy generation, etc. The conventional voltage source inverter (VSI) (also referred to as the buck
inverter) has taken a very large market share in these applications. Inheriting the characteristics of the buck converter, the
VSI can only produce an output voltage lower than its dc input.
However, in some applications, e.g., motor driving in electric
vehicle systems [1][3] and grid-connected fuel cell or photovoltaic systems [4][6], both the step-down (buck) and step-up
(boost) operations are required. Sometimes, the bidirectional
power handling capability of the inverter is also desired in order

Manuscript received January 15, 2010; revised July 19, 2010 and November
2, 2010; accepted December 17, 2010. Date of current version February 7, 2012.
This work was supported in part by the National Natural Science Foundation
of China under Grant 60974130 and in part by the Power Electronics Science
and Education Development Program of Delta Environmental and Educational
Foundation. Recommended for publication by Associate Editor B. Johansen.
The authors are with the Department of Automation, TNList, Tsinghua
University, Beijing 100084, China (e-mail: zhouhl06@mails.tsinghua.edu.cn;
xiaoshuai1000@126.com; yanggeng@tsinghua.edu.cn; genghua03@gmail.
com).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2010.2103957

to recover energy or adapt for back-to-back applications in a

wind power system [7]. Therefore, it is necessary to explore an
alternative topology that can meet both of the two requirements.
Probably, the most natural solution is to use a boost+VSI
topology [8], [9]. Although the principle is straightforward, it
requires two main energy storage components (i.e., a main inductor and a main capacitor) that will increase the volume,
weight, and cost of the system. Also, the control of the boost
stage is not as easy as that in ordinary dcdc applications because of rapid and substantial variations of the load power in ac
applications.
An alternative to this is the recently developed Z-source converter that combines functionality of the boost and VSI into a
single stage [10], [11]. Compared to the boost+VSI scheme,
it has higher efficiency due to its compact structure, less harmonics thanks to its second-order filtering network and less
distortion since dead time is not needed [10], [12]. On the other
side of the coin, the Z-source network increases the system
volume and cost [13], [14]. Also, with increased system order
and complexity, it leads to complicated control and modulation
strategies [15].
Another representative solution is based on the idea of differentiating the outputs of two bidirectional, unipolar dcac inverters [9], [16]. The boost or Cuk topology of the two inverter
stages enables a higher output voltage than the input while the
differential output allows a lower output voltage and eliminates
the dc bias of each inverter stage as well. Although this solution
is superior to the boost+VSI in terms of the cost and efficiency,
great difficulties are encountered in the control design. For this
topology, conventional control based on a linearized model is
no longer valid because of large variation of the operation point
in ac applications. Though effective in some cases, the sliding
mode control lacks effective control for the current loop since it
is hard to reasonably give the current reference that heavily depends on the load condition [16]. The double-loop strategy [17]
enhances the current robustness, but the voltage loop is only partially compensated by using a steady-state relationship, which
limits the improvement of system dynamics. Actually, the essential reason leading to these difficulties can be attributed to
the strong nonlinearity of the boost (Cuk) circuit and its lack of
control freedom, as explained in Section II-C.
In fact, finding a bidirectional converter with buckboost capabilities has long been discussed in developing the dcdc converters. For dcdc power conversion, to handle the bidirectional
power flow, one only needs to replace the diodes in the classic step-up/down circuits, e.g., buckboost, Cuk, buckboost
cascade circuits, etc., with bidirectional current switches [18].
However, since these bidirectional converters cannot produce

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improved performance can be obtained, as discussed in detail in

the following sections.
A. Operation of the Buck Stage

Fig. 1.

System topology of the bidirectional buckboost cascade inverter.

a bipolar output, seldom efforts are devoted to adapt them for

dcac conversions. Besides the bipolar output issue, to extend
them to inverters, the control complexity should also be considered seriously. Among these topologies, the buckboost cascade
converter is most advantageous in control [19], [20] since it has
two control freedoms. For dcdc applications, this advantage
is not so remarkable and even offset by the cost on additional
devices to a large extent. However, for dcac applications, this
additional control freedom can be very favorable.
Therefore, with special consideration on the control superiority, an inverter that successfully extends the functionality of a
bidirectional buckboost cascade dcdc converter is proposed.
This paper is organized as follows. First, the operation principle
of the proposed inverter is explained. Then, the switching function model of the inverter is established with detailed analysis.
Afterward, an averaged model for control purpose is given and
the control scheme is presented. Finally, by device-level simulations and experiments, the validity of the proposed inverter is
verified and its control superiorities are highlighted.
II. SYSTEM ANALYSIS AND MODELING
The topology of the proposed inverter is shown in Fig. 1. The
overall system can be seen as the cascade of a buck converter
and a boost converter, both with bipolar outputs, which are
referred to as the buck stage and the boost stage, respectively,
throughout this paper. Q1 Q4 are unidirectional devices such
as reverse blocking insulated gate bipolar transistors (IGBTs) or
ordinary IGBTs with a blocking diode [21][23]. i1 and u1 are
the input current and output voltage of the buck stage while u2
and i2 are the input voltage and output current of the boost stage,
respectively. uL is the voltage across the main inductor L and
ic is the input current of the output capacitor C. Note that all of
the electric variables in this figure represent their instantaneous
value and their direction denotes the selected sign convention.
In conventional control for a buckboost cascade converter,
only one of the two stages is activated while the other is kept
feedthrough, i.e., the converter assumes either the buck or the
boost topology [20]. Besides the existing characteristics of the
two topologies, this simple combination does not bring about
any new features. However, in the proposed control scheme,
the system is operating under continuous conduct mode and
both of the two stages are activated: the buck stage maintains
the main inductor current constant while the boost stage regulates the output voltage to follow the given command. With this
control strategy, the control freedom of the buckboost cascade
converter is increased, and therefore, simpler controllers and

During normal operation, the inductor current is kept at a

positive value by the buck stage. Hence, there are only four
conducting patterns for the buck stage, as shown in Fig. 2(a)(d)
(the arrow denotes the actual current direction). In the positive
bucking phase (a), VT1 and VT4 are conducting and the energy
is transferred from the battery to the inductor as well as the load
of the buck stage (i.e., the boost stage). Ignoring the forward
voltage of the semiconductor devices, then the relations u1 =
uIN and i1 = iL hold. In the freewheeling phase (b) or (d), VD2
and VT4 (or VD3 and VT1 ) are conducting and the energy is
transferred from the inductor to the boost stage, so u1 = 0 and
i1 = 0. Note that phases (b) and (d) are equivalent and only (b)
is used in the following discussion and design. In the negative
bucking phase (c), VD2 and VD3 are conducting and the energy
is transferred from the inductor and boost stage to the battery,
so u1 = uIN and i1 = iL .
Accordingly, a bipolar voltage output can be obtained: if a
positive output voltage u
1 (barred variables represent averaged
values throughout this paper) is desired, the buck stage will
switch in a pulse width modulation (PWM) manner between
the positive bucking and freewheeling phases. In this situation,
1 is deu1 = SVT 1 O N uIN and i1 = SVT 1 O N iL . If a negative u
sired, it will switch between the negative bucking and freewheeling phases. In this situation, these are u1 = SVD 3 O N uIN and
i1 = SVD 3 O N iL . Here, SVT 1 O N and SVD 3 O N are the switching
functions [24] of VT1 and VD3

1, when VT1 (VD3 ) is ON
SVT 1 (VD 3 )ON =
(1)
0, when VT1 (VD3 ) is OFF.
In order to unify these two cases, define the switching function
of the buck stage as

SVT 1 O N ,
when u
1 0
(2)
SbuckON =
1 < 0
SVD 3 O N , when u
where u
1 is the desired value of the averaged output voltage.
Note that SbuckON is a three-level switching function whose
value is 1, 0, or 1. With this switching function, the expression
for the input current and output voltage of the buck stage can be
simplified as

u1 = SbuckON uIN
(3)
i1 = SbuckON iL .
Fig. 2(e) illustrates the operation and waveforms of the buck
stage when an ac output voltage is desired, where (a), (b), and
(c) correspond to the aforementioned conducting patterns.
B. Operation of the Boost Stage
Similarly, since the inductor current iL is positive, there are
four main conducting patterns for the boost stage as shown in
Fig. 3 (the commutation transients are not included). In the
positive boosting phase (a), Q1 and Q4 are conducting and the
energy is transferred from the source of the boost stage (i.e.,

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Fig. 2. Conducting patterns and illustrative waveforms of the buck stage. (a) Positive bucking. (b) Free-wheeling. (c) Negative bucking. (d) Free-wheeling
(unused). (e) Illustrative waveforms.

the buck stage) as well as the inductor to the load, so i2 = iL

and u2 = uOUT . In the charging phase (b) or (d), one of the
bridge legs is conducting (e.g., Q1 and Q2 ) and the energy is
transferred from the buck stage to the inductor, so i2 = 0 and
u2 = 0. The case for the negative boosting phase (c) is similar to
phase (a) except that the output polarity is negative, so i2 = iL
and u2 = uOUT .
Therefore, a bipolar current output can be obtained: if a positive averaged output current i2 is desired, the boost stage
will switch in a PWM manner between the positive boosting and charging phases. In this situation, i2 = SQ 2 O F F iL and
u2 = SQ 2 O F F uOUT . If a negative i2 is desired, it will switch
between the negative boosting and charging phases. In this
situation, i2 = SQ 4 O F F iL and u2 = SQ 4 O F F uOUT . Here,
SQ 2 O F F and SQ 4 O F F are the switching functions of Q2 and
Q4

1, when Q2 (Q4 ) is OFF
SQ 2 (Q 4 )OFF =
(4)
0, when Q2 (Q4 ) is ON.
To unify these two cases, define the switching function of the
boost stage as

SQ 2 OFF ,
when i2 0
Sb o ostOFF =
(5)
SQ 4 OFF , when i2 < 0
where i2 is the desired value of the averaged output current. Note
that Sb o ostOFF is also a three-level switching function. With this

switching function, the expression for the output current and

input voltage of the boost stage can be simplified as


i2 = Sb o ostOFF iL
u2 = Sb o ostOFF uOUT .

(6)

The illustrative waveforms of the boost stage are summarized

in Fig. 3(e), where (a), (b), (c), and (d) correspond to the aforementioned conducting patterns.
C. System Modeling
According to the aforementioned analysis, the switching
function model of the overall system is established as shown
in Fig. 4. Then, it is straightforward to derive the state-variable
equations of the system

1
di

L = (SbuckON uIN Sb o ostOFF uOUT )

dt
L

duOUT = 1 (Sb o ostOFF iL iLoad ) .

dt
C

(7)

This is a second-order plant with state variables iL and uOUT .

Its control inputs are the switching functions of the buck and
boost stages, SbuckON and Sb o ostOFF , respectively, while the
system output is the output voltage uOUT . The battery voltage
uIN and the load current iLoad are treated as disturbances. The

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Fig. 3. Conducting patterns and illustrative waveforms of the boost stage. (a) Positive Boosting. (b) Charging. (c) Negative Boosting. (d) Charging. (e) Illustrative
waveforms.

Fig. 4.

Switching function model of the overall system.

Fig. 5.

Block diagram of the overall system.

corresponding block diagram of the overall system is illustrated

in Fig. 5.
For the converter deriving from the conventional boost topology, SbuckON 1, so Sb o ostOFF is the only control freedom.
On the other hand, Fig. 5 clearly reveals that the system is bi-

linear for the control input Sb o ostOFF [17]. Then, there comes a
dilemma for the control: if Sb o ostOFF was used to perform current control, the output voltage would be strongly affected, but
if it was chosen to control the voltage, the current loop might be
heavily disturbed. For dcdc boost converters, this problem is
not so critical since its operation point is relatively constant and
some locally linearized control can achieve a good result. However, for dcac converters, large variation of the operation point
makes it very difficult to obtain a satisfactory dynamic performance in terms of reference tracking and disturbance rejection.
On the contrary, for the proposed buckboost cascade inverter, one more control freedom SbuckON can be utilized.
Therefore, decoupled control for the current and voltage is obtained: SbuckON is chosen to regulate the main inductor current
iL while Sb o ostOFF is used to control the output voltage uOUT .
With such a control strategy, simpler controller design and better performance can be expected. Detailed control schemes are
given in Section III.
III. SYSTEM CONTROL
A. Averaged Model for Control
For the sake of control, a locally averaged model is often
necessary [24]. Based on the switching function model (7), the

ZHOU et al.: MODELING AND CONTROL FOR A BIDIRECTIONAL BUCKBOOST CASCADE INVERTER

Fig. 6.

Control scheme of the current loop.

Fig. 7.

Control scheme of the voltage loop.

averaged model can be easily obtained

di
1

L = (DbuckON u
IN Db o ostOFF u
OUT )
dt
L
(8)

uOUT
1
d
= (Db o ostOFF iL iLoad )
dt
C
where the duty cycles DbuckON and Db o ostOFF are the local
average of SbuckON and Sb o ostOFF , respectively. Other barred
variables represent the local average of their counterparts in (7).
As previously mentioned in Section II, during normal operation, the inductor current iL is kept constant. Therefore, let
diL /dt = 0; from the first equation in (8), it can be found that
u
OUT =

DbuckON
u
IN .
Db o ostOFF

(9)

Since |DbuckON | , |Db o ostOFF | [0, 1], this equation effectively proves the buck/boost capability of the proposed system.
The overall control strategy can be divided into two parts:
the buck stage controls the current loop whereas the boost stage
controls the voltage loop.
B. Current Loop Design
The control objective of the buck stage is to regulate the main
inductor current to a positive value iL . From (8), in order to
eliminate the disturbances from the battery input and the boost
stage, a feedforward compensator can be designed

DbuckON
=

OUT
uL + Db o ostOFF u
u
IN

(10)

where DbuckON
and Db o ostOFF are the duty cycle commands
for the buck stage and boost stage, respectively. uL is the voltage
reference for the main inductor, normally given by the current
controller. After this compensation, the current channel simply

1405

becomes an integrator
1
diL
= uL .
(11)
dt
L
In order to eliminate the errors caused by parasitic parameters
and switching operation, a conventional proportional-integral
(PI) controller can be used to complete the current loop. The
current control scheme is shown in Fig. 6, where Ts in the filter
block is the switching cycle. The equivalent modulation block is
constructed according to (2). However, the sign of the equation

=u
1 /
uIN is utilized instead of the variable u
1 to
DbuckON
IN is
determine the value of SbuckON . This is simply because u
always positive. The actual implementation of the modulation
block that generates the gate pulses for the switching devices
will be given later.
C. Voltage Loop Design
The control objective of the boost stage is to control the
output voltage to follow the reference uOUT . From (8), in order
to eliminate the disturbances from the load and the buck stage,
a feedforward compensator can be designed
i + iLoad
Db o ostOFF = C
(12)
iL
where iC is the current reference for the output capacitor, normally given by the voltage controller. Similar to the current
loop, after this compensation, the voltage channel becomes an
integrator
1
d
uOUT
= iC .
(13)
dt
C
As a good starting point for most of the industrial applications, a
simple PI controller can be applied to complete the voltage loop.
The voltage control scheme is shown in Fig. 7. Note that the load

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TABLE I
OUTPUT LOGICAL OF THE STATE MACHINE

Fig. 8.

Output modulation for the buck stage.

current compensation can improve the dynamic response of the

system under load variation, but it is not indispensable in this
scheme. For low-cost applications, this compensation module
can be removed without modifying other parts of the design. In
these cases, the load disturbance will be totally rejected by the
PI controller, i.e., the output of the PI directly gives the reference
for i2 . For high-performance applications, a PI controller cannot
guarantee a perfect tracking in the case of a periodic reference,
according to the internal model principle [25]. In these cases,
the PI controller in Fig. 7 can readily be replaced by advanced
controllers such as repetitive controller or deadbeat controller,
etc.
The equivalent modulation block is constructed according
to (5). However, the sign of the equation Db o ostOFF = i2 /iL
is utilized instead of the variable i2 to determine the value of
Sb o ostOFF . This is because iL is always positive. The actual
implementation of the modulation block will be discussed later.
D. Output Modulation
In an actual control system, the duty cycle commands

and Db o ostOFF should finally be converted to gate

DbuckON
pulses so as to drive the switching devices. This task is performed by the output modulation block.
1) Buck Stage: The modulation block of the buck stage generates logic pulses for driving VT1 and VT4 according to

. Note that VT4 is always complementary to VD3

DbuckON
according to the analysis in Section II-A; therefore, by referring
to the equivalent modulation block in Fig. 6, one can easily work
out the actual modulation block for the buck stage as shown in
Fig. 8, where gVT1 and gVT4 are the gate signals for VT1 and
VT4 , respectively. Note that dead time is not needed for the
buck stage modulation since there is no shoot-through path.
2) Boost Stage: The modulation block of the boost stage
outputs logic pulses for driving Q1 Q4 according to Db o ostOFF .
Essentially, the boost stage is a current source inverter (CSI).
Conventionally, for safe commutation, an overlap time (also
referred to as the dead time in this paper) is inserted in each
switching cycle, causing waveform distortion [10]. In order to
minimize its effect, a new modulation strategy is introduced in
this paper.
To organize the modulation process properly and clearly, a
state machine-based modulation is suggested. Define the modulation states as shown in Table 1. Different states correspond to
different output patterns. Note that gQ1 gQ4 are the gate signals
rather than the actual ON/OFFstate of the switches. S1 S4 are the
four main states that intend to generate conducting patterns dis-

Fig. 9.

Fig. 10.

Conventional output modulation for a CSI.

Proposed output modulation for the boost stage.

cussed in Section II-B. Roughly speaking, if a positive output

current is desired (i.e., Db o ostOFF 0), then the state machine
will switch between S1 and S2 in a PWM manner according to
Sb o ostOFF given by Fig. 7. Similarly, if a negative output current
is desired, then the state machine will switch between S3 and S4 .
When the polarity of Db o ostOFF changes from positive to negative, the state machine will switch from S1 (S2 ) to S3 (S4 ) and

ZHOU et al.: MODELING AND CONTROL FOR A BIDIRECTIONAL BUCKBOOST CASCADE INVERTER

Fig. 11.

1407

Experimental setup of the proposed inverter.

vice versa. For safe commutation, the conventional modulation

method simply inserts the commutation states S5 S8 between
each of the main states to generate an overlap (see Fig. 9). The
dead time when the state remains in S5 S8 , especially in S7 and
S8 that appear in every switching cycle, can cause waveform
distortion.
The proposed modulation method in Fig. 10 can completely
eliminate the influence of S7 and S8 by treating them as substitute states for the main states. Through careful investigation
on the commutation states, it can be discovered that S7 (S8 ) is
equivalent to S1 (S4 ) when uOUT 0, and S7 (S8 ) is equivalent
to S2 (S3 ) when uOUT < 0. Here, by equivalent we mean that
the ON/OFFstates of the actual switches corresponding to the two
output patterns are the same. Therefore, the PWM-switching
process in Fig. 9 can be divided into two phases according to
the polarity of uOUT , as shown in Fig. 10. By this, the dead time
for commutation is completely removed. In Fig. 10, a hysteresis
band [uth , uth ] is also added to cope with disturbances caused
by measurement uncertainties. Though the commutation states
S5 , S6 , and S9 still exist, their influence becomes rather trivial
since they occur only twice per output cycle.
The above design so far has clearly demonstrated the superiorities of the buckboost cascade inverter: 1) the current and
voltage control loops are completely decoupled thus allowing independent design of control parameters; and 2) the compensated
plants assume a very simple form that can be easily controlled
by conventional PI controllers. Consequently, good dynamic
performance and robustness can be expected.
IV. SIMULATION AND EXPERIMENTAL RESULTS
A. Simulation and Experimental Setup
In order to validate the proposed bidirectional buckboost
cascade inverter and its control scheme, a prototype system of
500 W has been simulated and implemented. Detailed system

Fig. 12. Simulation results with resistive load. (a) Output voltage, main inductor current, and load current. (b) Control variables of the buck and boost
stages.

parameters are summarized in the appendixes. The simulation

is performed in the MATLAB/Simulink software environment.
The main circuit is constructed by building blocks from the SimPowerSystems library. The Ode45 (DormandPrince) variablestep solver with maximum step size 1 107 s is used and the
main circuit is not discretized in order to keep the accuracy of
the results. Taking into account the commutation and reverse
recovery time of the switching devices, a dead time of 3 s is
set for the output modulation block of the boost stage.
An experimental system with the same parameters is also
constructed as shown in Fig. 11. In this configuration, the dc
voltage source is implemented by regulating an adjustable ac
voltage source with a diode rectifier. The ripple of its output

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Fig. 13.

Experimental results with resistive load. (a) Output voltage and main inductor current. (b) Output voltage and load current.

Fig. 14.

Output voltage and load current with inductiveresistive load. (a) Proposed modulation method. (b) Conventional modulation method.

Fig. 15. Simulation results with regenerative load. (a) Output voltage, main
inductor current, and load current. (b) Control variables of the buck and boost
stages.

voltage is desirable as it can be used to test the robustness of

the proposed control system to input voltage disturbance. A
breaking branch with a resistor Rb is added to limit its output
voltage when regenerative loads are connected. As for the pro-

posed inverter, the unidirectional devices Q1 Q4 of the boost

stage are implemented by ordinary IGBTs IKW50N60T in series with fast-switching diodes IDP45E60. The controller for
the inverter mainly includes two parts, i.e., the measurement and
drive part, and the control and modulation part. The measurement and drive part serves as the isolated interface between the
main circuit and its control unit. Signal amplifications, low-pass
filtering, and gate signals generating are done in this part. The
control and modulation part consists of a digital signal processor
(DSP) and a complex programmable logic device (CPLD). A
high-performance DSP TMS320F28335 with floating point unit
is used as the central processor, which allows a very straightforward implementation of the proposed control scheme in a
C-language environment. A low-cost CPLD EPM7128 is used
to implement the modulation state machine of the boost stage
(see Fig. 10). The DSP generates the drive signals for the buck
stage as well as the switching conditions for the state machine
in CPLD. According to Fig. 10, these switching conditions include the absolute value of Sb o ostOFF , the signs of Db o ostOFF ,
(uOUT + uth ), and (uOUT uth ). During the experiments, different kinds of loads are connected to the output of the inverter
to assess its performance. These loads involve the resistive load,
the inductiveresistive load with nonlinear characteristics, and
the regenerative load. Detailed explanations will be given in the
following sections.

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Fig. 16.

1409

Experimental results with regenerative load. (a) Grid voltage, output voltage, and input voltage. (b) Grid voltage and load current.

B. Steady-State Performance
1) Resistive Load: As the typical test for inverters, a resistive
load (RLoad = 110) is connected to the output of the inverter.
With 96-V dc input, the inverter is commanded to generate a
220 Vrms/50 Hz ac output. Simulation results are summarized in
Fig. 12. From (a), it can be seen that iL is successfully regulated
at 15 A by the buck stage. As a result, under the decoupled
control of the boost stage, the output voltage uOUT is also well
controlled. As to the control variables, since iL is maintained
constant, the waveform of Db o ostOFF will reflect the averaged

will reflect the

output current i2 while the waveform of DbuckON
instantaneous output power. Therefore, Db o ostOFF is expected
to be in 50 Hz and has a phase shift of arctan(2f0 RLoad C) =

is expected to be in 100 Hz and greater

22.5 while DbuckON
than zero, both of which can be verified in (b).
The corresponding experimental results are shown in Fig. 13.
The division ratios of the voltage and current probes are 100:1
and 1:1, respectively. Due to limited measurement range of the
current probe, the main inductor current is approximately halved
by its wire and the measured result is thus denoted by 0.5iL in
the figure. It can be observed that the experimental results are
in consistent with the simulation: iL is well maintained, and the
output voltage uOUT tracks the given reference as desired.
2) InductiveResistive Load: This section further examines
the systems driving capability for inductiveresistive loads,
which represent a large category of industrial loads. In the experiment, a 1-kVA, 220-V single phase autotransformer is inserted
between the resistive load and the inverter. Due to its large
magnetization inductance, the phase shift of the load current
would be obvious. Moreover, because of the saturation characteristics of the core, the equivalent inductance is nonlinear,
which is useful to test the systems robustness to different load
types. Here, the load resistor is 70 on the secondary side of
the autotransformer and the transformer ratio is set to 220:140.
The reference for the output voltage is still at 220 Vrms/50 Hz.
Fig. 14(a) demonstrates that the output voltage tracks the reference satisfactorily with total harmonic distortion (THD) of
only 1.67%. As expected, the load current lags behind the output voltage and has some distortion due to the saturation of the
core. As a comparison, Fig. 14(b) gives the waveforms when the
conventional modulation method of the boost stage is applied.

Fig. 17.

Simulation results with input voltage and load variations.

Due to the dead time effect, a larger output voltage distortion

(THD = 2.68%) can be observed. Therefore, from the earlier
simulations and experiments, it can be concluded that the proposed system is capable of providing a bipolar, clean ac output
larger than the input voltage.
3) Regenerative Load: For some ac motor driving applications and grid-connected applications, such as renewable power
systems, energy storage systems, etc., energy needs to be transferred from the load to the battery (or the dc-link capacitor)
temporarily or persistently. These loads fall into the category
of regenerative load. This section will demonstrate that the proposed system is bidirectional and thus suitable for these applications. The output voltage reference remains the same while
the current reference iL is set to 10 A. In order to simulate
a regenerative load, a controlled ac current source with 3.0 A
(amplitude), 180 phase angle (with respect to uOUT ) is employed. Fig. 15(a) shows that the output voltage can follow the
given command and the load current has an opposite phase angle, which indicates that the power flow is reversed. Fig. 15(b)
verifies that, under regenerative condition, Db o ostOFF (proportional to i2 ) has a leading phase larger than 90 and Db o ostOFF
(proportional to the instantaneous output power) has a negative
average value.
In the experiment, since an ideal ac current source is hard to
obtain, in order to verify the bidirectional power flow handling
capability of the inverter, the inverter is actually connected to
the 220 V/50 Hz ac grid through a 3-mH filtering inductor (see
Fig. 11). For grid connection, the controller also measures the
grid voltage uG and performs synchronization and load current

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Fig. 18.

Experimental results with input voltage and load variations. (a) Input voltage. (b) Output voltage and load current.

Fig. 19.

Output voltage and load current under VVVF operation. (a) Simulation results. (b) Experimental results.

control. But since this section only intends to verify the systems bidirectional capability, these issues will not be discussed
further. The results in Fig. 16(a) show that after grid connection,
the output voltage of the inverter is well synchronized with the
grid and Fig. 16(b) proves that the regenerative load current is
successfully injected into the inverter.
C. Dynamic Performance
1) Input Voltage and Load Variations: This section investigates the robustness of the proposed control to external disturbances. The first disturbance that should be considered is
the load variation. For switching power converters, both of the
nominal and light load conditions are concerned [26]. Besides
the requirements on a wide load operation range, the converter
should also be capable of dealing with sudden load changes. Another disturbance that should be noted is the variation of the input
voltage, which can easily cause instability of conventional boost
inverters [17]. In order to simulate these disturbances, a 100-Hz
10% square-wave is added to the input voltage and the resistive load suddenly switches from 10%(968 ) to 100%(96.8 )
and then switches back. Simulation results are shown in Fig. 17.

It can be seen that the input voltage disturbance has little effect
on the output voltage thanks to the feedforward design (10) of
the buck stage. A fast dynamic response to the large load variation can also be observed and there is only a very small variation
(about 40 V) of the output voltage during the transients. This superiority should be attributed to the proposed decoupled control
design with additional control freedom.
In the experiment, the output capacitor of the dc voltage
source is properly selected so that about 25-V ripple is generated under the nominal condition [see Fig. 18(a)]. The load
variation is created by switching the load between 200 and 120
manually. Similar results are obtained in the experiment; from
Fig. 18(b), it is evident that the input voltage and load variations
have little influence on the output voltage, further proving the
robustness of the proposed system.
2) Variable Voltage and Variable Frequency (VVVF) Operation: For motor driving applications, VVVF operation is often
desired so as to obtain a wide speed range with stiff torque characteristics [27]. This requires the inverter be able to operate in
a wide range in terms of both the frequency and the voltage. To
demonstrate such capability of the proposed system, a VVVF
command is applied to the inverter. Initially, the voltage and

ZHOU et al.: MODELING AND CONTROL FOR A BIDIRECTIONAL BUCKBOOST CASCADE INVERTER

Fig. 20.

Output voltage and load current. (a) Simulation results. (b) Experimental results.

Fig. 21.

Output voltage and main inductor current. (a) Simulation results. (b) Experimental results.

frequency commands are set to 220 Vrms and 50 Hz, respectively. From t = 0.08 s, both of them decrease with the time at a
slope of 200%/s until reach 20% of their rated values, i.e., 44
Vrms and 10 Hz, respectively. From Fig. 19, it can be seen that
the experiment is in good agreement with the simulation results.
With a fast dynamic response, the output voltage follows the
given command very well. Therefore, it can be concluded that:
1) the proposed system is able to generate an ac voltage higher
or lower than the dc input; and 2) it has a wide operation range
with satisfactory dynamic response.
3) Overload Protection: This section will demonstrate another merit of the proposed system and its control scheme. That
is, without adding extra control modules, the system is equipped
with good protection against overload. Initially, a 120- resistor
is connected to the inverter. To generate an overload condition, at
t = 0.105 s another 120- resistor is suddenly connected in parallel. System responses are shown in Figs. 2021. Immediately
after the overload occurs, the load current iLoad tends to rise
rapidly as observed in Fig. 20. This requires the boost stage to
output more current during a switching cycle. Subsequently, ac-

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cording to (6), the boost stage controller (i.e., voltage controller)

quickly increases Sb o ostOFF . As a result, u2 = Sb o ostOFF uOUT
increases simultaneously. However, refer to Fig. 4, when u2 becomes larger than the maximum output voltage of the buck stage
uIN , the inductor current iL tends to drop, as shown in Fig. 21.
For the same reason, after t = 0.11 s when the output current
decreases as the output voltage declines, iL can quickly restore
due to the recovered regulation of buck stage. In sum, during
the transients, the output voltage and the inductor current are
effectively kept under their rated values, proving the systems
excellent current protection.
V. CONCLUSION
With special consideration on the control superiority, a bidirectional buckboost cascade inverter is proposed in this paper.
It can be seen as the cascade of a buck converter and a boost converter both with bipolar outputs. The switching function model
and the averaged model of the system are established. System
level analysis reveals that, different from boost-type converters,

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 3, MARCH 2012

the proposed converter has one more control freedom, which

can be utilized to eliminate the systems nonlinearity, and thus
achieve high performance. Consequently, a decoupled control
strategy with feedforward compensation technique is proposed,
where the buck stage regulates the main inductor current while
the boost stage controls the output voltage. Moreover, a new
output modulation strategy is proposed to minimize the dead
time effect.
By device-level simulations and experiments, it is verified
that the system possesses the following features: 1) bidirectional operation with bipolar buck/boost output voltage almost
free of harmonics; 2) reduced output distortion due to advanced
modulation strategy minimizing the dead time effect; 3) reduced
volume and weight with only one main energy storage component; 4) simple controller design as only two PI controllers are
needed and they can be designed separately; and 5) good steadystate and dynamic performance involving wide operation range,
strong robustness to load and input voltage variations, excellent overload protection, and fast dynamic response allowing
VVVF operation. A more thorough comparative study to the
conventional inverters will be carried out and subjected to future publications.

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APPENDIX A
MAIN CIRCUIT PARAMETERS
Rated power: P0 = 500 W.
Rated input voltage: UIN0 = 96 V.
Rated output voltage: UOUT0 = 220 Vrms.
Rated output frequency: f0 = 50 Hz.
Rated current of the main inductor: IL0 = 15 A.
Switching frequency: fs = 12.5 kHz.
Inductance of the main inductor: L = 3.3 mH.
Capacitance of the output capacitor: C = 12 F .
APPENDIX B
CONTROL SYSTEM PARAMETERS
Current controller: kp = 22.6, ki = 5.2.
Voltage controller: kp = 0.05, ki = 4.3.
Hysteresis voltage: uth = 10 V.
ACKNOWLEDGMENT
The authors would like to thank G. Zhang and B. Lin for their
fundamental work on the DSP hardware platform.
REFERENCES
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DCDC converter for hybrid and fuel cell vehicle power, IEEE Trans.
Power Electron., vol. 23, no. 6, pp. 30353046, Nov. 2008.
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IEEE Trans. Power Electron., vol. 23, no. 6, pp. 30253034, Nov. 2008.
[3] P. W. Sun, J.-S. Lai, H. Qian, W. S. Yu, C. Smith, and J. Bates, High
efficiency three-phase soft-switching inverter for electric vehicle drives,
in Proc. IEEE Vehicle Power Propulsion Conf. (VPPC), 2009, pp. 761
766.

ZHOU et al.: MODELING AND CONTROL FOR A BIDIRECTIONAL BUCKBOOST CASCADE INVERTER

Honglin Zhou (S10) was born in Sichuan, China, in

1984. He received the B.Sc. degree in electrical and
electronic engineering from the School of Automation, University of Electronic Science and Technology, China, in 2002. Since 2006, he has been working
toward the Ph.D. degree in power electronic aspects
of grid integration of distributed generation units at
Tsinghua University, Beijing, China.
Currently, he is a Research Assistant in the Department of Automation, Tsinghua University. His
research interests include design, modeling, and control of power converters, modeling and control of electrical machines, and grid
integration of renewable energy systems.

Shuai Xiao was born in Shandong, China, in 1986.

He received the B.Sc. degree in automation from the
Institute of Electrical and Automation Engineering,
Tianjin University, Tianjin, China, in 2005. He is currently working toward the Ph.D. degree at Tsinghua
University, Beijing. China.
He is now a Research Assistant in the Department
of Automation, Tsinghua University. His research interests include power converters and grid integration
problems of wind farms.

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Geng Yang (M01SM02) received the B.S. and

M.S. degrees from the Xian University of Science
and Technology, Xian, China, in 1982 and 1984,
respectively, and the Ph.D. degree from Sophia University, Tokyo, Japan, in 1992, all in electrical engineering.
From 1985 to 1987, he was an Assistant at the
Xian University of Science and Technology. As a
Visiting Scientist, he worked at Fukui State University, in 1987, and at Sophia University, Japan, in 1988.
From 1992 to 1994, he was invited to be a Senior Researcher of Kasuga Electrical Works Ltd., Tokyo, Japan. From 1995 to 1999,
he was a lecturer, Associate Professor, and Professor at the Xian University
of Science and Technology. Since 2000, he has been a Professor in Automation Department of Tsinghua University, Beijing, China. His current research
interests include electrical drive and system, power electronic equipments, and
control technology of wind and PV energy conversion systems.
Dr. Yang is a member of the Institute of Electrical Engineers of Japan and
the Board of Director of China Power Electric Institute. He is a member of the
China Electrotechnical Society (CES) and serves as the Vice-Director of the
Education Committee of Electrical Automation Branch in CES.
Hua Geng (S07M10) received the B.S. degree in
electrical engineering from the Hua Zhong University of Science and Technology, Wuhan, China, in
2003, and the Ph.D. degree in control theory and application from Tsinghua University, Beijing, China,
in 2008.
From 2008 to 2010, he was a Postdoctoral Research Fellow in the Department of Electrical and
Computer Engineering, Ryerson University, Toronto,
ON, Canada. He joined the Automation Department
of Tsinghua University as an Assistant Professor in
May 2010. His current research interests include distribution generation systems, renewable energy conversion systems, and digital control systems.