Dual Mode ResistorlesssinusoidaloscillatorusingsingleCCCDTA

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Microelectronics Journal 44 (2013) 216224

Contents lists available at SciVerse ScienceDirect

Microelectronics Journal
journal homepage: www.elsevier.com/locate/mejo

Dual-mode resistorless sinusoidal oscillator using single CCCDTA


Hung-Chun Chien a,n, Jian-Min Wang b
a
b

Department of Electronic Engineering, Jinwen University of Science and Technology, No. 99, Anzhong Rd., Xindian Dist., New Taipei City 23154, Taiwan
Department of Vehicle Engineering, National Formosa University, Huwei Township, Yunlin County 63201, Taiwan

a r t i c l e i n f o

a b s t r a c t

Article history:
Received 18 June 2012
Received in revised form
9 December 2012
Accepted 13 December 2012
Available online 16 January 2013

This study proposes a new design for a resistorless second-order sinusoidal oscillator. The proposed
circuit uses a single current-controlled current-differencing transconductance amplier (CCCDTA) and
two capacitors to perform the functions of a resistorless sinusoidal oscillator. The proposed oscillator
provides a voltage output and a current output simultaneously, and can independently control the
oscillation condition and oscillation frequency by using the separate bias currents of the CCCDTA. This
study rst introduces the CCCDTA and the related formulations of the proposed oscillator circuit, and
then presents the non-ideal effects, sensitivity analyses, and design considerations of the proposed
circuit. The proposed oscillator features a compact topology and dual-mode operation, including low
active and passive sensitivities, and has high potential for integration because it is composed of a single
CCCDTA and two capacitors. The HSPICE simulation results in this study conrm the feasibility of the
new resistorless oscillator circuit.
& 2012 Elsevier Ltd. All rights reserved.

Keywords:
Current-controlled current-differencing
transconductance amplier (CCCDTA)
Dual-mode circuit
Resistorless circuit
Sinusoidal oscillator

1. Introduction
Sinusoidal oscillators have numerous applications in communication, instrumentation, measurement, control, and signalprocessing systems [1]. For decades, operational ampliers (OPAs)
have been widely used in various electronic circuit systems and
used to construct various sinusoidal oscillators [2]. Operational
amplier-based sinusoidal oscillators rst appeared in the
1980s [3]. However, the main disadvantage of these OPA-based
constructions is that they require excessive active devices and
passive components. Furthermore, OPAs are characterized by a
constant gain-bandwidth product and low slew rate, which limits
the high-frequency operations of oscillator circuits. The currentmode circuit technique for signal processing has attracted
increasing attention from analog circuit designers in the past
few years because it shows wider bandwidth, better linearity,
higher dynamic operation range and slew rate, functional versatility, and simple implementation [4]. The current-mode circuit
technique has become a popular method for designing new
active-RC circuits using recent active devices, which offer several
advantages over traditional operational ampliers [58]. Previous
studies have presented several typical realizations of active-RC
sinusoidal oscillators using various active devices [914].
In addition to the active-RC topologies, researchers have developed

Corresponding author. Tel.: 886 2 82122000x6842; fax: 886 2 82122801x2800.


E-mail addresses: hcchien@just.edu.tw (H.-C. Chien),
jmw@nfu.edu.tw (J.-M. Wang).
0026-2692/$ - see front matter & 2012 Elsevier Ltd. All rights reserved.
http://dx.doi.org/10.1016/j.mejo.2012.12.007

several implementations of resistorless sinusoidal oscillators (or


active-C sinusoidal oscillators) using various active devices
[1520] One study [15] proposed six OTA-C-based voltage-mode
(VM) sinusoidal oscillators. Each presented circuit was constructed using three differential-input single-output operational
transconductance ampliers (DISO-OTA) and two external capacitors. The oscillation condition and oscillation frequency for the
reported sinusoidal oscillators can be adjusted non-interactively
to control the bias currents of the DISO-OTAs. Abuelmaatti
introduced a current conveyor (CC) combined with an OTAbased scheme employing a second-generation current conveyor
(CCII), three DISO-OTAs, and two capacitors [16]. This circuit was
based on a 3R2C CCII-based oscillator topology that replaced
the three external linear resistors with DISO-OTA-based active
resistance simulators to achieve a resistorless design. However,
the oscillation condition and oscillation frequency of this circuit
are interactive control parameters. Another study [17] reported
several dual-output operational transconductance amplier (DOOTA)-based current-mode (CM) topologies using three to six DOOTAs with two capacitors. Another feasible approach employing a
current-controlled current conveyor (CCCII) appears in [19]. The
presented circuits were implemented using three CCCIIs with two
capacitors. However, the main problem with these circuits is that
they require a larger number of active devices. Therefore, recent
research has introduced a current-controlled current-differencing
buffer amplier (CCCDBA)-based topology consisting of a single
CCCDBA and two capacitors to reduce the number of active
devices [18]. However, this type of circuit does not normally oscillate
because of the limitation of its oscillation conditions [18].

H.-C. Chien, J.-M. Wang / Microelectronics Journal 44 (2013) 216224

Therefore, an extra resistor is often required to start the oscillation operation. This approach deviates from the classication of
resistorless oscillators. A recent study presented an electronically
tunable dual-mode (DM) resistorless sinusoidal oscillator [20].
This circuit exhibits a compact design, which uses one currentcontrolled current-backward transconductance amplier (CC-CBTA)
and two capacitors. However, the main drawback of this circuit is
that the manner of adjustment for the oscillation condition and
oscillation frequency is not independent, thus indicating that the
reported oscillator cannot easily tune its oscillation frequency
without affecting its oscillation condition. The concept of the
current-controlled current-differencing transconductance amplier (CCCDTA), which is based on the current-differencing transconductance amplier (CDTA) [21], was rst appeared in 2006 [22].
Previous studies on this topic have used CCCDTA in various
applications, including active lters, analog multiplier/dividers,
square-rooting circuits, Schmitt triggers, square/triangular wave
generators, monostable multivibrators, quadrature oscillators,
and four-phase quadrature oscillator [2328]. However, there
are no reports in the open literature of adopting a single CCCDTA
with minimum passive components to develop a dual-mode
resistorless sinusoidal oscillator. In view of this, the main objective of this paper is to present a novel CCCDTA-based circuit
conguration. Based on literature review, this is the rst reported
dual-mode resistorless sinusoidal oscillator built by using a single
CCCDTA. The proposed topology requires only one CCCDTA and
two external capacitors. The circuit conguration is simple and
can operate under dual-mode operation (i.e., voltage and current
outputs). Because CCCDTA-based application circuits have gained
considerable attention in recent years, the presented circuit is
preferable to existing designs for applications in CCCDTA-based
circuit systems. Compared to previous solutions (active-RC and
active-C oscillators in [920]), the proposed circuit features the
following benets: (1) use of the minimum number of active
devices and passive components (except for [20]); (2) a resistorless design, which is substantially better than the active-RC
schemes because of the easier IC manufacture process; (3) dualmode operation (current- and voltage-mode outputs at a particular time); (4) the oscillation condition and oscillation frequency
are non-interactive control parameters and feature electronically
tunable properties; (5) desirable active and passive sensitivity
performance and less power consumption because only a single
active device is required; and (6) high impedance current output,
which enables the use of cascading applications without the need
of supplementary buffer circuits. Table 1 shows the novelty of the
proposed circuit by comparing it with previous designs. The rest
of this paper is arranged as follows: Section 2 presents a modied
version of a CCCDTA, including the proposed dual-mode resistorless sinusoidal oscillator and related governing equations. Section 3
introduces the non-ideality analysis and design considerations.
Section 4 provides a feasible design procedure for the oscillation
condition and oscillation frequency of the proposed oscillator.
This section also presents computer simulations to demonstrate
the feasibility of the theoretical analysis; and nally, Section 5
offers a conclusion.

2. Proposed CCCDTA and dual-mode resistorless sinusoidal


oscillator
The CCCDTA design concept originated from the CDTA [21].
The CCCDTA is a versatile current-mode active device and has
properties similar to the CDTA introduced in [22], except that the
CCCDTA has nite input resistances rather than zero input
resistances at the p and n terminals, respectively. The parasitic
p and n terminal resistances of CCCDTA simulate resistors,

217

thereby avoiding any use of external resistors. However, based


on our investigations, these intrinsic input resistances are equal
and are tuned by the same bias current of the reported CCCDTA
[22]; thus they limit the exibility and performance of the
CCCDTA in some applications. This section presents a modied
topology in which the input resistances at the two current input
terminals (p and n terminals) can be directly controlled by the
diverse bias currents of the CCCDTA. In addition, the proposed
dual-mode resistorless sinusoidal oscillator is introduced. Fig. 1
shows the circuit symbol and the equivalent circuit of the
proposed CCCDTA. The terminals p and n represent the two
current inputs, and the x, x , and z terminals are the highimpedance current outputs. Using these notations, the terminal
relationships of an ideal CCCDTA can be dened by (1), where Rp
and Rn represent the intrinsic resistances at the p and n input
terminals, respectively. These intrinsic resistances can be controlled by the bias currents, IB1 and IB3, of the CCCDTA. Eq. (1)
shows that the current in the z terminal is the difference of the
two input currents Ip and In. The voltage at the z terminal is
converted to the output currents, Ix and Ix  , by a transconductance gain (gm), which can be controlled by the bias current IB2 of
the CCCDTA. Fig. 2 shows the internal circuit construction of the
proposed CCCDTA, which consists of two principle blocks: a
current-controlled current differencing circuit (Q1Q42) and a
multi-output transconductance amplier circuit (Q43Q56). For
the BJT CCCDTA (Fig. 2), Eqs. (2)(4) show the formulations of Rp,
Rn, and gm related to the bias currents, indicating that Rp, Rn, and
gm can be controlled by using the diverse bias currents. In general,
CCCDTA can contain an arbitrary number of x terminals, thus
providing currents Ix in both directions.
2
3 2
32
3
0 0 0
0
Rp
Ip
Vp
6V 7 6 0 R
7
6
0 0
0 76 In 7
n
6 n7 6
7
6
7 6
76
7
6 Iz 7 6 1 1 0 0
0 76 V x 7
1
6
7 6
76
7
6I 7 6 0
7
6
7
0
0
0
g
V
4 x 5 4
m 54 x 5
0
0 0 0 g m
Ix
Vz
Rp

VT
2IB1

Rn

VT
2IB3

gm

IB2
2V T

In Eqs. (2)(4), VT BT/q is the thermal voltage, where B is the


Boltzmann constant (1.38  10  23 J/K), T is the temperature in K,
and q is the electrical charge on the electron (1.602  10  19 C).
At room temperature (27 1C), VT is about 26 mV. Fig. 3 shows a
circuit diagram of the proposed dual-mode resistorless sinusoidal
oscillator, which uses one CCCDTA and two capacitors to meet the
minimum requirements of a resistorless oscillator. The proposed
circuit provides voltage and current outputs to achieve dualmode operation. The presented topology is simple and has a high
potential for IC implementation because it is resistorless and uses
only one active device. It is crucial to note that the x terminal
impedance of the CCCDTA has a high impedance current output
property that is cascadable without requiring buffer elements for
a current-mode output. However, an external voltage buffer is
required to use the voltage across the output Vo and avoid the
loading effect on this terminal for cascading applications. In
general, such an overhead cost is inevitable in any CCCDTAbased voltage-mode design, because CCCDTAs do not offer any
buffered terminals for voltage outputs used.
Assuming an ideal CCCDTA characterized by (1), routine circuit
analysis yields the characteristic equation of the circuit expressed

218

H.-C. Chien, J.-M. Wang / Microelectronics Journal 44 (2013) 216224

Table 1
Comparisons of the proposed sinusoidal oscillator to other designs.
Topology (classication)

Active device numbers


and passive component
types

Electronically
operation/ Independent
control of oscillation condition
and oscillation frequency

Signal output mode/


Insensitive to temperature

Measured highest operating


frequency/ Implement technology

CDBA-based [9] (Active-RC)

CDBA  1
Resistor  3
(At least one oating)
Capacitor  2
(Floating)
OTRA  1
Resistor  3
(Only one grounded)
Capacitor  2
(Floating)
VF/CF  2
Resistor  3
(At least two oating)
Capacitor  2
(At least one grounded)
DDCCC  1
Resistor  3
(At least one oating)
Capacitor  2
(At least one grounded)
CDTA  1
Resistor  2
(Floating)
Capacitor  2
(At least one grounded)
CFOA  2
Resistor  3
(Only one grounded)
Capacitor  2
(Grounded)
DISO-OTA  3
Resistor  0
Capacitor  2
(Grounded)
CCII  1
DISO-OTA  3
Resistor  0
Capacitor  2
(At least one grounded)
DO-OTA  3
Resistor  0
Capacitor  2
(Grounded)
CCCDBA  1
Resistor  1
(Floating)
Capacitor  2
(At least one grounded)
CCCII  3
Resistor  0
Capacitor  2
(Grounded)
CCCBTA  1
Resistor  0
Capacitor  2
(Grounded)
CCCDTA  1
Resistor  0
Capacitor  2
(At least one grounded)

No/Yes

VM/No

Hundreds of kHz/ Commercial ICs

No/No

VM/Yes

Several MHz/ CMOS realization

No/Yes

VM/Yes

Several MHz/ CMOS realization

No/Yes

CM/Yes

Several MHz/ CMOS realization

Yes/Yes

VM/No

Hundreds of kHz/ Commercial ICs

No/Yes

CM/No

Several MHz/ Commercial ICs

Yes/Yes

VM/No

Hundreds of kHz/ Commercial ICs

Yes/No

VM/No

Hundreds of kHz/ Commercial ICs

Yes/Yes

CM/Yes

Several MHz/ CMOS realization

Yes/No

VM/No

Hundreds of kHz/ Commercial ICs

Yes/Yes

VM/Yes

Hundreds of kHz/ CMOS realization

Yes/No

DM/Yes

Several MHz/ CMOS realization

Yes/Yes

DM/No

Several MHz/ BJT realization

OTRA-based [10] (Active-RC)

VF/CF-based [11] (Active-RC)

DDCCC-based [12] (Active-RC)

CDTA-based [13] (Active-RC)

CFOA-based [14] (Active-RC)

DISO-OTA based [15] (Active-RC)

CC/OTA -based [16] (Active-RC)

DO-OTA-based [17] (Active-C)

CCCDBA-based [18] (Active-RC)

CCCII-based [19] (Active-C)

CCCBTA-based [20] (Active-C)

CCCDTA-based (Proposed) (Active-RC)

in (5). Based on (5), the proposed oscillator can produce oscillation if the oscillation condition expressed in (6) is fullled.




s2 Rp Rn C 1 C 2 sRp 2C 1 2C 2 g m Rn C 2 2 0
5


C1
g m Rn 2 1
C2

And, the oscillation frequency of the oscillator is expressed as


s
2
oo 2pf o
Rp Rn C 1 C 2

By substituting the formulations of the intrinsic resistances


and transconductance gain, as depicted in Eqs. (2)(4), into

H.-C. Chien, J.-M. Wang / Microelectronics Journal 44 (2013) 216224

IB1

IB2

IB3

Ip

I x+

Ip
Vp

x+

I x+

CCCDTA x +

In
Vn

I x_

x_

Vx+

Rp

Vp

219

gm Vz
gm Vz

In

Vx+

Rn

Vn

gm Vz
_

Vx _

Ip In

Iz

I x+
I x+
I x_

Iz

Vx+
Vx+
Vx _
Vz

Vz
Fig. 1. (a) CCCDTA circuit symbol and (b) its equivalent circuit.

Fig. 2. Internal circuit construction of CCCDTA.

IB1

IB2
x

Vo
Io

CCCDTA

C1

oscillators reported in [1517,19], the proposed scheme uses


fewer active devices to realize an electronically tunable noninteractive control resistorless sinusoidal oscillator, and features
dual-mode operation. Because CCCDTA-based application circuits
have been widely studied, the proposed circuit can serve as a
practical design for application in CCCDTA circuit systems.

IB3

x+

C2

x+

3. Non-ideality analysis and design considerations


Fig. 3. Circuit diagram of the proposed CCCDTA-based dual-mode resistorless
sinusoidal oscillator.

Eqs. (6) and (7), the oscillation condition and oscillation frequency
related to the bias currents of the CCCDTA are derived by using
(8) and (9), respectively.


IB2
C1
8 1
8
IB3
C2

oo 2pf o

1
VT

s
8IB1 IB3
C1C2

Eqs. (8) and (9) show that the oscillation condition is independently controllable by using the bias current IB2 of the CCCDTA
without affecting the oscillation frequency, whereas the oscillation frequency can be adjusted by varying the bias current IB1.
Both the oscillation condition and oscillation frequency have noninteractive adjustment manners and feature dual electronic controls for tuning. Because the oscillation frequency is controllable
by using the bias current IB1 of the CCCDTA, a current-controlled
sinusoidal oscillator is feasible. Section 4 presents a feasible
design procedure for the oscillation condition and oscillation
frequency of the proposed oscillator. Compared to the resistorless

This section considers several non-ideal issues to determine


the inuences of non-ideal effects on the proposed circuit.
A practical CCCDTA device can be modeled as an ideal CCCDTA
with nite parasitic resistances and capacitances, as well as nonideal current transfer gains and a transconductance inaccuracy
factor of the CCCDTA [29]. Fig. 4 shows a more sophisticated
circuit model to represent the non-ideal CCCDTA device, where
Rp, Rn, Rx, and Rz are the terminal parasitic resistances. Rp and Rn
are the current-controllable parasitic resistances expressed in
(2) and (3), whereas the typical values of the parasitic resistances
Rx and Rz connected to the terminals x and z, respectively, are
in the range of several mega-ohms. Cx and Cz are the terminal
parasitic capacitances from terminals x and z to the ground.
Normally, these parasitic capacitances are in the order of several
pFs. In Fig. 4, ap represents the non-ideal current transfer gain
from the p terminal to the z terminal of the CCCDTA, an denotes
the non-ideal current transfer gain from the n terminal to the
z terminal of the CCCDTA, and b is the transconductance inaccuracy
factor from the z terminal to the x terminal of the CCCDTA. The
typical values of the non-ideal current transfer gains and the
transconductance inaccuracy factor an, ap, and b range from 0.9 to
1, with an ideal value of 1. After applying the non-ideal equivalent
circuit mode of the CCCDTA to the proposed circuit (Fig. 3),
tedious derivations lead to the following modied characteristic equation, oscillation condition, and oscillation frequency.

220

H.-C. Chien, J.-M. Wang / Microelectronics Journal 44 (2013) 216224

The characteristic equation of Fig. 3 becomes




s2 Rp Rn C 1 C 2 sRp 1 an C 1 C 2 bg m Rn C 2  1 an 0

10

The modied oscillation condition and oscillation frequency


were determined as


C
bg m Rn 1 an 1 1
11
C2

oo 2pf o

s
1 an
Rp Rn C 1 C 2

12

Eqs. (10)(12) apply the following conditions: Rp 5Rx, Rn 5Rx,


Rp 5Rz, Rn 5Rz, C1 b Cx, C1 bCz, C2 bCx, and ap 1. By substituting
Eqs. (2)(4) into (11) and (12), the oscillation condition and
oscillation frequency are modied as


IB2
41 an
C1

1
13
IB3
b
C2
1
oo 2pf o
VT

s
41 an IB1 IB3
C1C2

14

Eq. (13) shows that the non-ideal current transfer gain an and
the transconductance inaccuracy factor b inuence the oscillation
conditions. However, this problem can be overcome by slightly
readjusting the bias current IB2 because an and b are close to
unity. The non-ideal current transfer gain an also slightly changes
the oscillation frequency of this circuit. This slight deviation can
be compensated by retuning the bias current IB1 of the CCCDTA to
minimize the inuence on the frequency of oscillation. Using (12),
the active and passive sensitivities of the proposed CCCDTA-based
resistorless oscillator circuit can be derived in (15).
oo
oo
oo
o
1
So
Rp SRn SC 1 SC 2  2


1
an
o
So
an 2 1 a
n

15

I x+

IB1

Ip

IB2

x +'

p'
In

Ideal
CCCDTA x +'

Rn

Vn

n'

x_ '

z'
Cz

Rx

gm Vz
gm Vz

pI p nI n

I x+
Vx+

Cx
Rx

I x_
Cx

Rx

Rz

Iz

Vx+

Cx

gm Vz

Rp

Vp

IB3

Vz

Fig. 4. Non-ideal equivalent circuit model of the CCCDTA.

Vx _

Eq. (15) shows that the proposed circuit achieves good


sensitivity performance because all active and passive sensitivities do not exceed 50% in magnitude. Therefore, the design
procedure must satisfy the conditions Rp 5Rx, Rn 5Rx, Rp 5Rz,
Rn 5Rz, C1 bCx, C1 bCz, C2 bCx, and ap 1 to minimize the
inuence of the non-ideal effects and sensitivity factors on the
proposed circuit. Because the proposed oscillator (Fig. 3) employs
the minimum active device and passive components, one capacitor is arranged as a oating connection design. In considering
the integration aspects, the proposed oscillator circuit with a
oating capacitor may render it difcult to implement this circuit
in an integrated circuit. However, an advanced layout technology
(double ploy layers) can be applied to overcome this obstacle [30].
Based on Eq. (9), the oscillation frequency is related to the
thermal voltage VT, which is a dependence of the temperature
parameter. The inuence of the temperature on the proposed
circuit is reported in the next section, based on simulation tests.
Because the resulting circuit uses a single CCCDTA and two
capacitors, the realization is compact and suitable to be implemented in standard BJT or CMOS technology. However, if the
CCCDTA is realized using CMOS technology, the temperature
problem of the proposed circuit can be improved. In addition,
the dependence on the temperature can also be reduced if the
bias current is made by using the proportional to absolute
temperature (PTAT) circuit technology [31]. The BJT CCCDTA
shown in Fig. 2 is used to depict the examination of this work
(not perfect but sufcient for experiments). Furthermore, the
oscillation frequency depends on the temperature variation and
can be easily compensated by slightly readjusting the bias current
IB1; thus, it should not be considered as an unsolved problem
in this circuit. Finally, Table 2 summarizes the key design
formulations for the proposed dual-mode resistorless sinusoidal
oscillator.

4. Design examples and simulation results


This study presents some simulation examples to demonstrate
the validity of the theoretical analysis. The proposed circuit
(Fig. 3) was simulated with HSPICE circuit simulation software
using the bipolar implementation of CCCDTA (Fig. 2). The NPN
and PNP in the circuit were simulated using the process parameters of the NR200N and PR200N bipolar transistors of the
ALA400 transistor array from AT&T [32] with a71.2 V voltage
supply. Eqs. (2)(4), (6) and (7) were used to facilitate a feasible
design procedure for the oscillation condition and oscillation
frequency of the proposed oscillator (Fig. 3). C1 and C2 were rst
assigned. By using Eq. (6), gm can be determined when an
arbitrarily Rn is chosen. The bias currents IB2 and IB3 can then be
calculated using Eqs. (3) and (4), respectively. The oscillation
frequency fo is then specied, and the values of Rp can be
determined using (7). The value of the bias current IB1 is subsequently calculated by using (2). For example, the circuit is
designed for the oscillation frequency of fo 100 kHz and is

Table 2
Key design formulations for the proposed sinusoidal oscillator.
Conguration
Ideal proposed circuit (formulated by the circuit parameters)
Ideal proposed circuit (formulated by the bias currents)
Non-ideal proposed circuit (formulated by the circuit parameters)
Non-ideal proposed circuit (formulated by the bias currents)

Oscillation condition


g m Rn 2 1 CC 12


IB2
C1
IB3 8 1 C 2


bg m Rn 1 an 1 CC 12


41 an
IB2
1 CC 12
IB3
b

Oscillation frequency

oo 2pf o
oo 2pf o

q
2
Rp Rn C 1 C 2

1
VT

oo 2pf o
oo 2pf o

1
VT

q
8IB1 IB3
C1 C2

q
1 an
Rp Rn C 1 C 2

q
41 an IB1 IB3
C1 C2

H.-C. Chien, J.-M. Wang / Microelectronics Journal 44 (2013) 216224

221

Fig. 5. Simulation results of the voltage output Vo for the circuit (Fig. 3): (a) output waveform in the steady state and (b) corresponding frequency spectrum.

operated at room temperature 27 1C, and C1 C2 10 nF was


selected. The following component values were determined based
on the design procedures: Rp Rn 0.225 kO (IB1 IB3 57.78 mA),
and gm 17.77 mS (IB2 924.04 mA). In practice, the value of
gm was designed slightly larger than the theoretical value
(gm 17.77 mS) to start the oscillations. It was necessary to
change the value of gm to 17.98 mS (IB2 934.96 mA) to start the
oscillations. The oscillations were built up in the steady-state
waveforms, and Figs. 5 and 6a show the corresponding output
waveforms for the voltage and current outputs (Vo and Io),
respectively. Simulation results show an oscillation frequency of
fo 97.08 kHz, which is 2.92% in disagreement with the designed
value. This slight frequency deviation was caused by the nonideal current transfer gain an which is similar to the anticipation
described in (12). However, this deviation can be overcome by
slightly retuning the bias current IB1 of the CCCDTA. Figs. 5 and 6b
show the output frequency spectrums of Vo and Io, respectively.
The percent total harmonic distortion (THD%) for the voltage
output was 2.94%, whereas the percent total harmonic distortion
for the current output was 3.51%. The power consumption was
founded to be 9.06 mW. The value of the total harmonic distortion for the performed experiment may not be acceptable for
some applications. The high precision of a sinusoidal oscillator
should have a THD lower than 1%. Thus, an additional auxiliary
amplitude control circuit and technology can be used to yield a
lower total harmonic distortion of the generated output signals
through external means. [2]. However, such a circuit and technology were beyond the scope of this study. Fig. 7 shows the

transient response of the proposed oscillator when building


the oscillations for the component values of Rp Rn 0.225 kO
(IB1 IB3 57.78 mA), C1 C2 10 nF, and gm 17.88 mS (IB2
929.76 mA). With regard to strengthening the start-up process
for oscillation, an external automatic gain control circuit should
be used to ensure a smooth start-up process [2]. To attain the
highest applicable operating frequency of the proposed circuit,
the fastest and most convenient way is to employ a lower
capacitance value. By adopting Rp 0.086 kO (IB1 150 mA), Rn
0.197 kO (IB3 65.9 mA), gm 11.34 mS (IB2 590 mA), C1 0.1 nF,
and C2 1 nF, Fig. 8a shows the simulation results for the voltage
output and current output waveforms of the proposed circuit in
the steady state with fo 4.52 MHz. Under this condition, the
percentage of total harmonic distortions was determined to be
2.93% for Vo and 4.56% for Io. Fig. 8b shows a start-up case for the
highest frequency of oscillation by adopting Rp 0.086 kO (IB1
150 mA), Rn 0.197 kO (IB3 65.9 mA), gm 11.15 mS (IB2 580 mA),
C1 0.1 nF, and C2 1 nF. Because of the limitation of the maximum slew rate of the proposed CCCDTA (Fig. 2), the highest
frequency of the proposed oscillator was only demonstrated at
approximately several MHz. However, it is concluded that a
higher slew rate of the CCCDTA can be applied to accelerate the
oscillation frequency for the proposed oscillator. To demonstrate
the inuence of the oscillation frequency dependence on the
temperature variation of the circuit (Fig. 3), a test with a design
specication of fo 100 kHz was executed to explore this characteristic. In this experiment, Rp Rn 0.225 kO (IB1 IB3
57.78 mA), C1 C2 10 nF, and gm 17.98 mS (IB2 934.96 mA)

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H.-C. Chien, J.-M. Wang / Microelectronics Journal 44 (2013) 216224

Fig. 6. Simulation results of the current output Io for the circuit (Fig. 3): (a) output waveform in the steady state and (b) corresponding frequency spectrum.

Fig. 7. Simulation results of the start-up oscillations of the circuit (Fig. 3).

were rst decided based on the previous design example. The


temperature was then varied from 0 1C to 70 1C in 10 1C steps
to investigate the oscillation frequency changed. Fig. 9 shows
the test results for the variation of the oscillation frequency under
different temperature conditions. Fig. 9 shows that higher temperature conditions result in lower oscillation frequency, as

anticipated by using (9). The oscillation deviations between the


theoretical value (fo 100 kHz) and the test results ranged from
2.69% to 11.51%, and the temperatures varied from 0 1C to 70 1C.
One feature of the presented circuit is its electronically tunable
function. To investigate this characteristic, the following values
were rst applied: Rn 0.197 kO (IB3 65.9 mA), gm 11.34 mS

H.-C. Chien, J.-M. Wang / Microelectronics Journal 44 (2013) 216224

223

Fig. 8. Simulation results of the highest applicable oscillations of the circuit (Fig. 3): (a) output waveform in the steady state; and (b) the start-up of the oscillations.

104

550

Oscillation frequency (kHz)

Oscillation frequency (kHz)

102
100
98
96
94
92
90

Theoretical
Simulation

500
450
400
350
300
250
200

88

150

10

20

30

40
Temperature (oC)

50

60

70

Fig. 9. Variation of the oscillation frequency under different temperature conditions of the circuit (Fig. 3).

(IB2 590 mA), C1 1 nF, and C2 10 nF. IB1 was then changed from
20 mA to 150 mA in 10 mA steps to inspect the variation of the
oscillation frequency. Fig. 10 shows the theoretical and simulated
results of the electronic tuning of the oscillation frequency with
the bias current IB1. These simulations results are close to the
theoretical prediction and conrm the feasibility of the proposed
conguration. The proposed sinusoidal oscillator has a simple
topology and provides dual-mode operation with electronically
tunable properties.

20

30

40

50

60

70

80

90

100 110 120 130 140 150

IB1 (A)
Fig. 10. Oscillation frequency against the bias current IB1 of the circuit (Fig. 3).

5. Conclusions
This study presents a sinusoidal oscillator that uses a recently
reported active-device CCCDTA, which has not appeared in the
previous studies. The proposed circuit consists of a single active
device with only two external capacitors, and is capable of dualmode operation. This paper describes the related governing
equations of the proposed oscillator, and presents a discussion
on the non-ideality analysis and design considerations of the

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H.-C. Chien, J.-M. Wang / Microelectronics Journal 44 (2013) 216224

circuit. The computer simulations in this study show good


agreement with the theoretical analyses. The proposed circuit
provides a novel application for CCCDTA devices. Because of its
simplicity and versatility, the proposed oscillator provides a new
possibility for circuit designers and will have wide applications in
instrumentation, measurement, and communication systems.
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