EC43/15 A SRT ERATE / Govemment of India after Fasnet / Department of Space fama arg aiafter Sa / VIKRAM SARABHAI SPACE CENTRE feacieng / Thiwananthapuram - 696 022 fem. a. a wat WRITTEN TEST FOR SELECTION TO THE POST OF TECHNICAL ASSISTANT (ECE), ADVT. NO. 284 WE W.1243 | Post No 1243 ‘FafRiDate: 08.02.2015 ‘waite 3iav/Maximum Marks : 60 ‘WaAiTime. 1 Hevhour 30 Fere/minutes arearff ar araName of the candidate ‘er aewRol no. seafeait a fee HeteeW/Instructions to the Candidates 4. am cant da andes A vega Pee ae steerer Ber ae a svt fafa ater & fae anette fer ser 2) aie amet aa A tae vfafke AY 8 ar ee feat You have been called for the written test based on the online data furnished by you in the web application. If you have wrongly entered in the web or you do not possess the required qualification as per our advertisement, your candidature willbe rejected 2 ater eer A Ptern Fr safeaia A a snot elo-fewcretdrs we Rea aRaT TART! You should sign the hall ticket / photograph only in the presence of the Invigllator in the examination hall, 3. WRT 60 Weat B Gat meager & wT A EI ‘The Question paper is in the form of Question Booklet with 60 questions. 4. Geet aT Sect foaRY & fare areat stern Sea gfeaaT at areathy ‘A separate OMR answer sheet will be provided for answering the Questions. 6 mat aa A afta vea-vidaar Avi ats (wees), sttense Sect gfkachr oT fie Bra 4 faa Question booklet series code (AVBICIDVE) orinted on the iaht hand top comer should be writen in the OME. ‘answer sheet in the place provided. PTO10. 11 12 13, 14, 18. gea-gftcranr A aia art aur steppin Ste ote S fee Enter your Name and Roll Number correctly in the question booklet, Haan seaeyfeaa A wat wfaiteat attrac eae & ater ange Gar A a ST ety ufevl ‘All entries in the OMR answer sheet should be with blue/black ball point pen only. ue tq fautite atewar & sree oy, fafa wher ae sent & arr argferss oa F ait, eel & daa va arise wa A wel ses “The writen test will be of objective type based on the qualification prescribed forthe post with four answers indicated, of ‘which only one wil be unambiguously corect. Hat, seacgierar & fee oe sree & sega, aAeverch caret & ator age Sat SHIR SAT GSAT H eae sae Hr sifess HL TET Seay HT TIT HAT EI ‘You have to selec the right answer by marking the corresponding oval on the OMR answer sheet by blue/back ball point pen as per the instructions given in the answer sheet wer wet & PT seis Te AW ag SAN AeA AT S| Te Set & fae auidta_ sis ad] ear sree, Multiple answers fora question willbe regarded as wrong answer. No negative mark willbe given to wrong answers. ‘Computers, calculators, motile phones and other electronic gadgets, text books, notes ec, will not be allowed inside the wtten test hall ate ool gat wy, swe scavgaar aT a a dad Pet Fo wE aI AT HCH Seat gitar Pater at SH cer ae wie sed ore Te ‘On completion of the test, tear the OMR answer sheet a the perforation mark atthe top and hand over the original OMR. ‘answer sheet to the inviglator and retain the duplicate copy wit you. ear-gitear sere sir ore ta wat 81 “The question booklet can be retained by the candidate, uber & waar ue & cher sreaftiat ar when ler atger Fr sieges at 31 Candidates are not permed to leave the examination hal during te fst hour ofthe examination. seafat at caren tq aayMieaesiasr at & fae a fated ster gang sare 81 ‘The written testis conducted only to shorlist/screen.in the candidates for interview. 2 ECA/I5aerate / TECHNICAL ASSISTANT (ECE} aetar arar afte ar siseqe —— aigfer ar etam/The output of the circuit shown will be of frequency (@) 125 Hz (b) 250Hz ON a T The (©) 375 Hz _ iL @ 500 Hz. anerurg ats # Hear 149 B/The number 149 in octal code is @ 154 (b) 178 © 254 @ 225 ‘aafaetaia ae 8 Universal gates are (@) sv & ws ALI OR & AND gates (6) att & as AZINOR & NAND gates (© ALA WwsALINOR & AND gates (@) Ug & SHTAINAND & OR gates ‘Sept ators A ge B In full adder, there are (a) Sarge aiat gaye cen at s13eqe/Two binary number inputs and two outputs (d) cher angertt si sarge cre at argent s3eqe/Three binary digit inputs and two binary outputs (©) eer argarth aise sarge aren ata argerh afm ase q/Three binary digit inputs and three binary digit outputs, @_ AWE & HATNAND & OR gates Sretwar Rear ar ayer aTer B/The main advantage of PCM system is lower (a) @ atsré/bandwidth (b) — afFa/power (o) 3iTaTat/noise (d) gaara Freirsht aet/none of these N feeaet ar dar at & few aga Blase ageaw CaN fala AF eer wew as at aroha faraan a ates %iV/To transmit N signals each band limited to fy,Hz by time division ‘multiplexing will require a minimum bandwidth of (a) fn (0) 2fn © Nin @ fwvN Saaiee afer feriaa ar gelar frat fee fet srar B/Automatic gain control is used (a) Bereta B wareacor ar HeAOT Aa & FAT/To maintain the tuning correct (b) Saha Foss Gast hr vaca Hat He & FaT/To reduce the volume of loud passages of music (©) Sea anger H satier aert 3 ferw/To increase the amplification at high frequencies (fattest sarerraret weet Sr ore Bra aera STS GE A AT TAT TATE THA FAT / ‘To maintain the same volume of output when stations of different strength are received 3 ECA3/1510. ". 12. wep oor ated at ein, qeennfen afer S oer ae CT, Fa The rotor of an induction motor cannot run with synchronous speed because (@) Sea fas ar Seca Pret sTeT/Lenz’s law will bé violated (b) aa apt rae ITEP Yes eTI/Rotor torque will then be zero (Q) Rerater, qeaarfdaater sat GTEAT/Induction motor would become synchronous motor (@) aq wae, Bar GAA te Bar Air function prevents it to do so. ‘Gun tq anda Pete ar vatr ae & fae staat fear wert B/Using negative feedback for improvements, which statement is false (@) Fedrascterg/tncreased bandwidth (b) aed aiIncreased noise (©) er RewDecreased distortion (@) seagage sidarer afta fea arscqe aftartHigh input impedance but lower output impedance er UBraMRT aT 4 kD aT gage HiSarTEET 80 KO ar sseqE fear 81 10% ester araada Aste oftoer A saat watt Par ara fi ae fage oer sr ora 90 %, at aga oer sage a onseqe widened ‘An amplifier has input impedance of 4 kQ and output impedance of 80 kO. It is used in negative feedback circuit with 10% feedback. If open loop gain is 90, the closed loop input and output impedances are (a) FAR: 40 KA GUTS KOO kA and 8 kQ respectively (b) HART: 4KQ. GUT BOK KO and 80 kA respectively (©) FAR 0.4 KO eT 8O0KMN.A kA and 800 KO respectively (d) FAR: SLO TAT 160K kA and 160 kA respectively we emt oferty ain a current transformers (a) wigattud det arefesat & acet ft sean warsrr sara eVa/the number of turns in primary and secondary windings are nearly equal (b) Sastadat aS gaan aaa oeurgat adel At eer age GE B/the number of primary tums is very small as compared to number of secondary turns. Co) srgartr acta 8 orem art TSA aia At GeAT ART O'S El/the number of secondary turns is very small as compared to the number of primary turns (@ Arata) aera (c)either (a) oF (©). ARE Bic = 100 & at 10 yA &r sree oer a fee Bras Seas A ORT ant ar aps PAT 27/For a base current of 10 WA, what is the value of collector current in common emitter if Bic = 100 (@) 10pA () 100 pA (© Ima @ 10ma 4 ECS13. 14. 15. 16. 7, ew oRoniaa ar acer sey 20:1 & aie sh & Ber 100 sr ane stgar F al, saga 3 feaeraren vardr ofeter Perera ee1r7/The turn ratio of a transformer is 20:1, if a load of 10 Q is connected across the secondary, what will be the effective resistance seen looking into the Primary? @ 2k2 (&) 4ko © ska @ = 32ka farafataa 4 & staat feawer wet @/ Which statement is correct? (@) deter ed stare, ter facia afteat &/BIT and MOSFET are current controlled devices (0) asd, dtecar Praia @ state, ore Preifta aia S/BIT is voltage controlled and MOSFET is current controlled device (0) ataered aietke, atecar reife aftcrat /BIT and MOSFET are voltage controlled devices (8) SS, ere rafter 8 stank, atecar fereifie Blta S/BIT is current controlled and MOSFET is voltage controlled device sfererarat Raia Ger art a fare var 100 Hz arg aT aT —— AF wera Par ore aTeei/ To satisfy the sampling theorem, a 100 Hiz sine wave should be sampled at (2) 10 Hz () 100 Hz (200 Hz (¢) 50 Hz fea 4 cate cite a vede vfedttes Roster Fb) one F feae Wor ti Pas az ae we ‘atat & ctaat ar Far eter? All the resistance in the circuit in the figure are at R ohms each. The switch is initially open. What happens to the lamps intensity when the switch is closed? ae (@) Fa BIncreases (o) srafafefa eta @/remain same (©) Wes eDecreases (@)_R AFT anPRa/answer depends on the value at R we AH R-L-C Bt A R= 50 Q,L= 100m wT C= Ip F eet RoR FY areparey airgfer 8/A series R-L-C circuit has R= 50 ©, L~= 100mH and C= 1p F. The resonant frequeney of the circuit is (a) 30.55 kHz () 51.92 kHz (© 3.055 kHz (@) 1.92 kHz 5 ECA/1518, 19. 20. avi oftae 4 | aT FET Bin the circuit shown, the value of I is Tt 2ohm ohm 5A Bohm oa. (@ 1A (®) 2A © 4A @ 8A faa F eeie 6 Vaart spis ar gat wieder yer dar & aie at ates mAl Roar rT aga Pree &, fret sae Het aiecar 6 VB war aw ai/The 6 V zener diode shown in the figure has zero zener resistance and a knee current of 5 mA. The minimum value of R so that the voltage across it does not fall below 6 V is 50 chm ov R @ 1.2kohms (6) 80 ohms (©) 50 ohms (@ 0 ohms yarn aor & ag ft cig Bart wera tata vate & as A ters Pearqan a orto ‘The Bandwidth of an n-stage tuned amplifier, with each stage having a bandwidth of B, is given by @: o = © BvaR=1 @ Ts 6 ECHB/IS2 22. 23. fea a ww fleas cle a on TD sees Cae % ea A daira fare 21 ofoy At eit dare stecar aasrer ——— @/Given figure shows a silicon transistor connected as.acommon emitter amplifier. The quiescent collector voltage of the circuit is approximately. 106 104 a4}-—t-——_} %« ‘oh (@ 203V () 10V @ Vv @ 2v we cam oie A gain we Bx recombination of electrons and holes occurs in ‘H feta Bin a junction transistor, (a) ae 38 sta/base region only (b) sae SeRskR SFemitter region only. (c) %aa tne Ha/collector region only (@)_ astra avall the 3 regions Um gferet & afta sof-arr fr antar 50 mw @) ate dart seuorH ateeat 10 Ve aT afreer & vata wet tq agra gia aon one Pah 87/The maximum power dissipation capacity of a transistor is 50 mW. If the collector emitter voltage is 10 V. What is the safe collector current that can be allowed through the transistor? (@) Sma (be) .2.5mA (© 10ma (@ 25ma 7 BCA3/1524. oftaer 4 getter ser gfesieet ——— # wart arat @/The transistor in the circuit shown is operating in (a) sic aka/cut off region (b) after alactive region (©) Beier ea/saturation region (@) wat afta arerar dqfta saleither in the active or saturation region 25, arta Rhea quhatatt warcearor Recent afta, Re aw fa a cetera 2 sretet a gate acat 81 Weds sats FT rms atecaw B/The centre tap full-wave single-phase rectifier circuit uses 2 diodes as shown in the given figure. The rms voltage across each diode is 2k 280 Vrms (a) 790.7V (0) 395.3V (©) 280V @ 201.3V A 8 ECAS/S26. fee me fas a age oer A dB eftiaret a ow atecaT aa Van = 4 sinwt ar 3geahT fer srar @1 AT & Pe seis arent Ei fla Aca B OW SRE ST sfsareT BA voltage source Vag =4 sinwt is applied to the terminals A and B of the circuit shown in the given figure. ‘The diodes are assumed to be ideal. The impedance by the circuit across the terminals A and B is i ot (a) 5k ® 0k @ 15k @ 20k 27. ary avhe giaecx ofver A apstecat aT Tags + 20 V Bilin the transistor circuit shown below, the collector to ground voltage is +20 V. v20v 10K 47k ov! ‘donee feafer B/The possible condition is (a) dant seaste sfelerar a ater fra GaTT/Collector-emitter terminals shorted (>) Hauer ar seacien ergait/emitter to ground connection open (©) 10k ohms sfarteras gengsi/10 k ohms resistor open. (@) Hang. anene efter Ber Pragai/collector-base terminals shorted A 9 ECA3/1528. aeite fteer & fee rer 1 eem/Current | for the circuit shown will be @ 3mA (b) 2.81 mA © 6.16mA @ 10ma 29, fae ne faa a aeie amet aeak, afterat deifee wer fem veer frat oT ‘BwAT BRC network shown in the given figure can provide maximum theoretical phase shift of —i (@) 90° (b) 180° © 270° (a) 360° 30. op-amp a ster arctan Rest gute oRuer spr —— gta BYA circuit using op-amp shown below has mi Rt Ve i, vet =o “0 (a) atecaroit yer sroT/Voltage series feedback (b) atecar sis G:371/Voltage shunt feedback (©) UTS FSNUT/Current shunt feedback (@) Snr Aph yer-areT/Current series feedback A 10 ECa3/1531 32. 33, far & cete ah fuer a ansege & fae qe aise B/Boolean expression for the output of the logic circuit shown in the figure is —j> 4 | (a) Y =AB+AB+C (b) AB+AB+C () Y=AB+AB+C (d) AB +AB+C wm argpitee oftae a fet st ator # srseqe —— oy free ga Bln a sequential circuit, the outputs at any instant of time depends (a) seh erorat faqgaret garget ow ATa/only on the inputs present at that instant of time (b) ya arseqet ed acharer gaget ation past outputs as well as present inputs (c) 38 serget az Ara/only on the past inputs (d) adaner sitseyet ax Ara/only on the present outputs 08 1023 am ais eet & fae we cfasrenit ast saw ar Pater axa tq Peat wae fa Gow many FFs are required to build a binary counter circuit to count from 0 to 10237 @! ®) 6 © 10 @® 24 few ae fas at Raragan at as ato aare ae uw Racaciy & fae, aquasa ee aT war @ @iFor a flip-flop formed from two NAND gates as shown in the given figure, the ‘unusable state corresponds to @ X=0, Y-0 (b) X=0, Y=1 @ X=1,Y-0 (@) Xe, Y=2 u ECA3/1536. 36. 37. 38. 39. 1024 <8 fae Ig & Auf wT Use aw ster BThe address bus wieth of a memory of size 1024 8 bits is (a) 10 bits (b) 13 bits (© 8 bits @ 18 bits we amiat Rada sey 8 fe ce A oad A Heed A sear The number of comparators in a parallel conversion type 8-bit A to D converter is, fa) 8 (b) 16 (255 @ 127 3fac Bisco anseqe A oRafia wet H fae 0S 8 V tt & UH aE aeeat FT IS ware siatret Hf faanfsrr ar stat &1 affect saisteor gfe B/ An analog voltage is in the range of 0 to 8 V is divided in eight equal intervals for conversion to 3-bit digital output. The ‘maximum quantization error is (@ ov (b) OSV @ Iv @ 2 Uh VHF aga # 100 Hz aha & scorer srqfeet feet 50 KHZ &1 angfer aga Yaa BrThe frequency deviation produced in a VHF cartier by a signal of 100 Hz is SO KHZ. The frequency modulation index is (a) 100 %f8248/100 radians (b) 250 2Bea/250 radians (©) 500 2f¥ar-H/500 radians (@) 750 2f$arH/750 radians NPN gieseet A, ae seaoin aft safes arafaa & stk dang af cea arafha & ae gieaeee #1 Varta —— # gioniin NPN transistor, when emitter junction is forward biased and collector junction is reverse bias, the transistor will operate in (a) Bitar aa/Active region () dgfBeda/Saturation region (©) sa 8F/Cut off region (4) =apwH Aa/Inverted region 2 ECB/S40. a. 42, 43, cae, wr agus aiea &, at ——— & wo A at aeat WA triac is a semi-conductor device which acts as a (a) 2 eftfaer venfdeia fFaa/2 Terminal unidirectional switch (b) 2 eféferer afafeefrar fFae/2 Terminal bidirectional switch (©) 3 eféfare afafeefra feee/3 Terminal bidirectional switch (© 4 cfr agitate FEae/4 terminal multi-directional switch wa wager a —— @lat @/A FET has (a) 3ifer sea gerge afeRter/very high input resistance (b) agama gage UfRet/very low input resistance (©) Jeaatecar seaste BfWhigh voltage emitter junction (@) 37 aaTEPN HiB/forward bias PN Junction CE tian & Pat doch awit awaeascgaye sa H yavar wider How many cascaded stages of CE amplifiers will result in polarity inversion of the input signal? @ a/Two (b) da/Three (© RFour @ — FeatragiNone fasaiefae A 8 afta vicar erat afer ster 82/Which of the following is the fastest switching device? (a) SeRSevJFET (&) | sevBIT (&) Htehe/MOSFET (@® grbs/Triode wa afr ae sera gies ——— # versa fear st wat BIA junction Field Effect Transistor can operate in (@) SAAR Ara/depletion mode only (b) Hafe faferara/enhancement mode only (©) ata agi fefdepletion and enhancement modes (@) waterh ste a age faf/neither depletion nor enhancement modes 13 EC&3/1545, 46. 47. 48. 49, 50. vearaet ont ait ea a deh A ee qe —— aqua ar vfafaitier axa Bi/The form factor in reference to alternating current wave form represents the ratio of (a) SaxeareH apa aT attee [Pathe average value to the RMS value (b) siewares apa at fret APathe peak value to the RMS value (©) Hite apa ar HRVATE Fpaithe RMS value to the average value (@) Rat apa ar snTWsTeH Hea/the RMS value to the peak value um tice et —— erat 8/An amplifier should have (a) set aqUAT/High fidelity (b) fRETTa/Low noise (c) =u wearea/Stable operation (@) — S74FATAWAVAL of the above ue aig oon ai valet azar @/A pulse transformer uses (a) Sage *R/ferrite core (bo) AZ*PWair core (¢) ater #R/iron core (d) Arar #Vcopper core aifera fear & fae arkerset vera —— #/Barkhausen criterion for oscillator stability is (@) Ap=0 (b)ABéI (© Apel @ — A=Vsqrt(9) ect atte aftuer & fare weak afer atau 87/What suits best for a Hartley oscillator circuit? (a) Fehon fore vem denfea/a Capacitor for feedback (b) grater fore war wenters ait Geneva resistor and capacitor for feedback (©) Srahors fare wm tes aitnfta ae Sea tapped capacitor and inductor for feedback (G) Seite qereier'& fare war tes Brava tapped inductor for inductive feedback we teeny & fae after or stare aera (wfc) far @/For an amplifier the coupling method which gives the highest gain is (a) Renita geFaTitransformer coupling (b) sfaxtelr qvaretiresistance coupling (©) sfaarer azaeH/impedance coupling (@) tafe gaH/capacitance coupling 4 ECAS/1551 52. 53. 54, 56. 16 & faxea aed & fae Past Pas Fale oferat $1 araeasart &? How many Flip flops circuits are needed to divide by 16? (@) @Two (b) awFour (©) 3Te/Eight (@ — Brae/Sixteen 8085 aigat sider A wins: ceed dear 8 afta A sit 8 aie ge ce wat aT areet agar sraffeas Pre rar & at afte sifear Sear ey In 8085 microprocessor, initially the number decimal 8 is stored. If instruction RAL is executed twice on this number, the final number stored will be (a) aerstera/decimal 8 (b) errea/decimal 800 (©) aeraera/decimal 32 (@ — zeAaldecimal 2 600 x 400 & wo HF Peer yexia A vata oe A Prawet fr dear Bin a display specified as 600 x 400 the number of pixels across the display screen is (@) 600 (b) 400 (© 24000 (@) satea AA as AEI/nonc of the above aft cm arash seatue a atecarsa 24 Vv & att see saiga ont 6 & at sfaters AT (ghar #) B/if across an ideal resistor, the voltage drop is 24 V and the current passing through it is 6, then the resistor value (in ohms) is @ 144 @) 4 © 0.25 (@) setter AS ag aAe/none of the above @enfalea A a stat sagt Here ar sea ferisia gat E7/Which of the following IC logic families has the highest fan-out? (@) Sea TL (b) vasitea/CMOS (© Siea/ECL (d)_ sites fétwa/Schottky TTL 15 BCA3/1556. 87. 58. 59. 60. oe gitarecet ar sifter oar a water Pear sen & aw & weeaerar ———_ gare a ‘#/When transistors are used in digital circuits they usually operate in the: (@) afta eavactive region (b) S54 8aV/breakdown region (©) Fafa ea 3iarH Aaysaturation and cutoff regions (@) Yf&H ae/linear region agé SheRt A sigdt (greet ae, weet (er ee) ae Ser (efPoTRT eights) freanqan safe B/ In microprocessors, the IC (instruction cycle), FC (fetch cycle) and EC (execution cycle) are related as (a) IC=FC-EC (bt) IC=FC+EC (©) FC=IC+EC (@ BC=IC+FC ww 256 x4 Sdnier & ——— eta €/ A 256 x 4 EPROM has (a) 8 ge fer ee 2 ster feat/8 address pins and 2 data pins (b) 8 we fier ve 4 srer fla/8 address pins and 4 data pins (©) 8 ga fia veg ger f¥/8 address pins and 8 data pins (A) 256 wae Rear eet 4 srer FEe/256 address pins and 4 data pins AB afeaet cise ——— & ware #/The Boolean expression AB is equivalent to @ & AB © AFB @ AB Bowe ges Fete wr ar fetes A gfe Fr ST Wal Bl /The resolution of a dual slope ADC can be increased by (a) Brferatecer aftetor were/Increasing the reference voltage magnitude (b) faderatecar afeeifg aera/Improving the reference voltage accuracy (©) Bra airgfee ware Increasing the clock frequency (@) Free Rafer AGTH Increasing the clock stability 16 ECA/IS