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Digital Communication Protocols


Minghui Zhang, Senior R&D Hardware Engineer
Kalyanramu Vemishetty, Senior Embedded Systems Engineer

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Agenda
RIO Overview
Design with Timing
Software Architecture
Q&A

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RIO Hardware
PXI, PC RIO (R Series, NI
FlexRIO)

CompactRIO and NI Single-Board RIO

Value
Value

Performance

High Performance

Expansion I/O

MXI-Express RIO

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Ethernet RIO

EtherCAT RIO

Wireless

RIO Hardware

I/O Voltage
I/O Frequency
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RIO Hardware

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SPI Example
- SPI Protocol Overview

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SPI Example
- Select SPI configuration Based on ADC
Master SPI
CPOL = 0

SCK Idle as Low

CPHA = 0
Send MOSI
@ SCK Falling Edge
Sample MISO
@ SCK Rising Edge

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SPI Example

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Backplane
Interface

SPI Interface

SPI Master
Control Interface

- Synchronous Design

SPI Clock

Base Clock

SPI Example
- SPI Protocol Design
Synchronous design

Generate SPI Signals


@ TopClk Rising Edge
Sample MISO
@ TopClk Rising Edge

Design with Timing


SCTL
Output Signals
Input Signals

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SPI Example
- SPI Protocol Timing
Single Cycle Timed Loop

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SPI Example
- SPI Protocol Output Signals
Output Signals
Arbitrate

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SPI Example
- SPI Protocol Output Signals

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SPI Example
- SPI Protocol Output Signals
Output Signals

Sync Register

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SPI Example
- SPI Protocol Input Signals
Input Signals

Sync Register

Setup time

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Hold time

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Designing FPGA Digital Communication Protocol Stack


Communication
Protocol Core

Communication
Protocol API

Communication
Protocol Abstraction
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Designing FPGA Digital Communication Protocol Stack


Communication
Protocol Core

Communication
Protocol API

Communication
Protocol Abstraction
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Case Study

Acquire Data from ADC using SPI Communication Protocol

SPI

ADC

FPGA

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Communication Protocol Core


Use State Machine

True

Arbitratio
n Logic

DIO 0

False
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Communication Protocol Core


Decouple I/O from State Machine

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Communication Protocol Core


Get I/O Values

Initialize DIO Lines


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Set I/O Values

SPI Core
(State Machine)

Deep Look at Code

Read SPI Digital Lines

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Deep Look at Code

Write SPI Digital Lines

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Communication Protocol Core

Desktop Execution Node


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Simulated SPI Core Waveforms


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Designing FPGA Digital Communication Protocol Stack


Communication
Protocol Core

Communication
Protocol API

Communication
Protocol Abstraction
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Case Study

Acquire Data from similar ADC using SPI Communication Protocol

SPI

ADC

FPGA
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Why create API?

Abstraction from Hardware Layer


Reusable
Easy-To-Use

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Good Practices when creating API

Consistency
Easy To Use
Decoupling
Error Handling

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Communication Protocol Messaging API


Communication
Protocol Engine
(120MHz)

Command Queuing
Loop
(1kHz)
SPI Transaction Commands
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Communication Protocol Messaging API


Data transferred using
FPGA Scoped FIFOs

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Deep Look at Code

Initialize SPI References.vi

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Deep Look at Code

Write Data for SPI Transaction.vi

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Deep Look at Code

Start SPI Transaction.vi

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Deep Look at Code

Read Device Response.vi

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Deep Look at Code

SPI Engine.vi

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Designing FPGA Digital Communication Protocol Stack


Communication
Protocol Core

Communication
Protocol API

Communication
Protocol Abstraction
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Case Study

Acquire Data from ADC using SPI/I2C Communication Protocol

SPI
I2C

ADC

FPGA
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Communication Protocol Abstraction

SPI Engine
Sequence of SPI
Commands
(Driver)

Get Data

Acquired Data

Node

I/O Node
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Communication Protocol Abstraction


SPI Engine

I2C Engine

SPI Driver

I2C Driver

Data Nodes
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Integration into an Existing System Architecture

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Integration into an Existing System Architecture


SPI Abstraction

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Integration into an Existing System Architecture


I2C Abstraction

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Integration into an Existing System Architecture

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Summary

Design with Timing


- Synchronous Design
- I/O property selection
Software Architecture
- State Machine for Core IP
- Command Based API
- Custom I/O Node for abstracting different protocols

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Questions?

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Related Links

Serial Peripheral Interface Bus

http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus

SPI API (VI Package Manager)

https://github.com/NISystemsEngineering/SPIAPI

Implementing SPI Communication Protocol in LabVIEW FPGA

http://www.ni.com/example/9117/en/#toc2

Timing Analysis on Digital I/O

http://www.ni.com/white-paper/13489/en/

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