Lica Lab Manual

Department of Electronics & Communication
Engineering IC Applications lab
IC APPLICATIONS LABORATORY
Raghu engineering college, Dakamarri ,

Visakhapatnam
1

Minimum Twelve Experiments to be conducted :

1. Study of OP AMPs IC 741, IC 555, IC 565, IC 566, IC 1496
functioning, parameters and Specifications
2. OP AMP Applications Adder, Subtractor, Comparator Circuits.
3 Integrated and differentiator circuits using IC 741.
4. Active Filter Applications LPF, HPF (first order)
5. Active Filter Applications BPF, Band Reject (Wideband) and Notch
Filters.
6. IC 741 Oscillator Circuits Phase Shift and Wien Bridge Oscillators.
7. Function Generator using OP AMPs.
8. IC 555 Timer Monostable Operation Circuit.
9. IC 555 Timer Astable Operation Circuit.
10. Schmitt Trigger Circuits using IC 741 and IC 555.
11. IC 565 PLL Applications.
12. IC 566 VCO Applications.
13. Voltage Regulator using IC 723.
14. Three Terminal Voltage Regulators 7805, 7809, 7912.
15. 4 bit DAC using OP AMP.
Equipment required for Laboratories:
1. RPS
2. CRO
3. Function Generator
4. Multi Meters
5. IC Trainer Kits (Optional)
6. Bread Boards
7. Components:- IC741, IC555, IC565, IC1496, IC723, 7805, 7809, 7912
and other
essential components.
8. Analog IC Tester

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SNO
NAME OF THE EXPERIMENT

REMARKS
Study of OP AMPs IC 741, IC 555, IC 565, IC 566, IC

1496 functioning, parameters and Specifications
OP AMP Applications Adder, Subtractor, Comparator
Circuits
Integrated and differentiator circuits using IC 741.
Active Filter Applications LPF, HPF (first order)
Active Filter Applications BPF, Band Reject
(Wideband) and Notch Filters

IC 741 Oscillator Circuits Phase Shift and Wien
7
8
9
Bridge Oscillators.
Function Generator using OP AMPs.
IC 555 Timer Monostable Operation Circuit
IC 555 Timer Astable Operation Circuit.
10
11
12
13
14
15
Schmitt Trigger Circuits using IC 741 and IC 555

IC 565 PLL Applications
IC 566 VCO Applications
Voltage Regulator using IC 723
Three Terminal Voltage Regulators 7805, 7809, 7912
4 bit DAC using OP AMP.

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1. STUDY OF OP AMPS - IC 741, IC 555, IC 565, IC 566, IC

1496FUNCTIONING, PARAMETERS AND SPECIFICATIONS
IC 741
General Description:
The IC 741 is a high performance monolithic operational amplifier
constructed using the planer epitaxial process.
High common mode
voltage range and absence of latch-up tendencies make the IC 741 ideal
for use as voltage follower. The high gain and wide range of operating
voltage provide superior performance in integrator, summing amplifier
and general feed back applications.
Block Diagram of Op-Amp:
Pin Configuration:

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Features:
1. No frequency compensation required.
2. Short circuit protection
3. Offset voltage null capability
4. Large common mode and differential voltage ranges
5. Low power consumption
6. No latch-up
Specifications:
1. Voltage gain A = typically 2,00,000
2. I/P resistance RL = , practically 2M
3. O/P resistance R =0, practically 75
4. Bandwidth = Hz. It can be operated at any frequency
5. Common mode rejection ratio =
(Ability of op amp to reject noise voltage)
6. Slew rate + V/sec
(Rate of change of O/P voltage)
7. When V1 = V2, VD=0
8. Input offset voltage (Rs 10K) max 6 mv
9. Input offset current = max 200nA

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10.
Input bias current : 500nA
11.
Input capacitance : typical value 1.4pF
12.
Offset voltage adjustment range : 15mV
13.
Input voltage range : 13V
14.
Supply voltage rejection ratio : 150 V/V
15.
Output voltage swing: + 13V and 13V for RL > 2K
16.
Output short-circuit current: 25mA
17.
supply current: 28mA
18.
Power consumption: 85mW
19.
Transient response: rise time= 0.3 s

Overshoot= 5%
Applications:
1. AC and DC amplifiers
2. Active filters
3. Oscillators
4. Comparators
5. Regulators
IC 555:
Description:
The operation of SE/NE 555 timer directly depends on its internal
function.
The three equal resistors R1, R2, R3 serve as internal voltage
divider for the source voltage. Thus one-third of the source voltage V CC
appears across each resistor.
Comparator is basically an Op-amp which changes state when one
of its inputs exceeds the reference voltage. The reference voltage for the
lower comparator is +1/3 V CC. If a trigger pulse applied at the negative
input of this comparator drops below +1/3 V CC, it causes a change in state.

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The upper comparator is referenced at voltage +2/3 V CC. The output of
each comparator is fed to the input terminals of a flip flop.
The flip-flop used in the SE/NE 555 timer
IC is a bistable
multivibrator. This flip flop changes states according to the voltage value
of its input. Thus if the voltage at the threshold terminal rises above +2/3
VCC, it causes upper comparator to cause flip-flop to change its states. On
the other hand, if the trigger voltage falls below +1/3 V CC, it causes lower
comparator
to change its states.
Thus the output of the flip flop is
controlled by the voltages of the two comparators.
A change in state
occurs when the threshold voltage rises above +2/3 V CC or when the
trigger voltage drops below +1/3 Vcc.
The output of the flip-flop is used to drive the discharge transistor
and the output stage. A high or positive flip-flop output turns on both the
discharge transistor and the output stage.
The discharge transistor
becomes conductive and behaves as a low resistance short circuit to

ground.
The output stage behaves similarly.
When the flip-flop output
assumes the low or zero states reverse action takes place i.e., the
discharge transistor behaves as an open circuit or positive V CC state. Thus
the operational state of the discharge transistor and the output stage
depends on the voltage applied to the threshold and the trigger input
terminals.
Block Diagram of IC 555:

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Pin Configuration:
Function of Various Pins of 555 IC:

Pin (1) of 555 is the ground terminal; all the voltages are measured with
respect to this pin.
Pin (2) of 555 is the trigger terminal,
If the voltage at this terminal is
held greater than one-third of VCC, the output remains low.
A negative
going pulse from Vcc to less than Vec/3 triggers the output to go High. The
amplitude of the pulse should be able to make the comparator (inside the
IC) change its state. However the width of the negative going pulse must
not be greater than the width of the expected output pulse.

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Pin (3) is the output terminal of IC 555.
There are 2 possible output
states. In the low output state, the output resistance appearing at pin (3)
is very low (approximately 10 ). As a result the output current will goes
to zero , if the load is connected from Pin (3) to ground , sink a current I Sink
(depending upon load) if the load is connected from Pin (3) to ground, and
sinks zero current if the load is connected between +VCC and Pin (3).
Pin (4) is the Reset terminal.
When unused it is connected to +V cc.
Whenever the potential of Pin (4) is drives below 0.4V, the output is
immediately forced to low state.
The reset terminal enables the timer
over-ride command signals at Pin (2) of the IC.

Pin (5) is the Control Voltage terminal.This can be used to alter the
reference levels at which the time comparators change state. A resistor
connected from Pin (5) to ground can do the job.
capacitor is connected from Pin (5) to ground.
Normally 0.01F
This capacitor bypasses
supply noise and does not allow it affect the threshold voltages.
Pin (6) is the threshold terminal. In both astable as well as monostable
modes, a capacitor is connected from Pin (6) to ground. Pin (6) monitors
the voltage across the capacitor when it charges from the supply and
forces the already high O/p to Low when the capacitor reaches +2/3 VCC.
Pin (7) is the discharge terminal. It presents an almost open circuit when
the output is high and allows the capacitor charge from the supply
through an external resistor and presents an almost short circuit when the
output is low.
Pin (8) is the +Vcc terminal. 555 can operate at any supply voltage from
+3 to +18V.
Features of 555 IC:

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1. The load can be connected to o/p in two ways i.e. between pin 3 &
ground 1 or
between pin 3 & VCC (supply)
2. 555 can be reset by applying negative pulse, otherwise reset can be
connected to +Vcc to avoid false triggering.
3. An external voltage effects threshold and trigger voltages.
4. Timing from micro seconds through hours.
5. Monostable and bistable operation
6. Adjustable duty cycle
7. Output compatible with CMOS, DTL, TTL
8. High current output sink or source 200mA
9. High temperature stability
10.
Trigger and reset inputs are logic compatible.
Specifications:
1. Operating temperature
SE 555--
NE 555--
0o to 70oC
2. Supply voltage
+5V to +18V
3. Timing
Sec to Hours
4. Sink current
200mA
5. Temperature stability
-55oC to 125oC
50 PPM/oC change in temp or 0-
005% /oC.
Applications:
1. Monostable and Astable Multivibrators
2. dc-ac converters
3. Digital logic probes
4. Waveform generators
5. Analog frequency meters
6. Tachometers
7. Temperature measurement and control

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8. Infrared transmitters
9. Regulator & Taxi gas alarms etc.
IC 565:
Description:
The Signetics SE/NE 560 series is monolithic phase locked loops.
The
SE/NE 560, 561, 562, 564, 565, & 567 differ mainly in operating frequency
range,
power
supply
requirements
and
frequency
and
bandwidth
adjustment ranges. The device is available as 14 Pin DIP package and as

10-pin metal can package. Phase comparator or phase detector compare
the frequency of input signal f s with frequency of VCO output fo and it
generates a signal which is function of difference between the phase of
input signal and phase of feedback signal which is basically a d.c voltage
mixed with high frequency noise.
voltage.
Output is error voltage.
LPF remove high frequency noise

If control voltage of VCO is 0, then
frequency is center frequency (fo) and mode is free running mode.

Application of control voltage shifts the output frequency of VCO from f o to
f.
On application of error voltage, difference between f s & f tends to
decrease and VCO is said to be locked. While in locked condition, the PLL
tracks the changes of frequency of input signal.
Block Diagram of IC 565:

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Pin Configuration:
Specifications:
1. Operating frequency range
2. Operating voltage range
:
:
0.001 Hz to 500 KHz
6 to 12V

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3. Inputs level required for tracking
10mV rms minimum to 3v
10 K typically
(p-p) max.
4. Input impedance
5. Output sink current
1mA typically
300 PPM/oC typically
1.5%/V maximum
8. Triangle wave amplitude
typically 2.4 VPP at 6V
9. Square wave amplitude
typically 5.4 VPP at 6V
10.
Output source current
10mA typically
11.
Bandwidth adjustment range
<1 to > 60%
6. Drift in VCO center frequency

(fout) with temperature
7. Drif in VCO centre frequency with
supply voltage
Center frequency fout = 1.2/4R1C1 Hz

= free running frequency
FL = 8 fout/V Hz
V = (+V) (-V)
L
fc =
2
(
3
.
6
)
x
10 3 xC 2
1/ 2
Applications:
1. Frequency multiplier
2. Frequency shift keying (FSK) demodulator
3. FM detector
IC 566:
Description:
The NE/SE 566 Function Generator is a voltage controlled oscillator
of exceptional linearity with buffered square wave and triangle wave
outputs. The frequency of oscillation is determined by an external resistor
and capacitor and the voltage applied to the control terminal.
The
oscillator can be programmed over a ten to one frequency range by

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proper selection of an external resistance and modulated over a ten to
one range by the control voltage with exceptional linearity.
Block Diagram of IC566:
Pin diagram:

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Specifications:
Maximum operating Voltage ---
26V
Input voltage
---
3V (P-P)
Storage Temperature
---
-65oC to + 150oC
Operating temperature ---
0oC to +70oC for NE 566

-55oC to +125oC for SE 566
Power dissipation
---
300mv
Applications:
1. Tone generators.
2. Frequency shift keying
3. FM Modulators
4. clock generators
5. signal generators
6. Function generator
IC 1496
Description:
IC balanced mixers are widely used in receiver ICs. The IC versions
are usually described as balanced modulators. Typical example of
balanced IC modulator is MC1496.
The circuit consists of a standard
differential amplifier (formed by Q5 _ Q6 combination) driving a quad

differential amplifier composed of transistor Q1 Q4.
The modulating
signal is applied to the standard differential amplifier (between terminals 1

and 4). The standard differential amplifier acts as a voltage to current
converter. It produces a current proportional to the modulating signal. Q 7
and Q8 are constant current sources for the differential amplifier Q 5 Q6.

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The lower differential amplifier has its emitters connected to the package
pins ( 2 & 3) so that an external emitter resistance may be used. Also
external load resistors are employed at the device output (6 and 12
pins).The output collectors are cross-coupled so that full wave balanced
multiplication takes place. As a result, the output voltage is a constant
times the product of the two input signals.
Schematic of IC1496:
Pin Configuration:

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Applications of MC 1496:
a) Balanced modulator
b) AM Modulator
c) Product Modulator
d) AM Detector
e) Mixer
f) Frequency Doublers.
2. OP AMP APPLICATIONS ADDER, SUBTRACTOR,

COMPARATOR CIRCUITS
Aim: To design adder, subtractor and comparator for the given signals by
using operational amplifier.

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Apparatus required:
S.No
Equipment/Component
Specifications/Value
Quantity
1
2
3
4
5
name
IC 741
Resistor
Regulated Power supply
Function Generator
Cathode Ray
-----1
1k
(0 30V),1A
(.1 1MHz), 20V
(0 20MHz)
1
4
2
1
1
Oscilloscope
Multimeter
digit display
p-p
Theory:
Adder: A two input summing amplifier may be constructed using the
inverting mode. The adder can be obtained by using either non-inverting
mode or differential amplifier. Here the inverting mode is used. So the
inputs are applied through resistors to the inverting terminal and noninverting terminal is grounded.
This is called virtual ground, i.e. the
voltage at that terminal is zero. The gain of this summing amplifier is 1,

any scale factor can be used for the inputs by selecting proper external
resistors.
Subtractor: A basic differential amplifier can be used as a subtractor as
shown in the circuit diagram. In this circuit, input signals can be scaled to
the desired values by selecting appropriate values for the resistors. When
this is done, the circuit is referred to as scaling amplifier. However in this
circuit all external resistors are equal in value. So the gain of amplifier is
equal to one. The output voltage V o is equal to the voltage applied to the
non-inverting terminal minus the voltage applied to the inverting terminal;
hence the circuit is called a subtractor.
Comparator:
The
circuit
diagram
shows
an
op-amp
used
as
comparator. A fixed reference voltage V ref is applied to the (-) input, and
the other time varying signal voltage Vin is applied to the (+) input;
Because of this arrangement, the circuit is called the non-inverting
comparator.
Depending upon the levels of V in and Vref,

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the circuit

produces output. In short, the comparator is a type of analog-to-digital
converter. At any given time the output waveform shows whether V in is
greater or less than Vref.
The comparator is sometimes also called a
voltage-level detector because, for a
desired value of V ref, the voltage
level of the input Vin can be detected

Circuit Diagrams:
Fig 1: Adder

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Fig 2: Subtractor
Fig 3: Comparator
Procedures:
A) Adder:
1. Connect the circuit as per the diagram shown in Fig 1.
2. Apply the supply voltages of +15V to pin7 and pin4 of IC741
respectively.
3. Apply the inputs V1 and V2 as shown in Fig 1.
4. Apply two different signals (DC/AC ) to the inputs
5. Vary the input voltages and note down the corresponding output at pin
6 of the IC 741 adder circuit.
6. Notice that the output is equal to the sum of the two inputs.
B) Subtractor:
1. Connect the circuit as per the diagram shown in Fig 2.
2.
Apply the supply voltages of +15V to pin7 and pin4 of IC741
respectively.
3
Apply the inputs V1 and V2 as shown in Fig 2.
4. Apply two different signals (DC/AC ) to the inputs

5. Vary the input voltages and note down the corresponding output at pin
6 of the IC
741 subtractor circuit.

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6. Notice that the output is equal to the difference of the two inputs.
C) Comparator:
1.
A fixed reference voltage Vref is applied to the (-) input, and to the other
input a varying voltage Vin is applied as shown in Fig 3.
2.
Vary the input voltage above and below the Vref and note down the
output at pin 6 of 741 IC.
3.
Observe that,
when Vin is less than Vref, the output voltage is -Vsat ( - VEE)
when Vin is greater than Vref, the output voltage is +Vsat (+VCC)
Observations:
Adder:
V1(V)
V2(V)
Vo(V)
V1(V)
V2(V)
Vo(V)
Vin(V)
Vref(V)
Vo(V)
Subtractor:
Comparator:

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Model Calculations:
a) Adder
Vo = - (V1 + V2)
If V1 = 2.5V and V2 = 2.5V, then
Vo = - (2.5+2.5) = -5V.
b) Subtractor
Vo = V2 V1
If V1=2.5 and V2 = 3.3, then
Vo = 3.3 2.5 = 0.8V
c) Comparator
If Vin < Vref, Vo = -Vsat - VEE
Vin > Vref, Vo = +Vsat = +VCC
Precautions:
Check the connections before giving the power supply.
Readings should be taken carefully.
Result:
For adder, subtrac or and comparator circuits, the practical values
are compared with the theoretical values and they are nearly equal.
Inference:
Different applications of opamp are observed.
Questions & Answers:
1. What is the saturation voltage of 741 in terms of VCC?
Ans: 90% of VCC
2. What is the maximum voltage that can be given at the inputs?

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Ans: The inputs must be given in such a way that the output should be
less than Vsat.
3. INTEGRATOR AND DIFFERENTIATOR CIRCUITS USING IC

741
Aim: To design and verify the operation of an integrator and differentiator
for a given input.
Apparatus required:
S.No
Equipment/Component
Quantity
1
2
3
name
741 IC
Capacitor
Resistors
Refer page no 2
0.1f
1K, 1K ,1M ,
1
1
Each one
Regulated Power
100K
(0 30)V,1A
5
6
supply
Function generator
Cathode Ray
(1Hz 1MHz)
(0 20MHz)
1
1
Oscilloscope
Theory:
Integrator: In an integrator circuit, the output voltage is integral of the
input signal.
The output voltage of an integrator is given by V o = -1/R1Cf
Vidt
At low frequencies the gain becomes infinite, so the capacitor is fully

charged and behaves like an open circuit. The gain of an integrator at low
frequency can be limited by connecting a resistor in shunt with capacitor.

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Differentiator: In the differentiator circuit the output voltage is the
differentiation of the input voltage. The output voltage of a differentiator
is given by
V o = -RfC1
dVi
.The input impedance of this
dt
circuit decreases with increase in frequency, thereby making the circuit

sensitive to high frequency noise. At high frequencies circuit may become
unstable.
Circuit Diagrams:
Fig 1: Integrator

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Fig 2: Differentiator
Design equations:
Integrator:
Choose T = 2RfCf
Where T= Time period of the input signal
Assume Cf and find Rf
Select Rf = 10R1
Vo (p-p)
1
=
R1C f
T /2
Vi ( p p ) dt
Differentiator:
Select given frequency fa = 1/(2RfC1), Assume C1 and find Rf
Select fb = 10 fa = 1/2R1C1 and
find R1
From R1C1 = RfCf, find Cf

Procedures:
Integrator
1. Connect the circuit as per the diagram shown in Fig 1
2. Apply a square wave/sine input of 4V(p-p) at 1KHz
3. Observe the output at pin 6.

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4. Draw input and output waveforms as shown in Fig 3.
Differentiator
1. Connect the circuit as per the diagram shown in Fig 2
2. Apply a square wave/sine input of 4V(p-p) at 1KHz
3. Observe the output at pin 6
4. Draw the input and output waveforms as shown in Fig 4
Wave Forms:
Integrator

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Fig 3: Input and output waves forms of integrator
Differentiator

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Fig 4 :Input and output waveforms of Differentiator
Sample readings:
Integrator
Input Square wave
Output - Triangular
Amplitude(VP-P)
Time period
Amplitude (VP-P)
Time period
(V)
(ms)
(V)
(ms)
Input sine wave
Output cosine
Amplitude(VP-P)
Time period
Amplitude (VP-P)
Time period
(V)
(ms)
(V)
(ms)
Differentiator:
Input square wave
Output - Spikes
Amplitude (VP-P)
Time period
Amplitude (VP-P)
Time period
(V)
(ms)
(V)
(ms)
Input sine wave
Output - cosine
Amplitude (VP-P)
Time period
Amplitude (VP-P)
Time period
(V)
(ms)
(V)
(ms)

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Model Calculations:
Integrator:
For T= 1 msec
fa = 1/T = 1 KHz
fa = 1 KHz = 1/(2RfCf)
Assuming Cf= 0.1f, Rf is found from Rf=1/(2faCf)
Rf =1.59 K
Rf = 10 R1
R1= 159
Differentiator
For T = 1 msec
f= 1/T = 1 KHz
fa = 1 KHz = 1/(2RfC1)
Assuming C1= 0.1f, Rf is found from Rf=1/(2faC1)
Rf=1.59 K
fb = 10 fa = 1/2R1C1
for C1= 0.1f;
R1 =159
Precautions: Check the connections before giving the power supply.

Result: For a given square wave and sine wave, output waveforms for
integrator and differentiator are observed.

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Inferences: Spikes and triangular waveforms can be obtained from a
given square waveform by using differentiator and integrator respectively.

1. What are the problems of ideal differentiator?
Ans: At high frequencies the differentiator becomes unstable and
breaks into oscillation. The differentiator is sensitive to high
frequency noise.
2. What are the problems of ideal integrator?
Ans: The gain of the integrator is infinite at low frequencies.
3. What are the applications of differentiator and integrator?
Ans: The differentiator used in waveshaping circuits to detect high
frequency components in an input signal and also as a rate-of
change detector in FM demodulators.The integrator is used in analog
computers and analog to digital converters and signal-wave shaping
circuits.
4. What is the need for Rf in the circuit of integrator?
Ans: The gain of an integrator at low frequencies can be limited to
avoid the
saturation problem if the feedback capacitor is shunted by a
resistance Rf
5. What is the effect of C1 on the output of a differentiator?
Ans: It is used to eliminate the high frequency noise problem.
4. ACTIVE FILTER APPLICATIONS LPF, HPF (FIRST

ORDER)
Aim: To design and obtain the frequency response of
i)
First order Low Pass Filter (LPF)
ii)
First order High Pass Filter (HPF)

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Apparatus required:
S.No
Equipment/Component
Specifications/Valu
Quantit
1
2
name
IC 741
Resistors
e
Refer page no 2
10K
y
1
3
3
4
Capacitors
Cathode Ray
0.01f
(0 20MHz)
1
1
5
6
Oscilloscope
Function Generator
(0 30V),1A
(1Hz 1MHz)
1
1
Theory:
a) LPF:
A LPF allows frequencies from 0 to higher cut of frequency, f H. At fH
the gain is 0.707 Amax, and after fH gain decreases at a constant rate with
an increase in frequency.
The gain decreases 20dB each time the
frequency is increased by 10. Hence the rate at which the gain rolls off
after fH is 20dB/decade or 6 dB/ octave, where octave signifies a two fold
increase in frequency. The frequency f=f H is called the cut off frequency
because the gain of the filter at this frequency is down by 3 dB from 0 Hz.
Other equivalent terms for cut-off frequency are -3dB frequency, break
frequency, or corner frequency.
b) HPF:
The frequency at which the magnitude of the gain is 0.707 times the
maximum value of gain is called low cut off frequency.
Obviously, all
frequencies higher than fL are pass band frequencies with the highest
frequency determined by the closed loop band width all of the op-amp.
Circuit diagrams:

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Fig 1: Low pass filter
Fig 2: High pass filter

Design:
First Order LPF: To design a Low Pass Filter for higher cut off frequency
fH = 4 KHz and pass band gain of 2
fH = 1/( 2RC )
Assuming C=0.01 F, the value of R is found from
R= 1/(2fHC) =3.97K
The pass band gain of LPF is given by
AF = 1+ (RF/R1)= 2
Assuming R1=10 K, the value of RF is found from

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RF=( AF-1) R1=10K
First Order HPF: To design a High Pass Filter for lower cut off frequency
fL = 4 KHz and pass band gain of 2
fL = 1/( 2RC )
Assuming C=0.01 F,the value of R is found from
R= 1/(2fLC) =3.97K
The pass band gain of HPF is given by
AF = 1+ (RF/R1)= 2
Assuming R1=10 K, the value of RF is found from

RF=( AF-1) R1=10K
Procedure:
First Order LPF
1. Connections are made as per the circuit diagram shown in Fig 1.
2. Apply sinusoidal wave of constant amplitude as the input such that opamp does not go into saturation.
3. Vary the input frequency and note down the output amplitude at each
step as shown in Table (a).
4. Plot the frequency response as shown in Fig 3 .
First Order HPF:
1.
Connections are made as per the circuit diagrams shown in Fig 2.
2. Apply sinusoidal wave of constant amplitude as the input such that opamp does not go into saturation.
3. Vary the input frequency and note down the output amplitude at each
step as shown in Table (b).
4.
Plot the frequency response as shown in Fig 4.

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Tabular Form and Sampled Values:

Input voltage Vin = 0.5V
a)LPF
b) HPF
Frequen
O/P
Volta
Gain
cy
Voltage(
ge
indB
V)
Gain
Vo/Vi
500Hz
700Hz
800Hz
1KHz
2KHz
Model graphs :
3KHz
4KHz
5KHz
Fig (3)
Fig(4)
Frequency response
6KHz
7KHz
characteristics
8KHz
Frequency response
9KHz
characteristics
10KHz
of LPF
of HPF
Precautions:
1. Check the connections before giving the power supply.
2. Readings should be taken carefully.

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Result: First order low-pass filter and high-pass filter are designed and
frequency response characteristics are obtained.
Inferences: By interchanging R and C in a low-pass filter, a high-pass
filter can be obtained.
1. What is meant by frequency scaling?
Ans: Change of cut off frequency from one value to the other.
2. How do you convert an original frequency (cut off) fH to a new cut off
frequency fH?
Ans: By varying either resistor R or capacitor C values
3. What is the effect of order of the filter on frequency response
characteristics?
Ans: Each increase in order will produce -20 dB/decade additional
increases in roll off rate.
4. What modifications in circuit diagrams require to change the order of
the filter?
Ans: Order of the filter is changed by RC network.
5 ACTIVE FILTER APPLICATIONS BPF & BAND REJECT

(WIDEBAND ) AND NOTCH FILTERS.
Aim: To design and obtain the frequency response of
i)
Wide Band pass filter
ii)
Wide Band reject filter
iii)
Notch filter
Apparatus required:

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36

S.N
Equipment/Component
Specifications/Val Quantity
o
1
2
name
741 IC
Resistors
ue
Refer page no 2
5.6k
3
9
Resistors
39k
Resistors
Capacitors
(20k pot)
0.01f
2
2
3
4
5
6
7
Theory:
Capacitors
0.1f
Capacitors
0.2f

Function Generator
Cathode Ray Oscilloscope
(0 30)V,1A
(1Hz 1MHZ)
(0 20MHz)
2
1
1
1
1
Band pass filter: A band pass filter has a pass band between two cutoff
frequencies fH and fL such that fH > fL. Any input frequency outside this
pass band is attenuated. There are two types of band-pass filters. Wide
band pass and Narrow band pass filters. We can define a filter as wide
band pass if its quality factor Q <10. If Q>10, then we call the filter a
narrow band pass filter. A wide band pass filter can be formed by simply
cascading high-pass and low-pass sections. The order of band pass filter
depends on the order of high pass and low pass sections.
Band Rejection Filter: The band-reject filter is also called a band-stop or
band-elimination filter.
In this filter, frequencies are attenuated in the
stop band while they are passed outside this band. Band reject filters are
classified as wide band-reject narrow band-reject. Wide band-reject filter
is formed using a low pass filter, a high-pass filter and summing amplifier.
To realize a band-reject response, the low cut off frequency f L of high pass
filter must be larger than high cut off frequency f H of low pass filter. The
pass band gain of both the high pass and low pass sections must be
equal.
Notch Filter:

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37

The narrow band reject filter, often called the notch fitter is commonly
used for the rejection of a single frequency. The most commonly used
notch filter is the twin-T network .This is a passive filter composed of two
T-shaped networks. One T network is made up of two resistors and a
capacitor, while the other uses two capacitors and a resistor. There are
several ways to make the notch filter. One way is to subtract the band
pass filter output from its input .The notch-out frequency is the frequency
at which maximum attenuation occurs and is given by
fN = 1/( 2RC )
Circuit diagrams:
Fig 1: Wideband pass filter

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Fig 2: Wideband reject filter
Fig 3: Notch filter
Design:
Band pass filter: To design a band pass filter having fH = 4KHz and
fL = 400Hz and pass band gain of 2. As shown in Fig 1,the first section
consisting of Op Amp,RF,R1,R and C is the high pass filter and second
consisting of low pass filter. The design of low pass and high pass filters.

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Low Pass Filter Design:
Assuming C=0.01f, the value of R is found from
R = 1/(2fH C) =3.97K
The pass band gain of LPF is given by ALPF = 1+ (R F / R1 )=2
Assuming R1=5.6 K, the value of RF is found from
RF =( AF-1)
R1=5.6K
High Pass Filter Design:
R = 1/(2fLC) =39.7K
The pass band gain of HPF is given by AHPF = 1+ (RF / R1 )=2
RF = ( AF-1) R1=5.6K
Band reject filter:
To design a band reject filter with fH = 4 KHz, fL =
400Hz and pass band gain of 2

Low Pass Filter Design:
R = 1/(2fH C) =3.97K
The pass band gain of LPF is given by ALPF = 1+ (R F / R1 )=2
RF =( AF-1) R1=5.6K
High Pass Filter Design:
R = 1/ (2fLC) =39.7K
The pass band gain of HPF is given by AHPF = 1+ (RF / R1) =2
RF = (AF-1) R1=5.6K
Adder circuit design: Select all resistors equal value such that gain is
unity.

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Assume R2=R3=R4=5.6 K
Notch Filter Design:
fN = 400Hz
Assuming C=0.1f,the value of R is found from

R = 1/ (2fNC)=39 K
Procedure:
Wide Band Pass Filter:
1. Connect the circuit as per the circuit diagram shown in Fig1
2. Apply sinusoidal wave of 0.5V amplitude as input such that opamp
does not go into saturation (depending on gain).
3. Vary the input frequency from 100 Hz to 100 KHz and note down the
output amplitude at each step as shown in Table (a).
4. Plot the frequency response as shown in Fig 4.
Wide Band Reject Filter:
1. Connect the circuit as per the circuit diagram shown in Fig 2
2. Apply sinusoidal wave of 0.5V amplitude as input such that opamp

output
amplitude at each step as shown in Table( b).
Notch Filter:
1. Connect the circuit as per the circuit diagram shown in Fig 3
2. Apply sinusoidal wave of 2Vp-p amplitude as input such that opamp

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output
amplitude at each step as shown in Table( c).
Frequen
O/P
Gain
cy
Voltage(
Vo/Vi indB
V)
50Hz
70Hz
Observations:
a)
100Hz
Band pass filter:

b)
300Hz
Band Reject Filter
Input voltage(Vi)=0.5V
Frequen O/P
Gain
Gain
Vo/Vi
indB
Voltag
e
Vo(V)
200Hz
400Hz
500Hz
700Hz
900Hz
1KHz
100Hz
2KHz
200Hz
3KHz
300Hz
4KHz
400Hz
5KHz
500Hz
750Hz
900Hz
1KHz
6KHz
7KHz
8KHz
1.5KHz
9KHz
2KHz
10KHz
2.5KHz
3KHz
4KHz
5KHz
6KHz
7KHz
8KHz
Raghu
engineering college, Dakamarri ,

9KHz
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42
10KHz
Gain

c) Notch filter
Input voltage=2Vp-p
Frequenc
O/P
Voltage(
Vo/Vi
Gain
in dB
V)
100Hz
200Hz
300Hz
400Hz
500Hz
600Hz
700Hz
800Hz
900Hz
1 KHz
2 KHz
3 KHz
4 KHz
Model graphs:

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43

Fig 4 : Frequency response of
Fig 5 : Frequency
response of
Band pass filter
wide band reject filter
Fig 6: Frequency response of notch filter

Precautions:
Result:
i) The frequency response of wide band pass filter is plotted as shown
in Fig 4.

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ii) The frequency response of wide band reject filter is plotted as
shown in Fig 5.
iii) The frequency response of notch filter is plotted as shown in Fig 6
Inferences: Cascade connection of HPF and LPF produces wideband pass
filter and parallel connection of the above filters gives wideband reject
filter. The notch filter is used to reject the single frequency.
1. What is the relation between fC & fH, fL?
Ans:
fC
fH fL
2. How do you increase the gain of the wideband pass filter?

Ans: By increasing the gain of either LPF or HPF
3. What is the application of Notch filter?
Ans: The rejection of single frequency such as the 50-Hz power line
frequency
4. What is the order of the filter (each type) ?.What modifications you
suggest for the
circuit diagram to increase the order of the filter?
Ans: Order of the BPF & BRFS are the order of the HPF & LPF..Order of
the
BPF& BRFs are increased by increasing order of HPF&LPF.
5. What is the gain roll off outside the pass band?
Ans: Gain roll off outside the pass band is (20n) db/dec where n
indicates the
order of the filter.
6. What is the difference between active and passive filters?

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Ans: Active filters use Op Amp as active element, and resistors and
capacitors as the
passive elements.
7. What are the advantages of active filters over passive filters?
Ans: Gain and frequency adjustment.
No loading problem.
Low cost
6. WEIN BRIDGE OSCILLATOR

Aim: Design a Wein-Bridge Oscillator to produce 100kHz, 9V output.
Apparatus Required:
S.n
Component
Specification
Quantity
IC
LM 565

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2
Resistors
3
4
5
6
Capacitor
Variable Resistor
Fixed power supply
Connecting wires
7
8
9
CRO
CRO Probes
Bread Board
1.5k,10k,2k
4.7k
0.047f,0.1f
10 k
15V
Single starned
0-30MHz
Crocodile Clips
1
2
1
1
1
As
required
1
3
1
Theory: An oscillator consists of an amplifier and a feedback network.

1) 'Active device' i.e. Op Amp is used as an amplifier.
2) Passive components such as R-C or L-C combinations are used as feed
back network
To start the oscillation with the constant amplitude, positive feedback is
not the only
sufficient condition. Oscillator circuit must satisfy the following two
conditions known
as Barkhausen conditions:
a. The first condition is that the magnitude of the loop gain (A) = 1
A = Amplifier gain and _ = Feedback gain.
b. The second condition is that the phase shift around the loop must
be 360 or 0.
The feedback signal does not produce any phase shift. This is
thebasic principle of a Wien bridge oscillator. The given circuit shows
the RC combination used in Wien bridge oscillator. circuit is also known as
lead-lag circuit. Here, resistor R1 and capacitor C1 are connected in the
series while resistor R2and capacitor C2
are connected in parallel. At
high frequencies, the reactance of capacitor C1 and C2 approaches zero.

This causes C1 and C2 appears short. Here, capacitor C2
shorts the
resistor R2. Hence, the output voltage Vo will be zero since output is
taken across R2 and C2 combination. So, at high high frequencies, circuit
acts as a 'lag circuit'. C1combination. Here, the circuit acts like a 'lead

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circuit'. But at one particular frequency between the two extremes, the
output voltage reaches to the maximum value. At this frequency only,
resistance value becomes equal to capacitive reactance and gives
maximum output. Hence, this particular frequency
is known as resonant
frequency or oscillating frequency. The maximum output
would be
produced if
R = Xc.= 1/(2_fC)
If R1 = R2 = R and C1 = C2 = C
Then the resonant frequency f = 1/(2_RC)
Due to limitations of the op-amp, frequencies above 1MHz are not
achievable.
The basic version of Wein bridge has four arms. The two arms are purely
resistive and other two arms are frequency sensitive arms. These two
arms are nothing but the lead-lag circuit. The series combination of R1
and C1 is connected between terminal a and d. The parallel combination
of R2 and C2 is connected between terminal d and c . So the two circuits
(Fig.1 and Fig.2) are same except in shape. Here, bridge does not provide
phase shift at oscillating frequency as one arm consists of lead circuit and
other arm consists of lag circuit. There is no need to introduce phase shift
by the operational amplifier. Therefore, non inverting amplifier is used.
Circuit diagram:

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Design:
Gain required for sustained oscillation is Av = 1/b = 3
(PASS BAND GAIN) (i.e.) 1+Rf/R1 = 3
Rf = 2R1
Frequency of Oscillation fo = 1/2p R C
Given fo = 1 KHz
Let C = 0.05 F
R = 1/2 foC
R = 3.2 KW
Let R1 = 10 K \ Rf = 2 * 10 K

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Procedure:
1. Connect the components as shown in the circuit
2. Switch on the power supply and CRO.
3. Note down the output voltage at CRO.
4. Plot the output waveform on the graph.
5. Redesign the circuit to generate the sine wave of frequency 2KHz.
6. Compare the output with the theoretical value of oscillation.
Observation:
Peak to peak amplitude of the output = __________Volts.
Frequency of oscillation = __________Hz.
Result:
Thus wein bridge oscillator was designed using op-amp and tested.
1. State the two conditions for oscillations.
2. Classify the Oscillators?
3. Define an oscillator?
4. What is the frequency range generated by Wein Bridge Oscillator?

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5. What is frequency stability?
7. FUNCTION GENERATOR USING OPAMPS

Aim: To generate square wave and triangular wave form by using
OPAMPs.
Apparatus required:
S.N
Equipment/Component
Quantity
o
1
2
3
name
741 IC
Capacitors
Resistors
Refer page no 2
0.01f,0.001f
86k ,68k ,680k
2
Each one
Each one
4
5
Resistors
Cathode Ray
100k
(0 30V),1A
(0 -20MHz)
2
1
1
Oscilloscope
Theory:
Function
generator
generates
waveforms
such
as
sine,
triangular, square waves and so on of different frequencies and

amplitudes. The circuit shown in Fig1 is a simple circuit which generates

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square waves and triangular waves simultaneously. Here the first section
is a square wave generator and second section is an integrator.
When
square wave is given as input to integrator it produces triangular wave.

Circuit Diagram:
Fig1: Function generator

OR
Function generator

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Design:
Square wave Generator:
T= 2RfC ln (2R2 +R1/ R1)
Assume R1 = 1.16 R2
Then T= 2RfC
Assume C and find Rf
Assume R1 and find R2
Integrator:
Take R3 Cf >> T
R3 Cf = 10T
Assume Cf find R3
Take R3Cf = 10T
Assume Cf = 0.01f
R3 = 10T/C
= 20K
Procedure:
1. Connect the circuit as per the circuit diagram shown above.
2. Obtain square wave at A and Triangular wave at Vo2 as shown in Fig 1.
3. Draw the output waveforms as shown in Fig 2(a) and (b).
Model Calculations:
For T= 2 m sec
T = 2 Rf C
Assuming C= 0.1f
Rf = 2.10-3/ 2.01.10-6
= 10 K
Assuming R1 = 100 K
R2 = 86 K
Sample readings:
Square Wave:
Vp-p = 26 V(p-p)

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T = 1.8 msec
Triangular Wave:
Vp-p = 1.3 V
T= 1.8 msec
Wave Forms:
Fig 2 (a): Output at A

(b): Output at V02
Precautions:
.
Result: Square wave and triangular wave are generated and the output
waveforms are observed.
Inferences: Various waveforms can be generated.
1. How do you change the frequency of square wave?
Ans: By changing resistor and capacitor values

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2. What are the applications of function generator?
Ans: Function generators are used for Transducer linearization and
sine shaping.
8. IC 555 TIMER - ASTABLE OPERATION CIRCUIT

Aim: To generate unsymmetrical square and symmetrical square
waveforms using
IC555.
Apparatus required:
S.No
1
2
Equipment/Component
Specifications/Valu
Quantit
name
IC 555
Resistors
e
Refer page no 6
5.6k,2.2k
y
1
Each
one

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55

3
4
5
Capacitors
Cathode Ray
0.1f,0.01f
Each
(0 30V),1A
(0 20MHz)
one
1
1
Oscilloscope
Theory:
When the power supply VCC is connected, the external timing
capacitor C charges towards VCC with a time constant (RA+RB) C. During
this time, pin 3 is high (V CC) as Reset R=0, Set S=1 and this combination
makes
=0 which has unclamped the timing capacitor C.
When the capacitor voltage equals 2/3 VCC, the upper comparator
triggers the control flip flop on that
=1. It makes Q1 ON and capacitor
C starts discharging towards ground through R B and transistor Q1 with a

time constant RBC. Current also flows into Q1 through RA. Resistors RA
and RB must be large enough to limit this current and prevent damage to
the discharge transistor Q1. The minimum value of R A is approximately
equal to VCC/0.2 where 0.2A is the maximum current through the ON
transistor Q1.
During the discharge of the timing capacitor C, as it reaches V CC/3,
the lower comparator is triggered and at this stage S=1, R=0 which turns
Q
=0.
Now
=0 unclamps the external timing capacitor C.
The
capacitor C is thus periodically charged and discharged between 2/3 V CC

and 1/3 VCC respectively. The length of time that the output remains HIGH
is the time for the capacitor to charge from 1/3 VCC to 2/3 VCC.
The capacitor voltage for a low pass RC circuit subjected to a step
input of VCC volts is given by VC = VCC [1- exp (-t/RC)]
Total time period T = 0.69 (RA + 2 RB) C
f= 1/T = 1.44/ (RA + 2RB) C
Circuit Diagram:

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Fig.1 555 Astable Circuit

Design:
Formulae: f= 1/T = 1.44/ (RA+2RB) C
Duty cycle (D) = tc/T = RA + RB/(RA+2RB)
Procedure:
I) Unsymmetrical Square wave
1. Connect the circuit as per the circuit diagram .
2. Observe and note down the waveform at pin 6 and across timing
capacitor pin 3.
3. Measure the frequency of oscillations and duty cycle and then
compare with the given values.
4. Sketch both the waveforms to the same time scale.
Model calculations:
Given f=1 KHz. Assuming c=0.1F and D=0.25
1 KHz = 1.44/ (RA+2RB) x 0.1x10-6 and 0.25 =( RA+RB)/ (RA+2RB)
Solving both the above equations, we obtain RA & RB as
RA = 7.2K

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RB = 3.6K
Waveforms:
Fig 2 (a) Unsymmetrical square wave output

2 (b) Capacitor voltage of Unsymmetrical square wave output
Sample Readings:
Parameter
Voltage VPP
Unsymmetrical
5V
Symmetrical
5V
Time period T
Duty cycle
Precautions:
Check the connections before giving the power supply. Readings
should be taken carefully.

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Result: Both unsymmetrical and symmetrical square waveforms are
obtained and time period at the output is calculated.
Inferences:
Unsymmetrical square wave of required duty cycle and
symmetrical square waveform can be generated.

1. What is the effect of C on the output?
Ans: Time period of the output depends on C
2. How do you vary the duty cycle?
Ans: By varying R A or RB.
3. What are the applications of 555 in astable mode?
Ans: FSK Generator, Pulse Position Modulator, Square wave
generator
4. What is the function of diode in the circuit?
Ans: To get symmetrical square wave.
5. On what parameters Tc and Td designed?
Ans: R A , RB and C
6. What are charging and discharging times
Ans: The time during which the capacitor charges from (1/3) Vcc to
(2/3) Vccis equal to the time the output is high is known as charging
time
and is given by
Tc=0.69(RA+RB)C The time during which the
capacitor discharges from (2/3) Vcc to (1/3)
Vcc is equal to the time
the output is low is known as discharging time and is given by

Td=0.69(RB) C.

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9. IC 555 TIMER-MONOSTABLE OPERATION CIRCUIT
Aim: To generate a pulse using Monostable Multivibrator by using IC555

Apparatus required:
S.No
1
2
Equipment/Compon
ent name
555 IC
Capacitors
ue
Refer page no 6
0.1f,0.01f
1
Each
3
4
Resistor
Regulated Power
10k
(0 30V),1A
one
1
1
5
6
supply
Function Generator
Cathode ray
(1HZ 1MHz)
(0 20MHz)
1
1
oscilloscope
Theory: A Monostable Multivibrator, often called a one-shot Multivibrator,

is a pulse-generating circuit in which the duration of the pulse is
determined by the RC network connected externally to the 555 timer. In a
stable or stand by mode the output of the circuit is approximately Zero or
at logic-low level. When an external trigger pulse is obtained, the output
is forced to go high ( VCC). The time for which the output remains high is
determined by the external RC network connected to the timer. At the
end of the timing interval, the output automatically reverts back to its
logic-low stable state. The output stays low until the trigger pulse is again
applied.
Then the cycle repeats.
The Monostable circuit has only one

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stable state (output low), hence the name monostable.
Normally the
output of the Monostable Multivibrator is low.
Fig1: Monostable Circuit using IC555

Design:
Consider VCC = 5V, for given tp
Output pulse width tp = 1.1 RA C
Assume C in the order of microfarads & Find RA
Typical values:
If C=0.1 F , RA = 10k then tp = 1.1 mSec
Trigger Voltage =4 V
Procedure:
1. Connect the circuit as shown in the circuit diagram.
2. Apply Negative triggering pulses at pin 2 of frequency 1 KHz.
3. Observe the output waveform and measure the pulse duration.
4. Theoretically calculate the pulse duration as Thigh=1.1. RAC

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5. Compare it with experimental values.
Waveforms:
Fig 2 (a) Trigger signal
(b) Output Voltage
(c) Capacitor
Voltage
Sample Readings:
Trigger
Output wave
Capacitor output
Precautions:
Check
the connections before giving the power supply.

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Result: The input and output waveforms of 555 timer monostable
Multivibrator are observed as shown in Fig 2(a), (b), (c).
Inferences: Output pulse width depends only on external components R A
and C connected to IC555.
1. Is the triggering given is edge type or level type? If it is edge type,
trailing or raising edge?
Ans: Edge type and it is trailing edge
2. What is the effect of amplitude and frequency of trigger on the output?
Ans: Output varies proportionally.
3. How to achieve variation of output pulse width over fine and course
ranges?
Ans: One can achieve variation of output pulse width over fine and
course ranges
by varying capacitor and resistor values
respectively
4. What is the effect of Vcc on output?
Ans: The amplitude of the output signal is directly proportional to Vcc
5. What are the ideal charging and discharging time constants (in terms
of R and C) of capacitor voltage?
Ans: Charging time constant T=1.1RC Sec
Discharging time constant=0 Sec
6. What is the other name of monostable Multivibrator? Why?
Ans: i) Gating circuit .It generates rectangular waveform at a definite
time and thus could be used in gate parts of the system.

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ii) One shot circuit. The circuit will remain in the stable state until
a trigger pulse is received. The circuit then changes states for a
specified period, but then it returns to the original state.
7. What are the applications of monostable Multivibrator?
Ans: Missing Pulse Detector, Frequency Divider, PWM, Linear Ramp
Generator
10. IC 565 PLL APPLICATIONS

Aim: Design a Phase Locked Loop Application (Voltage Controlled
Oscillator) using IC
LM565.
Apparatus Required:
S.N
Component
Specification
Quantity
o
1
IC
LM 565
Resistors
1.5k, 10k, 2k
4.7k
Capacitor
0.047F, 0.1F
Variable Resistor
10k
Fixed Power Supply
15V
Connecting Wires
Single Strand
As
CRO
0-30MHz
Required
1
CRO Probes
Crocodile Clips

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9
Bread Board
Theory:
This oscillator uses a special IC chip, the LM565 that is designed to
function as a phase locked loop (PLL). The chip contains a VCO (which we
will utilize in this experiment) and a phase detector. A combination of an
input control voltage on pin 7 and the RC time constant formed by the
components on pins 8 and 9 set the VCO output frequency. The VCO
within the LM565 is not designed like a conventional oscillator. It is really a
current controlled oscillator. Remember that as the charging current in a
capacitor is increased, the rate of capacitor charging (as evidenced in its
voltage rise) also increases. The same is true for capacitor discharging as
well. The LM565 simply translates the control voltage on pin 7 into a
charging and discharging current for the timing capacitor, C1. So what is
the function of the resistors on pin 8? The resistors on pin 8 also help set
the charge and discharge current for the timing capacitor C1. In other
words, the output frequency of the LM565 VCO depends on three factors:
1) The control voltage on pin 7;
2) The total resistance on pin 8 (R3 and R4);
3) The capacitance on pin 9 (C1).
When a capacitor is charged by a constant current, its voltage rises
linearly (straightline). Thus, one of the output waveforms of the LM565 is
a triangle wave. The other output is a square wave -- the result of the
triangle wave going through a Schmitt trigger. Two different LM565 VCO
circuits will be examined in this experiment, and they are shown in Figures
1 and 2. In Figure 1, the control voltage of the VCO is held constant by
resistors R1 and R2, and the RC time-constant is varied by R3. (Note that
the total resistance Rt in Figure 1 is the series combination of R3 and R4).
In Figure 2, the timing resistance Rt is equal to R2, and is constant. A
potentiometer has been substituted in R1's place, allowing the control

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voltage to be varied over a range of approximately 7.5 V to 15 V. Note
that the control voltage should be adjusted to be in the range 11.25 V to
15 V in part two of this experiment
CIRCUIT DIAGRAM:
Observations:
Output Voltage(V)
S.N
o
R1
C1
Theoreical
Practica
Square
Triangular
Frequency(
Wave
Wave
Hz)
Frequen
cy

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Procedure:
1. Connections are made as per the circuit diagram.
2. Measure the output voltage and frequency of both triangular and
squares.
3. Vary the values of R1 and C1 and measure the frequency of the
waveforms.
4. Compare the measured values with the theoretical values.
Precautions:
1. Connect the wires properly.
2. Maintain proper Vcc levels.
Result:
The NE/SE 565 is operated as Voltage Controlled Oscillator also the
output
frequency for various values of R1 and C1 are observed.
1. What are the applications of VCO?
2. Draw the pin diagram of NE/SE 565.

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3. What is the need of connecting 0.0047F capacitor between pin
5 and pin
11. SCHMITT TRIGGER CIRCUITS- USING IC 741 & IC 555

Aim: To design the Schmitt trigger circuit using IC 741 and IC 555
Apparatus required:

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68

Equipment/Component
Specifications/Val Quantit
name
ue
1
2
3
IC 741
555IC
Cathode Ray
Refer page no 2
Refer page no 6
(0 20MHz)
1
1
1
4
5
Oscilloscope
Multimeter
Resistors
100K ,1K
1
2
Capacitors
10K
0.1 f, 0.01 f
1
Each
(0 -30V),1A
one
1
S.N
o
6
7
Regulated power
supply
Theory:
The circuit shows an inverting comparator with positive feed back.
This circuit converts orbitrary wave forms to a square wave or pulse. The
circuit is known as the Schmitt trigger (or) squaring circuit.
The input
voltage Vin changes the state of the output Vo every time it exceeds
certain voltage levels called the upper threshold voltage V ut and lower
threshold voltage Vlt.
When Vo= - Vsat, the voltage across R1 is referred to as lower
threshold voltage, Vlt. When Vo=+Vsat, the voltage across R1 is referred to
as upper threshold voltage Vut. The comparator with positive feed back is
said to exhibit hysterisis, a dead band condition.
Circuit Diagrams:

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69

Fig 1: Schmitt trigger circuit using IC 741
Fig 2: Schmitt trigger circuit using IC 555

Design:
Vutp = [R1/(R1+R2 )](+Vsat)
Vltp = [R1/(R1+R2 )](-Vsat)
Vhy = Vutp Vltp
=[R1/(R1+R2)] [+Vsat (-Vsat)]

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Procedure:
1. Connect the circuit as shown in Fig 1 and Fig2.
2. Apply an orbitrary waveform (sine/triangular) of peak voltage greater
than UTP to the input of a Schmitt trigger.
3. Observe the output at pin6 of the IC 741 and at pin3 of IC 555 Schmitt
trigger circuit by varying the input and note down the readings as
shown in Table 1 and Table 2
4. Find the upper and lower threshold voltages (Vutp, VLtp) from the output
wave form.
Wave forms:
Fig 3: (a) Schmitt trigger input wave form

(b) Schmitt trigger output wave
form
Sample readings:
Table 1:
Parameter
Input
741
Output
555
741

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71
555

Voltage( Vp-p)
Time
period(ms)
Table 2:
Parameter
Vutp
741
555
Vltp
Precautions:
Results:
UTP and LTP of the Schmitt trigger are obtained by using IC 741 and IC
555 as shown in Table 2.
Inferences:
Schmitt trigger produces square waveform from a given
signal.
1. What is the other name for Schmitt trigger circuit?
Ans: Regenerative comparator
2. In Schmitt trigger which type of feed back is used?
Ans: Positive feedback.
3. What is meant by hysteresis?
Ans: The comparator with positive feedback is said to be exhibit
hysteresis, a deadband condition. When the input of the comparator is
exceeds Vutp, its output switches from + Vsat to - Vsat and reverts back to
its original state,+
Vsat ,when the input goes below Vltp

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4. What are effects of input signal amplitude and frequency on output?
Ans: The input voltage triggers the output every time it exceeds certain
voltage levels (UTP and LTP). Output signal frequency is same as input
signal frequency.
12. IC 566 VCO APPLICATIONS

Aim:
i) To observe the applications of VCO-IC 566.

ii)
To generate the frequency modulated wave by using IC

566.
Apparatus required:
S.No
Equipment/Component
1
2
Name
IC 566
Resistors
ue
Refer page no 10
10K
1
2
Capacitors
1.5K
0.1 F
1
1
4
5
Regulated power supply

Cathode Ray
100 pF
0-30 V, 1 A
0-20 MHz
1
1
1
Oscilloscope
Function Generator
0.1-1 MHz
Theory: The VCO is a free running Multivibrator and operates at a set

frequency fo called free running frequency. This frequency is determined
by an external timing capacitor and an external resistor. It can also be
shifted to either side by applying a d.c control voltage v c to an appropriate
terminal of the IC. The frequency deviation is directly proportional to the

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dc control voltage and hence it is called a voltage controlled oscillator
or, in short, VCO.
The output frequency of the VCO can be changed either by R 1, C1
or the voltage VC at the modulating input terminal (pin 5). The voltage V C
can be varied by connecting a R 1R2 circuit. The components R 1 and C1 are
first selected so that VCO output frequency lies in the centre of the
operating frequency range. Now the modulating input voltage is usually
varied from 0.75 VCC which can produce a frequency variation of about 10
to 1.
Circuit Diagram:
Fig1: Voltage Controlled Oscillator

Design:
1.
Maximum deviation time period =T.
2.
fmin = 1/T.

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where fmin can be obtained from the FM wave
3.
Maximum deviation, f= fo - fmin
4.
Modulation index = f/fm
5.
Band width BW = 2(+1) fm = 2 (f+fm)
6.
Free running frequency,fo = 2(VCC -Vc) / R1C1VCC
Procedure:
1. The circuit is connected as per the circuit diagram shown in Fig1.
2. Observe the modulating signal on CRO and measure the amplitude
and frequency of the signal.
3. Without giving modulating signal, take output at pin 4, we get the
carrier wave.
4. Measure the maximum frequency deviation of each step and
evaluate the modulating Index.
mf = = f/fm
Waveforms:

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75

Fig 2 (a) Input wave of VCO

(b) Output of VCO at pin3
(c) Output of VCO at pin4
Sample readings:
VCC=+12V; R1=R3=10K; R2=1.5K; fm=1KHz
Free running frequency, fo = 26.1KHz
fmin = 8.33KHz
f= 17.77 KHz
= f/fm = 17.77
Band width BW 36 KHz

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Precautions:
Result:
Frequency modulated waveforms are observed and modulation
Index, B.W required for FM is calculated for different amplitudes of the
message signal.
Inferences:
During positive half-cycle of the sine wave input, the control voltage
will increase, the frequency of the output waveform will decrease and time
period will increase. Exactly opposite action will take place during the
negative half-cycle of the input as shown in Fig (b).
1. What are the applications of VCO?
Ans: VCO is used in FM, FSK, and tone generators, where the
frequency needs to
be controlled by means of an input voltage called control voltage.
2. What is the effect of C1 on the output?
Ans: The frequency of the output decreases for an increase in C1.

Visakhapatnam
77

13. VOLTAGE REGULATOR USING IC723

Aim: To design a low voltage variable regulator of 2 to 7V using IC 723.
Apparatus required:
S.No
Equipment/Component
name
IC 723
ue
Refer appendix A
Resistors
3.3K,8.2K,
Capacitor
Multimeter
Ammeter
Voltmeter
1K, 2K
100f
0 -30 V,1A
3 digit display
(0-20 mA)
(0-20 V)
1
1
1
1
1
1
3
4
5
6
7
Theory:
A voltage regulator is a circuit that supplies a constant voltage

regardless of changes in load current and input voltage variations. Using
IC 723, we can design both low voltage and high voltage regulators with
adjustable voltages.
For a low voltage regulator, the output VO can be varied in the range
of voltages Vo < Vref, where as for high voltage regulator, it is V O > Vref.
The voltage Vref is generally about 7.5V. Although voltage regulators can
be designed using Op-amps, it is quicker and easier to use IC voltage
Regulators.
IC 723 is a general purpose regulator and is a 14-pin IC with internal
short circuit current limiting, thermal shutdown, current/voltage boosting
etc. Furthermore it is an adjustable voltage regulator which can be varied

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over both positive and negative voltage ranges. By simply varying the
connections made externally, we can operate the IC in the required mode
of operation.
Typical performance parameters are line and load
regulations which determine the precise characteristics of a regulator. The

pin configuration and specifications are shown in the Appendix-A.
Circuit Diagram:
Fig1: Voltage Regulator

Design of Low voltage Regulator :Assume Io= 1mA,VR=7.5V
RB = 3.3 K
For given Vo
R1 = ( VR VO ) / Io
R2 = VO / Io

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Procedure:
a) Line Regulation:
1. Connect the circuit as shown in Fig 1.
2. Obtain R1 and R2 for Vo=5V
3. By varying Vn from 2 to 10V, measure the output voltage Vo.
4. Draw the graph between Vn and Vo as shown in model graph (a)
5. Repeat the above steps for Vo=3V
b) Load Regulation: For Vo=5V
1.
Set Vi such that VO= 5 V
2.
By varying RL, measure IL and Vo
3.
Plot the graph between IL and Vo as shown in model graph (b)
4. Repeat above steps 1 to 3 for VO=3V.

Sample Readings:
a) Line Regulation:
Vi(V)
Vo(V)
2
6
8
10
12
14
16
20
22
b) Load
Regulation: VNL =
15 V

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80

Regulated
Load Current
Load
O/p (V)
(mA)
Resistance
VFL
%
Regulation
RL()
1K
2.2K
3.3K
5.6K
Model graphs:
a) Line Regulation:
b)
Load Regulation:
Precautions:
Results:
Low voltage variable Regulator of 2V to 7V using IC 723 is designed. Load
and Line Regulation characteristics are plotted.
Inferences:
Variable voltage regulators can be designed by using IC 723.

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81

1. What is the effect of R1 on the output voltage?
Ans: R1 decreases for an increase in the output voltage.
2. What are the applications of voltage regulators?
Ans: Voltage regulators are used as control circuits in PWM, series
type switch mode supplies, regulated power supplies, voltage
stabilizers.
3. What is the effect of Vi on output?
Ans: Output varies linearly with input voltage up to some value (o/p
voltage+
dropout voltage) and remains constant.
14. THREE TERMINAL VOLTAGE REGULATORS- 7805,

7812, 7912
Aim: To obtain the regulation characteristics of three terminal voltage
regulators.
Apparatus required:
S.N
Equipment/Compone
Specifications/Val
o
1
2
3
4
5
6
7
nt Name
Bread board
IC7805
IC7809
IC7912
Multimeter
Milli ammeter
Regulated
ues
8
9
supply
Connecting wires
Resistors pot
Refer appendix A
Refer appendix A
Refer appendix A
3 digit display
0-150 mA
power 0-30 V
100 ,1k
Quantity
1
1
1
1
1
1
1
Each one
Theory:

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82

A voltage regulator is a circuit that supplies a constant voltage
regardless of changes in load current and input voltage. IC voltage
regulators are versatile, relatively inexpensive and are available with
features such as programmable output, current/voltage boosting, internal
short circuit current limiting, thermal shunt down and floating operation
for high voltage applications.
The
78XX
series
consists
of
three-terminal
positive
voltage
regulators with seven voltage options. These ICs are designed as fixed
voltage regulators and with adequate heat sinking can deliver output
currents in excess of 1A.
The 79XX series of fixed output voltage regulators are complements
to the 78XX series devices.
These negative regulators are available in
same seven voltage options.

Typical performance parameters for voltage regulators are line
regulation, load regulation, temperature stability and ripple rejection. The
pin configurations and typical parameters at 25 0C are shown in the
Appendix-B.
Circuit Diagrams:
Fig 1: Positive Voltage Regulator

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83

Fig 2: Negative Voltage Regulator
Procedure:
a) Line Regulation:
1. Connect the circuit as shown in Fig 1 by keeping S open for 7805.
2. Vary the dc input voltage from 0 to 10V in suitable stages and note
down the output voltage in each case as shown in Table1 and plot
the graph between input voltage and output voltage.
3. Repeat the above steps for negative voltage regulator as shown in
Fig.2 for 7912 for an input of 0 to -15V.
4. Note down the dropout voltage whose typical value = 2V and line
regulation typical value = 4mv for Vin =7V to 25V.
b) Load regulation:
1. Connect the circuit as shown in the Fig 1 by keeping S closed for
load regulation.

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2. Now vary R1 and measure current IL and note down the output
voltage Vo in each case as shown in Table 2 and plot the graph
between current IL and Vo.
3. Repeat the above steps as shown in Fig 2 by keeping switch S closed
for
negative voltage regulator 7912.
c) Output Resistance:
Ro= (VNL VFL)
IFL
VNL - load voltage with no load current
VFL - load voltage with full load current
IFL -
full load current.
Sample readings:
1) IC 7805
Vi(V)
Vo(V)
a)
Line Regulation
2
4
6
8
10
Raghu engineering12
college, Dakamarri ,
Visakhapatnam
85
14
16
18

b) Load Regulation
Load Current
Load
(mA)
Resistance
VNL = 15 V
Vdc(FL) (V)
% Regulation
RL()
1K
2.2K
3.3K
2) IC 7912
a)
Vi(V)
Line Regulation
Vo(V)
-2
-4
-6
-8
-10
Raghu engineering
-12 college, Dakamarri ,
Visakhapatnam -13
86
-14
-15

c) Load Regulation
Load Current
Load
(mA)
Resistance
VNL = 13 V
Vdc(FL) (V)
% Regulation
RL()
1K
2.2K
3.3K
Graphs:
IC 7805
IC 7812

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87

IC7912
% load regulation = VNL - VFL x 100

VFL
Precautions:
Result:
Line and load regulation characteristics of 7805, 7809 and 7912 are
plotted

Visakhapatnam
88

Inferences:
Line and load regulation characteristics of fixed positive and
negative three terminal voltages are obtained. These voltage regulators
are used in regulated power supplies.
1. Mention the IC number for a negative fixed three terminal voltage
regulator of 12V.
Ans: IC 7912
2. Explain the significance of IC regulators in power supply
Ans: To get constant dc voltages.
3. What is drop-out voltage?
Ans: The difference between input and output voltages is called
dropout
voltage
4. What is the role of C1 and C2?

Ans: C1 is used to cancel the inductive effects.
C2 is used to improve the transient response of regulator.
4. What are C1 and C2 called?
Ans: Bypass capacitors

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15. 4-BIT DAC USING OP-AMP

Aim: To design 1) weighted resistor DAC
2) R-2R ladder Network DAC
Apparatus required:
S.No
Equipment/Compone
1
2
nt name
741 IC
Resistors
ue
Refer page no 2
1K,2K,4K,
1
Each one
Regulated Power
8K
0-30 V , 1A
4
5
6
supply
Multimeter(DMM)
connecting wires
Digital trainer Board
digit display
1
1
Theory: Digital systems are used in ever more applications, because of

their increasingly efficient, reliable, and economical operation with the
development of the microprocessor, data processing has become an
integral part of various systems Data processing involves transfer of data
to and from the micro computer via input/output devices. Since digital
systems such as micro computers use a binary system of ones and zeros,
the data to be put into the micro computer must be converted from
analog to digital form. On the other hand, a digital-to-analog converter is
used when a binary output from a digital system must be converted to
some equivalent analog voltage or current. The function of DAC is exactly
opposite to that of an ADC.

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A DAC in its simplest form uses an op-amp and either binary
weighted resistors or R-2R ladder resistors. In binary-weighted resistor opamp is connected in the inverting mode, it can also be connected in the
non inverting mode.
Since the number of inputs used is four, the
converter is called a 4-bit binary digital converter.

Circuit Diagrams:
Fig 1: Binary weighted resistor DAC
Fig 2: R 2R Ladder DAC

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Design:
1. Weighted Resistor DAC
Vo = -Rf A B c D
R
8R 4 R 2 R
b
For input 1111, Rf = R = 4.7K

1
Vo = - 1
8 4 2
Rf
x5
Vo = - 9.375 V
2.R-2R Ladder Network:
Vo = -Rf A B c D X 5
16 R 8 R 4 R 2 R
b
For input 1111, Rf = R= 1K

Procedure:
1. Connect the circuit as shown in Fig 1.
2. Vary the inputs A, B, C, D from the digital trainer board and note down
the output at pin 6. For logic 1, 5 V is applied and for logic 0, 0 V is
applied.
3. Repeat the above two steps for R 2R ladder DAC shown in Fig 2.
Observations:
Weighted resistor DAC
S.No
1
2
3
4
5
6
7
8
9
10
11
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
Theoretical
Practical
Voltage(V)
Voltage(V)

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12
13
14
15
16
1
1
1
1
1
0
1
1
1
1
1
0
0
1
1
1
0
1
0
1
R-2R Ladder Network:

S.N
o
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
D
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Model Graph:
C
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
B
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Theoretical
Practical
Voltage(V)
Voltage(V)
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Decimal Equivalent of Binary
inputs

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Precautions:
Results:
Outputs of binary weighted resistor DAC and R-2R ladder DAC are
observed.
Inferences:
Different types of digital-to-analog converters are designed.
1. How do you obtain a positive staircase waveform?
Ans: By giving negative reference voltage.
2. What are the drawbacks of binary weighted resistor DAC?
Ans: Wide range of resistors is required in binary weighted resistor
DAC.
3. What is the effect of number of bits on output ?

Visakhapatnam
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Ans: Accuracy degenerates as the number of binary inputs is
increased beyond four.

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95

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Department of Electronics & Communication

Engineering IC Applications lab

Raghu engineering college, Dakamarri ,

Department of Electronics & Communication

Minimum Twelve Experiments to be conducted :

Raghu engineering college, Dakamarri ,

Department of Electronics & Communication

NAME OF THE EXPERIMENT

Study of OP AMPs IC 741, IC 555, IC 565, IC 566, IC

OP AMP Applications Adder, Subtractor, Comparator

Active Filter Applications LPF, HPF (first order)

Active Filter Applications BPF, Band Reject

(Wideband) and Notch Filters

Schmitt Trigger Circuits using IC 741 and IC 555

Raghu engineering college, Dakamarri ,

Department of Electronics & Communication

Raghu engineering college, Dakamarri ,

Department of Electronics & Communication

1. STUDY OF OP AMPS - IC 741, IC 555, IC 565, IC 566, IC

High common mode

Raghu engineering college, Dakamarri ,

Department of Electronics & Communication

Raghu engineering college, Dakamarri ,

Department of Electronics & Communication

Input bias current : 500nA

Input capacitance : typical value 1.4pF

Offset voltage adjustment range : 15mV

Input voltage range : 13V

Supply voltage rejection ratio : 150 V/V

Output voltage swing: + 13V and 13V for RL > 2K

Output short-circuit current: 25mA

supply current: 28mA

Power consumption: 85mW

Transient response: rise time= 0.3 s

The three equal resistors R1, R2, R3 serve as internal voltage

Raghu engineering college, Dakamarri ,

Department of Electronics & Communication

to change its states.

Thus the output of the flip flop is

controlled by the voltages of the two comparators.

The discharge transistor

becomes conductive and behaves as a low resistance short circuit to

The output stage behaves similarly.

When the flip-flop output

Block Diagram of IC 555:

Raghu engineering college, Dakamarri ,

Department of Electronics & Communication

Function of Various Pins of 555 IC:

If the voltage at this terminal is

held greater than one-third of VCC, the output remains low.

Raghu engineering college, Dakamarri ,

Department of Electronics & Communication

There are 2 possible output

When unused it is connected to +V cc.

The reset terminal enables the timer

over-ride command signals at Pin (2) of the IC.

This capacitor bypasses

Features of 555 IC:

Raghu engineering college, Dakamarri ,

Department of Electronics & Communication

Trigger and reset inputs are logic compatible.

50 PPM/oC change in temp or 0-

Raghu engineering college, Dakamarri ,