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GFK-2996

RXi Box IPC-XR


Hardware Reference Manual
June 2016

For public disclosure

These instructions do not purport to cover all details or variations in equipment, nor to provide for every possible
contingency to be met during installation, operation, and maintenance. The information is supplied for informational
purposes only, and GE makes no warranty as to the accuracy of the information included herein. Changes, modifications,
and/or improvements to equipment and specifications are made periodically and these changes may or may not be reflected
herein. It is understood that GE may make changes, modifications, or improvements to the equipment referenced herein or to
the document itself at any time. This document is intended for trained personnel familiar with the GE products referenced
herein.
This document is approved for public disclosure.
GE may have patents or pending patent applications covering subject matter in this document. The furnishing of this
document does not provide any license whatsoever to any of these patents.
GE provides the following document and the information included therein as is and without warranty of any kind, expressed
or implied, including but not limited to any implied statutory warranty of merchantability or fitness for particular purpose.
For further assistance or technical information, contact the nearest GE Sales or Service Office, or an authorized GE Sales
Representative.
Revised: June 2016
Issued: June 2016
Copyright 2016 General Electric Company, All rights reserved.
___________________________________
* Indicates a trademark of General Electric Company and/or its subsidiaries.
All other trademarks are the property of their respective owners.
Refer to the section, Contact Information for support on this product.

For public disclosure

Acronyms and Abbreviations


COM

Computer-on-module

EMC

Electromagnetic Capability

EMI

Electromagnetic Interference

ESD

Electrostatic Discharge

FPGA

Field Programmable Gate Array

DDC

Display Data Control

DP

Display Port

GND

System Ground potential

I2C

Inter Integrated Circuit

LAN
LED
NC
NVRAM

Local Area Network


Light Emitting Diode

PCI

Peripheral Component Interface

PCIe
SATA
SSD
USB

Peripheral Component Interface Express

VGA

Not Connected
Non-volatile Memory

Serial ATA
Solid State Drive
Universal Serial Bus
Video Graphics Adapter

Document Content Style Legend


The following content styles are used to emphasize information or provide important useful information to the user:
Style

Description

Italics, hyperlink, Document Title

Emphasize words in text, reference document titles, chapter and section titles,
figure captions, or tables, and provide web address hyperlinks

Decimal or Hexadecimal

Identify numbers

C-notation

Identifies hexadecimal numbers (0x prefix)

# (hash) suffix to a signal name

Text in Arial font


Note or Tip

Indicates an active low signal. The signal is either true when it is at logic zero
level (voltage close to 0 V) or the signal initiates actions on a high-to-low
transition.
Indicates a command entry or output from a GE embedded PC product using
the built-in character set
Calls attention to essential or useful information

GFK-2996 Hardware Reference Manual 3


For public disclosure

Safety Symbol Legend


Indicates a procedure, condition, or statement that, if not strictly observed, could result in
personal injury or death.

Warning

Indicates a procedure, condition, or statement that, if not strictly observed, could result in
damage to or destruction of equipment.

Caution

Indicates a procedure, condition, or statement that should be strictly followed to improve


these applications.

Attention
Note Indicates information that is especially significant to understanding or to understand common issues.

For public disclosure

Contact Information
If you purchased this product through an Authorized Channel Partner, then contact the seller directly.

General Contact Information


Online technical support and GlobalCare

http://support.ge-ip.com

Additional information

http://www.ge-ip.com/

Solution Provider

solutionprovider.ip@ge.com

Technical Support
If you have technical problems that cannot be resolved with the information in this manual, contact us by telephone, email, or at http://support.
ge-ip.com

Americas
Online Technical Support

http://support.ge-ip.com

Phone

1-800-433-2682

International Americas Direct Dial

1-780-420-2010 (if toll free 800 option is unavailable)

Technical Support Email

support.ip@ge.com

Customer Care Email

customercare.ip@ge.com

Primary language of support

English

Europe (not Germany), the Middle East, and Africa


Online Technical Support

http://support.ge-ip.com

Phone

+ 800-1-433-2682
+ 420-23-901-5850 (if toll free 800 option is unavailable or dialing from a mobile

EMEA Direct Dial

telephone)

Technical Support Email

support.emea.ip@ge.com

Customer Care Email

customercare.emea.ip@ge.com

Primary languages of support

English, French, Italian, Czech, Spanish

Germany
Online Technical Support

http://support.ge-ip.com
GE GmbH
Memminger Str. 14

Address

86159 Augsburg
Germany

Phone

+ 49-82150340
+ 8003223616

Fax

+ 498215034119

Technical Support Email

sales.augsburg.ip@ge.com

Online Technical Support

http://support.ge-ip.com

Asia Pacific
+ 86-400-820-8208
Phone

+ 86-21-3217-4826 (India, Indonesia, and Pakistan)


support.cn.ip@ge.com (China)

Technical Support Email

support.jp.ip@ge.com (Japan)
support.in.ip@ge.com (remaining Asia customers)
customercare.apo.ip@ge.com

Customer Care Email

customercare.cn.ip@ge.com (China)

GFK-2996 Hardware Reference Manual 5


For public disclosure

Compliance and Regulation


Regulatory Compliance
Products sold or transferred between companies or operated on company premises (factory floor, laboratory) do not need CE,
FCC or equivalent certification. Boards or subsystems which cannot provide a useful function on their own do not need
certification.
Certification can only be granted to complete and operational systems. There are authorized testing agencies, regulatory
organizations and laboratories who will issue certificates of compliance after system testing.
GE designs and tests all their products for EMI/EMC conformance. Where GE supplies a complete/functional system for use
by end users a certificate will be cited in the manuals/documents which are provided with the products.
Products manufactured by GE are normally be suitable for use in properly designed and produced customer equipment
(system boxes or operational systems) without any major redesign or additional filtering. However, the systems might not
conform to specific regulations once assembled and used. The system integrator or installer must test for compliance as
required in his country or by the intended application and certify this to the end user.

CE Conformance Declaration
CE certification is required in EU countries for equipment which is used or operated by the end user. Products sold or
transferred between companies or operated on company premises (factory floor, laboratory) do not need CE certification.
CE certification can only be granted to complete and operational systems. Boards or subsystems which cannot provide a
useful function on their own do not need CE certification.
GE designs and tests all their products for EMI/EMC conformance. The system integrator or installer must, in any case, test
for CE compliance and certify this to the end user.
Where GE supplies a complete/functional system for use by end users in EU countries a CE certificate will be cited in the
manuals/documents which are provided with the products. The CE (and year of certification) symbol is shown on the
equipment, typically on the type or S/N label or close to the power cable entry.
GE has tested their boards using their own card cages (chassis). Test results of these tests are available upon request.

ESD and EMI


Electrostatic Discharge (ESD) and Electromagnetic Interference (EMI) issues may occur in complete and operational systems.
There are many ways to avoid problems with these issues.
Any operational system with cables for I/O signals, connectivity or peripheral devices provides an entry point for ESD and
EMI. If GE does not manufacture the complete system, including enclosure and cables, it is the responsibility of the system
integrator and end user to protect their system against potential problems. Filtering, optical isolation, ESD gaskets and other
measures might be required at the physical point of entry (enclosure wall of box or rack). For example it is state-of-the-art
that protection cannot be done at the internal connector of an RTM if a cable is attached and routed outside the enclosure. It
has to be done at the physical entry point as specified in this document.

GFK-2996

For public disclosure

RXi Box IPC-XR

Waste Disposal
The mark or symbol on any electrical or electronic product shows that this product may not be disposed off in a trash bin.
Such goods have to be returned to the original vendor or to a properly authorized collection point.

Waste Disposal Symbol

The black bar underneath the waste bin symbol shows that the product was placed on the market after 13 August 2005.
Alternatively, the date the product is placed on the market is shown in place of the bar symbol.

Warranty
The manufacturer grants the original purchaser of GE products a warranty of 24 months from the date of delivery. For details
regarding this warranty refer to Terms and Conditions of the initial sale. For detailed warranty information, visit our GE
Customer Care Support website at http://www.geautomation.com/warranty.

GFK-2996 Hardware Reference Manual 7


For public disclosure

Notes

GFK-2996

For public disclosure

RXi Box IPC-XR

Contents
1 Overview ........................................................................................................................................... 11
2 Mounting and Installation............................................................................................................. 13
2.1 Safety Instructions ................................................................................................................................. 13
2.2 Mounting and Installation........................................................................................................................ 15

3 Hardware........................................................................................................................................... 17
3.1 PCIe.................................................................................................................................................... 17
3.2 Ethernet Interface (LAN1 and LAN2)........................................................................................................ 17

4 Hardware Configuration ............................................................................................................... 19


4.1 Connectors and Operators Overview.......................................................................................................... 19
4.2 Power In .............................................................................................................................................. 21
4.3 VGA Connector .................................................................................................................................... 22
4.4 Ethernet Interface (LAN1 and LAN2)........................................................................................................ 22
4.5 USB 2.0 Host Interface (USB1 and USB2) ................................................................................................. 23
4.6 CAN ................................................................................................................................................... 23
4.7 RS485................................................................................................................................................ 24
4.8 RS232................................................................................................................................................ 24
4.9 Digital I/O............................................................................................................................................ 25
4.10 Additional Information ........................................................................................................................... 26
4.10.1 Right Angle Cable........................................................................................................................... 26
4.10.2 M12 Y Adapters.............................................................................................................................. 27

5 Maintenance..................................................................................................................................... 29
5.1 Top Cover Removal and Handling ............................................................................................................ 29
5.2 Battery Replacement .............................................................................................................................. 32
5.3 mSATA Replacement ............................................................................................................................. 33

6 FPGA Expansion Subsystem ...................................................................................................... 35


6.1 Control Registers ................................................................................................................................... 36
6.1.1

Feature Detection ............................................................................................................................ 36

6.1.2
6.1.3

Interrupt Programming..................................................................................................................... 37
Function Reset................................................................................................................................ 38

6.1.4 Internal I2C bus .............................................................................................................................. 38


6.2 CAN Interface....................................................................................................................................... 39
6.2.1

CAN Address Space ........................................................................................................................ 39

6.2.2 CAN Termination and LEDs ............................................................................................................ 39


6.3 Serial Port Interface ............................................................................................................................... 40
6.4 NVRAM .............................................................................................................................................. 40
6.5 Digital I/O............................................................................................................................................ 41
6.6 FPGA Reprogramming ........................................................................................................................... 42

7 System Control ............................................................................................................................... 43


7.1 I2C Address .......................................................................................................................................... 46
7.2 I2C Registers......................................................................................................................................... 46
7.3 Command Codes ................................................................................................................................... 51

8 Specifications.................................................................................................................................. 53
8.1 Technical Data ...................................................................................................................................... 53

GFK-2996 Hardware Reference Manual 9


For public disclosure

8.2 Enclosure Dimensions ............................................................................................................................ 55

Index......................................................................................................................................................... 57

10

GFK-2996

For public disclosure

RXi Box IPC-XR

Overview
This document describes the RXi Box Rugged Embedded Industrial PC IPC-XR ,
including hardware and software features, mounting and installation, configuration, safety
instructions, maintenance procedures, specifications, and specific feature details.
The product described in this documentation may be operated only by personnel qualified
for the specific task in accordance with the relevant documentation for the specific task,
in particular its warning notices and safety instructions. Qualified personnel are those
who, based on their training and experience, are capable of identifying risks and avoiding
potential hazards when working with these products.
Features

COM Express Processing Core:

Intel Core i7-3517UE


Intel Celeron 1047UE
DDR3 memory as defined by COM Express module
Internal mSATA socket for SATA based SSD modules
2 x 10/100/1000 Mbit/s Ethernet on M12 connector
2 x USB interface on M8 connector
128 kB of nvSRAM (which does not require battery backup)
Battery backed up Real Time Clock (RTC)
COM express internal watchdog function
Power supply/temperature monitoring
VGA display connector D-SUB
Two 5pin M12 connectors for serial ports, can be customized as:

CAN (isolated)
RS232 / RS485 (isolated)
Four digital input/output (I/O) on M12 connector (isolated, externally powered)
System power supply 934 V dc on M12 connector
Power LED
Optional 2 x 16 character display and user defined buttons

Supported Software and Operating Systems

Windows 7
Windows 7 embedded
Linux

Note Contact GE for more information about available software packages.

Overview
For public disclosure

GFK-2996 Hardware Reference Manual 11

Carrier Board
Power supply input refers to
internal

 
   
SUS_Sx / PWR_Btn / PWR_OK
IC

Input
dc/dc
(nonisolated)

Connector Board
9 to 34 V dc Power
(Dual-In)
Remote Control

Power
Mgmt

M12 Plug
T-coded
(Optional )
Power Button
Power LED

IC

Temp.
Sensor

GBE
PCIe

M12
Socket
X-coded
GBE -Transf.

2x 10/100/1000 BaseT

Intel
i210IT

GBE -Transf.

SATA

mSATA

COMExpress Module
Type 6

VGA
USB 2.0

M8
Socket

USB 2.0

M8
Socket
M12
Socket

Spartan6
LX25T

Isoltaor

Power
Switch
OLED Display
2x16
(Optional)

PCIe-Load Bus
Bridge

UART
UART
RS-485
Transceiver

NvSRAM

Isolator
DC/DC

CAN2/COM2

RS-232
Transceiver
CAN
Tranceiver

M12 Socket
A/B coded

1xPCIe
SJA1000

SJA1000

RS-485
 

Isolator
DC/DC

CAN1/COM1

RS-232
Transceiver
CAN
Tranceiver

M12 Socket
A/B coded

Factory
Option

RXi Box IPC-XR Block Diagram

12

GFK-2996

For public disclosure

RXi Box IPC-XR

Mounting and Installation


This chapter provides safety instructions and provides the procedures for mounting and
installing the RXi-XP product.

2.1 Safety Instructions


Installation and Maintenance
The power supply of the product operates with
hazardous voltages: 9 34 V dc SELV power supply.

Warning

Do not connect this product to an improper power


supply. (No AC power, no more than 34 V DC or no
non-SELV circuit)!

Warning

The I/O interfaces (connectors) of the product are


only suited to be connected to SELV circuits. Use
interfaces (connectors) for their intended use only.
This product must not be connected to
telecommunication networks (TNV circuits).

Warning

Warning

Caution

Mounting and Installation


For public disclosure

The installed computer board is equipped with a


Lithium battery. Danger of explosion if battery is
incorrectly replaced. Replace only with battery of
the same or equivalent type.

This product generates a considerable amount of


heat. The enclosure transports this heat to the
environment and gets hot. Use caution when
touching the enclosure to prevent burns.

The digital I/O must be powered by a SELV power


supply that complies with the requirements of a
limited energy source (LPS) using an appropriate
supply or an external fuse.

GFK-2996 Hardware Reference Manual 13

Ambient and Environmental Conditions

Do not operate the product in a potentially explosive


atmosphere.

Warning

This product is a class A device. This product may


cause radio interference. In this case, the user must
take adequate measures.

Warning

Do not operate the product beyond the specified


ambient conditions.

Caution

Caution

14

GFK-2996

For public disclosure

UL Applications: For outdoor use, the product must


be mounted in a suitable electrical enclosure
complying with enclosure requirement of UL50,
UL50E and the max. supply voltage shall be 30 V dc
in a normal and single fault condition to comply
with voltage requirements of UL60950.

RXi Box IPC-XR

2.2 Mounting and Installation

Warning

The product is designed as a fanless computer


system. Nevertheless, a certain amount of heat is
generated inside the housing. The housing
transports this heat to the environment. Use caution
when touching the enclosure to prevent burns.

The nominal voltage for IPC-XR is 24 V dc. However, the product can be operated within
a range of 9 to 34 V dc.
The IPC-XR is intended to be mounted on a flat surface wall.
The product must be mounted exactly as indicated
in to allow the required natural heat transfer.
Derivations of < 5 will not affect the product.

Attention

The indicated area must be free of obstacles to


prevent heat transfer. There should be no space
between the wall and the product (use no spacers for
mounting).

The ambient temperatures below, left, right, and in


front of the product must not exceed the specified
maximum ambient temperature.

Attention
Mounting Screws
The product must be mounted with M6 screws with appropriate washers. Stainless steel is
recommended in harsh environment. The washers may have a maximum diameter of 15
mm (0.59 in).
Mounting Wall

Attention

Mounting and Installation


For public disclosure

The mounting wall must have enough structural


integrity at high temperatures. The case
temperature of the product will be approximately 15
K higher than the ambient temperature.

GFK-2996 Hardware Reference Manual 15

100 mm (3.94 in)

55 mm
(2.17 in)

55 mm
(2.17 in)

100 mm (3.94 in)

Mounting Guidelines

16

GFK-2996

For public disclosure

RXi Box IPC-XR

Hardware

3.1 PCIe
The RXi IPC-XR uses Peripheral Component Interface Express (PCIe) to provide
expansion options. Some Computer-on-module (COM) Express modules only provide a
limited number of PCIe lanes.
PCIe Lane Resources

PCIe Lanes

Function

PCIE0
PCIE1

Ethernet 2
Field Programmable Gate Array (FPGA)

PCIE2
PCIE3
PCIE4
PCIE5
PCIE6
PCIE7

Unused
Unused
Unused
Unused
Unused
Unused

3.2 Ethernet Interface (LAN1 and LAN2)


The RXi IPC-XR provides two 10/100/1000 Ethernet interfaces: LAN1 and LAN2.
LAN1
This Ethernet interface is provides by the COM Express module. For additional details,
refer to the module documentation (such as controller type).
Note LAN implementation and use is usually possible and depends on the COM Express
modules.

LAN2
This Ethernet interface is provided on the carrier board by an Intel i210 Ethernet
controller. The standard configuration uses the i210s iNVM memory for parameter
storage. As an option, external Flash memory option is available, but is not normally
equipped on the carrier board.
Note LAN implementation and use is not supported by Ethernet LAN2.

Hardware
For public disclosure

GFK-2996 Hardware Reference Manual 17

Notes

18

GFK-2996

For public disclosure

RXi Box IPC-XR

Hardware Configuration

4.1 Connectors and Operators Overview


Located below the VGA connector is an M5 thread for an additional earth connection.
EMI tests were passed without extra earth connection. However, during EMI testing,
earth connection is established with the shields of the I/O cables (VGA, LAN, and such).
The Power LED is located between the USB connectors. When the system is running the
Power LED is lit solid green. It is not lit when the system is in power down mode, even if
power is applied at the power connector.
Do not actuate connectors when power is applied.

Caution

Mechanical actuation of the M12/M8 connectors is


prohibited below -25C (-13 F).

Note All connectors (M12/M8/DSUB) are not sealed when a mating connector is not
present. Use a screw plug to seal unused connectors.

Hardware Configuration
For public disclosure

GFK-2996 Hardware Reference Manual 19

Front View with Connectors

20

GFK-2996

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RXi Box IPC-XR

4.2 Power In
The system power supply is connected with a 4pin T-coded M12 male connector.

The product may only be operated with power


supplies that can be considered SELV circuits.

Warning
Power Supply Connector
Pin #
1

Description

VIN-B (24 V dc)

3
4

VS
GND

VIN-A (24 V dc)

4pin T-coded M12 Male Connector

The return of the power supply (pin 4 = GND) is connected to the internal system GND
(through EMI filter chokes). The internal system GND is connected to the enclosure
internally; the shells of all connectors are on system GND potential.
Inside the product, this is connected to the metal enclosure, which might be connected to
protective earth by the installation. Some isolated reference grounds for communication
interfaces or I/O is available. These reference signals are referred to as GND-x, where x
indicates function.

Power Supply Input

Note To comply with UL/IEC/EN 60950-1: If the product is not supplied by a limited
current circuit, then a disconnection means (easily accessible and identifiable) must be
provided in the final installation to separate the equipment from all power sources.

Hardware Configuration
For public disclosure

GFK-2996 Hardware Reference Manual 21

Note The specified power supply voltage range is defined at the input connector of the
product. At low input voltage and high system load, a high input current of several
ampere will flow. This can lead to substantial drop on the power input cable (even when
using 1.5 mm, 0.06 in M12 cable assemblies).

4.3 VGA Connector


Analog VGA graphics connector as supplied by the COM Express module.
VGA Connector

15pin Female HD-Sub Connector

Pin #
1
2
3
4
5

Description

Description

Red
Green
Blue
NC
GND

Pin #
9
10
11
12
13

GND

14

VSync

7
8

GND
GND

15

DDC Clock

+5V
GND
NC
DDC Data
HSync

4.4 Ethernet Interface (LAN1 and LAN2)


Ethernet interfaces of the motherboard. The Ethernet physics is 10/100/1000BaseT,
available through the shielded M12 connectors.
Ethernet Connector
Pin #
1
2
3
4

Description
MDI0+
MDI0MDI1+
MDI1-

Pin #
5
6
7
8

Description
MDI3+
MDI3MDI2+
MDI2-

8pin Female M12 X-coded Connector

22

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RXi Box IPC-XR

4.5 USB 2.0 Host Interface (USB1 and USB2)


Two USB 2.0 host interfaces are available through 4pin M8 female connectors.
The USB connectors do not provide standby power so wake on USB is not possible.
USB Connector with USB cables Color Codes
Pin #
1

Description

USB- (white)

GND (black)

USB+ (green)

+5V (red)

4pin M8 Female Connectors

4.6 CAN
If the product is equipped with CAN interface(s), 5pin A-coded M12 female connectors
are provided for the CAN.
The USB connectors do not provide standby power so power on USB is not possible.
M12 CAN Connector
Pin #
1
2
3
4
5

Description
NC
NC
GND-CAN
CAN-H
CAN-L

M12 CAN Connector

Hardware Configuration
For public disclosure

GFK-2996 Hardware Reference Manual 23

4.7 RS485
If the product is equipped with RS485 interface(s), 5pin B-coded M12 female
connectors are provided.
M12 RS485 Connector
Pin #
1
2

Description

3
4

GND-RS485
DP (B)

NC

NC
DM (A)

5pin Female M12 B-coded Connector

4.8 RS232
If the product is equipped with RS232 interface(s), 5pin B-coded M12 female
connectors are provided.
M12 RS232 Connector
Pin #
1

Description

TxD (out)

3
4

GND-RS232
RxD (in)

CTS (in)

RTS (out)

5pin Female M12 B-coded Connector

24

GFK-2996

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RXi Box IPC-XR

4.9 Digital I/O


Four digital I/O signals are available on an 8pin A-M12 female connector.
M12 RS232 Connector

8pin Female M12 A-coded Connector

Pin #
1

Description

2
3
4
5
6
7
8

DIO4
DIO3
DIO2
DIO1
NC
NC
GND-DIO

VIN-DIO (10 34 V dc)

Digital I/O pins drive VIN-DIO to the output pins (high side switch). Each digital I/O pin
can be read back so that it can also be used as input.

Caution

The digital I/O must be powered by a SELV power


supply, that complies with the requirements of a
limited energy source (LPS) using an appropriate
supply or an external fuse; there is no internal fuse
in the VIN-DIO supply rail.

Digital I/O One-line

Each port pin (DIO1 to DIO4) is able to source 500 mA into a load. The sum of all output
currents should be limited to 1A.

Caution

Hardware Configuration
For public disclosure

When outputs are turned on, they source power


from VIN-DIO to the output pin. If you use a pin as
input, make sure you never turn on the
corresponding output. This may cause damage to
the driving source.

GFK-2996 Hardware Reference Manual 25

4.10

Additional Information
4.10.1

Right Angle Cable

When using right angle M8/M12 connectors, obey the exit direction of the cables when
planning the cabling. The following figure illustrates the use of all right angle cables.

CAN/Serial 1

CAN/Serial 2

Digital I/O

USB2

Power

USB1

LAN2

LAN1

Example of Right Angle Cabling

26

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RXi Box IPC-XR

4.10.2

M12 Y Adapters

For applications with fieldbus connections that need to pass-through, Y-adapters can be
used to provide two sockets for in-coming and out-going cables.
M a le

F e m a le

F e m a le

M a le

F e m a le

M a le
M12 Y Connectors

Some examples of Y-adapters adapters are:

Hardware Configuration
For public disclosure

M12 5pol A-coded male to female/male: Phoenix Contact SAC-5PY-M/F-M VP SH


M12 5pol A-coded male to female/female: Phoenix Contact SAC-5PY-M/2XF VP
SH

GFK-2996 Hardware Reference Manual 27

Notes

28

GFK-2996

For public disclosure

RXi Box IPC-XR

Maintenance
This chapter provides maintenance procedures for the RXi-XP product. Follow all Safety
instructions and guidelines provided in this document. Refer to the section Safety
Instructions.
All serviceable parts can be reached by removing the top cover of the product.

Always follow common ESD practice when you


service the product!

Caution

5.1 Top Cover Removal and Handling

Maintenance
For public disclosure

Maintenance Task

Action

Replace mSATA

Remove top cover

Notes

Replace Battery

Remove top cover

GFK-2996 Hardware Reference Manual 29

Top Cover Hardware

30

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RXi Box IPC-XR

To remove the top cover

Remove all cables before removing the top cover.

Caution
Note This procedure requires the use of a Torx-T20 tool. A stainless steel tool is
preferred.
1.

Remove the 10 top cover screws as indicated in the figure Top Cover Hardware.

2.

Lift of the top cover in direction of the screws. Do not apply force in any other
direction (rotation, horizontal force), or you might damage the internal high density
connector which connects the connectors to the main board.

3.

Make sure that you do not damage the connectors and components on the front panel
PCB when you handle the removed top cover.

To install the top cover


Note This procedure requires the use of a Torx-T20 tool. A stainless steel tool is
preferred.

Maintenance
For public disclosure

1.

Verify that the sealing is properly installed in its groove.

2.

If IP67 is required, check the integrity of the sealing. If it is damaged, remove and
replace the sealing.

3.

Put the cover onto the enclosure and gently assign the high density connector.

4.

Re-apply all screws (including the contact washer). Recommended torque: 2.6 Nm
(23.01 in-lb).

GFK-2996 Hardware Reference Manual 31

5.2 Battery Replacement


The installed computer board is equipped with a
Lithium battery. Danger of explosion if battery is
incorrectly replaced. Replace only with battery of
the same or equivalent type (3 V Lithium coin cell
battery).

Warning

Do not attempt to recharge the battery.


Do not disassemble, crush, puncture, short
external contacts, or dispose of in fire or water.

Compatible battery type: BR2032 (3 V Lithium coin cell battery)


The battery is used to back up the system time when the power supply is removed.

To replace the battery


1.

Turn off the computer properly through the operating system, then turn off any
external devices.

2.

Disconnect the power supply from the power connector.

3.

Remove the top cover from the product and locate the battery on the system main
board.

4.

Remove the battery from the holder. Insert a screwdriver at the right side and bend so
that the battery pops outs. Use only gentle force, otherwise the battery holder might
be damaged.

Remove Coin Cell Battery

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5.

Insert the new battery. Align the new battery to the left side of the holder and gently
press down on the right side of the battery until the battery snaps into the holder.

Install Coin Cell Battery

6.

Reinstall the top cover.

5.3 mSATA Replacement


To replace the mSATA: insert the PCI Express (PCIe) mini board into the
connector, then push it down and lock it using two M2,5 screws.
The insertion depth of the screws that lock the PCIe
mini board must not exceed 3.2 mm (0.13 in).

Attention

Make sure that the diameter of the screw or the


washer does not make contact with components or
traces on the mini board. Some boards have
components located close to the mounting holes.

Note The mSATA socket only accepts SATA based SSD modules. It does not support
PCIe-based modules and boards.

Maintenance
For public disclosure

GFK-2996 Hardware Reference Manual 33

Notes

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FPGA Expansion Subsystem


The PCIe interface for special Janztec features is implemented by an FPGA and
identified by a set of IDs in a PCIe configuration space.
PCIe Space

Purpose

Value

Found in

Vendor ID

0x13C3

CFG space register 0x00

Device ID

0x2A00

CFG space register 0x02

Subsystem Vendor ID

0x13C3

CFG space register 0x2C

Subsystem ID IPC-XR

0x2A00

CFG space register 0x2E

The FPGA PCIe interface provides access to several registers.


Local Address Spaces

PCI Base
Address
Register
0
1
2
3

Description
Local configuration registers
(memory mapped)
N/A
CAN / RS232 address space

Reserved
Control registers

NVRAM / I/O port address space

Size

512 B

8 kB
8 kB
4 kB
1 MB

Note The actual addresses for these memory spaces are configured by the BIOS of your
system every time the computer is booted. If you wish to access one of these spaces, read
the actual addresses from the PCIe configuration space.

FPGA Expansion Subsystem


For public disclosure

GFK-2996 Hardware Reference Manual 35

6.1 Control Registers


Control Registers

Address Offset

Access

Description

BAR4 + 0x00

RO

INT_STAT

BAR4 + 0x04

RO

INT_MASK

BAR4 + 0x08

WO

INT_DISABLE

BAR4 + 0x0C

WO

INT_ENABLE

BAR4 + 0x10

WO

RESET_ASSERT

BAR4 + 0x14

WO

RESET_DEASSERT

BAR4 + 0x18

RO

RESET_STATUS

BAR4 + 0x1c
BAR4 + 0x20
BAR4 + 0x24
BAR4 + 0x30
BAR4 + 0x3C

RW
RO
RO
RW
RO

I2C_CONTROL
FEATURE1
FEATURE2
TESTREG
REVISON

6.1.1 Feature Detection


BAR4 + 0x20 (32bit, ro)

FEATURE1
31..9
9
8
7..2
Reserved
COM1
COM0
Reserved
CAN[1..0]: High if corresponding CAN is available.
COM[1..0]: High if corresponding COM is available.
Reserved: Positions are zero.

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0
CAN0

BAR4 + 0x3c (32bit, ro)

REVISION
31..24
23..16
ID
Reserved
ID[7..0]: Specific hardware design.
Reserved [7..0]: 0x00.
Release [7:0]: Current version of design.
Build [7:0]: Running build number.

1
CAN1

15..8
Release

7..2
Build

RXi Box IPC-XR

6.1.2 Interrupt Programming


The FPGA generates an interrupt that is logically OR-ed among all internal interrupt
sources. To determine which source has generated an interrupt, the interrupt handler must
read the interrupt status register as listed in the following table.
INT_STAT

BAR4 + 0x0 (32bit, ro)

31..9
9
8
7..2
1
0
Reserved
COM1
COM0
Reserved
CAN1
CAN0
CAN[1..0]: Interrupt status info. Each defined bit in this register reflects the status of the INT# pin
of the corresponding CAN. A zero will be read when an interrupt is pending. If a CAN interrupt
request line is disabled, then the corresponding bit is forced to 1.
COM[1..0]: Interrupt status info. Each defined bit in this register reflects the status of the INT# pin
of the corresponding COM. A one will be read when an interrupt is pending. If a COM interrupt
request line is disabled, then the corresponding bit is forced to 0.
Reserved: Undefined, and must not be considered. Software must mask them off.

Note Interrupt requests can be masked off by the CPU. This is done through the interrupt
disable/enable registers. Interrupts are disabled after RESET. Enable a CAN interrupt line
before using it.
INT_ DISABLE

BAR4 + 0x8 (32bit, wo)

31..9
9
8
7..2
1
0
Reserved
COM1
COM0
Reserved
CAN1
CAN0
CAN[1..0] and COM[1..0]:
Writing one of the bits disables/enables interrupts from the corresponding function. Both
registers are accessed in hot-1 technique: Writing a one to a bit disables/enables further
interrupts from the corresponding function, writing zero to a bit do not affect the interrupt mask
status of that function. If a functions interrupt request line is disabled, then this functions
interrupt bit will never appear in the INT_STAT register and it will not cause interrupts.
Reserved: Bit positions must be written as zero.

INT_ENABLE

BAR4 + 0xC (32bit, wo)

31..9
9
8
7..2
1
0
Reserved
COM1
COM0
Reserved
CAN1
CAN0
CAN[1..0] and COM[1..0]:
Writing one of the bits disables/enables interrupts from the corresponding function. Both
registers are accessed in hot-1 technique: Writing a one to a bit disables/enables further
interrupts from the corresponding function, writing zero to a bit do not affect the interrupt mask
status of that function. If a functions interrupt request line is disabled, then this functions
interrupt bit will never appear in the INT_STAT register and it will not cause interrupts.
Reserved: Bit positions must be written as zero.

FPGA Expansion Subsystem


For public disclosure

GFK-2996 Hardware Reference Manual 37

6.1.3 Function Reset


To ensure a defined state of a function at any time, it is possible to activate the RST# line
of a function via software. This can be done with the reset assert/deassert registers. The
RST# line of all functions are activated during a PCIe bus reset.
RESET_ASSERT

BAR4 + 0x10 (32bit, wo)

31..9
9
8
7..2
1
0
Reserved
COM1
COM0
Reserved
CAN1
CAN0
CAN[1..0] and COM[1..0]:
Writing one of the bits disables/enables interrupts from the corresponding function. Both
registers are accessed in hot-1 technique: Writing a one to a bit disables/enables further
interrupts from the corresponding function, writing zero to a bit do not affect the interrupt mask
status of that function. If a functions interrupt request line is disabled, then this functions
interrupt bit will never appear in the INT_STAT register and it will not cause interrupts.
Reserved: Bit positions must be written as zero.

RESET_DEASSERT

BAR4 + 0x14 (32bit, wo)

31..9
9
8
7..2
1
0
Reserved
COM1
COM0
Reserved
CAN1
CAN0
CAN[1..0] and COM[1..0]:
Writing one of the bits disables/enables interrupts from the corresponding function. Both
registers are accessed in hot-1 technique: Writing a one to a bit disables/enables further
interrupts from the corresponding function, writing zero to a bit do not affect the interrupt mask
status of that function. If a functions interrupt request line is disabled, then this functions
interrupt bit will never appear in the INT_STAT register and it will not cause interrupts.
Reserved: Bit positions must be written as zero.

6.1.4 Internal I2C bus


The control register for the onboard I2C interface provides bit-bang style I2C
implementation.
I2C_CONTROL
31..9

BAR4 + 0x1c (32bit, rw)

8
7..2
1
0
Reserved
SCL
SDA
SDA: I2C bidirectional data line. Writing 0 sets the data line to low potential. Writing 1 tri-states
the data line. An external pull-up resistor (1kOhm) raises the line to high potential. This must be
done before reading data.
SCL: I2C bidirectional clock line. Writing 0 sets the clock line to low potential. Writing 1 tri-states
the clock line. An external pull-up resistor (1kOhm) raises the line to high potential. This must be
done before reading clock status.
Reserved: Bit positions must be written as zero.

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6.2 CAN Interface


6.2.1 CAN Address Space
The CAN controllers are mapped into memory address space.
Address Offset

Accesses

BAR2 + 0x000..0x0ff
BAR2 + 0x100..0x102
BAR2 + 0x200..0x2ff
BAR2 + 0x300..0x302

CAN controller 0 registers (SJA1000)


CAN controller 0 control
CAN controller 1 registers (SJA1000)
CAN controller 1 control

Note Refer to the SJA1000 manual for a description of registers and operation.

6.2.2

CAN Termination and LEDs

Besides the SJA1000 registers (defined in the SJA1000 manual), there are two additional
registers that control the line termination and the front panel LEDs. These registers are
unique for each channel.
CAN_TERM0,1
7

BAR2 + 0x100, 0x300 (byte, rw)


6

4
Reserved

0
TERM

Reset:

0
TERM: Set to zero to disable the line-termination, Set to one to enable the termination resistor.
Reserved: Reserved positions should not be changed. You should use read-modify-write operation to change this register.

CAN_LED0,1
7

BAR2 + 0x102, 0x302 (byte, wo)


6

Reserved

1
LEDG

0
LEDR

Reset:

LEDR: Write 1 to turn red LED on, write 0 to disable.


LEDG: Write 1 to turn green LED on, write 0 to disable.
Reserved: Reserved positions should be written as zero for compatibility with future products.
Reset:

FPGA Expansion Subsystem


For public disclosure

GFK-2996 Hardware Reference Manual 39

6.3 Serial Port Interface


The UART controllers are mapped into memory address space.
Address Offset

Accesses

BAR2 + 0x1000..0x1008
BAR2 + 0x1100..0x1108

UART 0
UART 1

Note The serial port UARTs are implemented inside the FPGA and are 16550
compatible (16 bytes FIFO).
At customer request, other serial port options are available, but not yet implemented:

The COM Express Typ 6 defined serial ports (Rx/TX only) can be routed to the
connectors. Implementation depends on availability on the COM Express module.
Sometimes such ports are available as legacy ports, sometimes as USB based ports,
sometimes as custom ports, sometimes they are not available at all.
LPC based legacy serial ports (I/O address) can be implemented in FPGA if legacy
ports are required for software compatibility. However, BIOS support for such ports
can be a difficult issue.

6.4 NVRAM
The RXI IPC-XR implements an integrated nvSRAM memory. This device implements
128kx8 NVRAM. The NVRAM is a fast SRAM style device; however there is no need
for battery maintenance.
NVRAM address (128 KByte NVRAM)

Address Offset

Description

BAR5 + 0x080000..0x09FFFF

NVRAM area

The NVRAM can be accessed by 8-, 16- and 32 bit operations (read and write).
Note If NVRAM is accessed by 16/32 bit operations, these are not atomic. In case of
power down, it might happen that only parts of the 16/32 bit value are stored in the
nvSRAM. Also notice that the PCI interface has buffers. Even if the write operation has
been finished from CPU point of view, it might not have been saved into the memory. To
make sure data has reached the memory, read back the latest written content.

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6.5 Digital I/O


Program the digital I/O by reading/writing the register in the FPGA register space.
Digital I/O Registers

Address Offset

Access

Description

BAR5 + 0x00
BAR5 + 0x01

RW

DIGIO_OUT

BAR5 + 0x02

WO

DIGIO_IN

BAR5 + 0x03

RO

DIGIO_STAT

DIGIO_OUT
7

BAR5+0x1 (byte, rw)


6
5
Write 0, Read as dont care

3
OUT3

2
OUT2

0
OUT0

BAR5+0x2 (byte, ro)

DIGIO_IN
7
6
5
4
IN3
IN2
IN1
IN0
IN3..0: status of the digital input line.
OUT3..0: 0: input voltage 0..4 V; 1: input voltage 9..24 V

2
1
Read as dont care

DIGIO_STATUS
7

1
OUT1

BAR5+0x3 (byte, ro)


6

0
NO

NO: 1: Normal operation.


0: Overheat condition; the output port is shutting down. This may result in cooling down the chip which sets the NO flag back to
1. If the error still exists, the chip will heat up again and the NO flag will be set to 0.

FPGA Expansion Subsystem


For public disclosure

GFK-2996 Hardware Reference Manual 41

6.6 FPGA Reprogramming


An interface is provided to reprogram the SPI Flash of the FPGA.
SPI_RX

BAR0 + 0x100 (32bit, ro)


31..0
RX_DATA

RX_DATA: Data read from SPI FLASH. Data is shifted in at LSB.

SPI_TX

BAR0 + 0x104 (32bit, rw)


31..0
TX_DATA

TX_DATA: Data to be written to SPI FLASH. Data is shifted out when SPI_TX is written and the controller is enabled (EN=1). MSB is
shifted out first.

BAR0 + 0x108 (32bit, rw)

SPI_CONTROL
31..25
24.20
19..14
14
13
Reserved
SHIFT
Reserved
WP
HOLD
Reset:

0
1
1
EN: 1=enable SPI controller.
CS: SPI FLASH chip select control (0=low)/
HOLD: SPI FLASH HOLD# control (0=low)/
WP: SPI FLASH WP# control (0=low)/
SHIFT: Data shift count. N+1 bits are shifted out when SPI_TX is written.
Reserved: undefined, and must not be considered. Write reserved bit as zero.

12
CS

11..1
Reserved

0
EN

BAR0 + 0x114 (32bit, ro)

SPI_STATUS
31..8
Reserved

7
TC

6..3
Reserved

2
TF

1
Reserved

0
TE

Reset:

1
TE: Transmitter empty flag (1=empty).
TF: Transmitter full flag (1=full).
TC: Transfer complete (0=busy, 1=done).
Reserved: undefined, and must not be considered.

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System Control
The RXi IPC-XR provides the following features for system control and supervision.
Refer to the figure Front View with Connectors.

System MCU controls the power supply and COM Express module run state.
Controlled either by the power supply voltage or by the control input (mid pin on the
power supply connector).
System MCU provides an I2C slave interface on the host I2C to monitor and modify
system operation.
Access to the host I2C bus is possible by a I2C master interface, which is provided by
the FPGA subsystem.
Digital temperature sensor that can be read using the system MCU.
ispPAC power sequencer which controls and monitors the internal power supplies.
The integrated ADC can check any of the internal voltages and can be read using the
system MCU.

System Supervision

System Control
For public disclosure

GFK-2996 Hardware Reference Manual 43

System Control by Power Supply Voltage (VIN)

System Control by Remote Control Input (VS)

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PMON I2C Registers

System Control
For public disclosure

GFK-2996 Hardware Reference Manual 45

7.1 I2C Address


The I2C address used by PMON is 0x60.

7.2 I2C Registers


All registers are 16bit wide. They are accessed indirectly by a pointer byte, which has to
be written at the beginning of each transaction. Reserved registers should not be written.
Indicated register settings can be internally saved to EEPROM. These values will then be
restored at power on of PMON.
Pointer

Register

EEPROM Save

0x00
0x01
0x02
0x03
0x04
0x05
0x06

ID
CONTROL
STATUS
COMMAND
DATA
Reserved
VIN_ACTUAL

Yes

0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D .. 0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19..0x1f
0x20
0x21

VS_ACTUAL

VIN0
VIN1
VIN2
VS0
VHYST
Reserved
TIN00
TIN01
TIN11
TIN21
TS0
TS1
TS2
TS3
TS4
Reserved
TEMP
FANCON_RDWR

Yes
Yes
Yes
Yes
Yes

Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes

0x22
0x23..0xFF

EEPROM_CTRL

Reserved

Note Registers that are not documented are reserved for future feature enhancement of
the MCU firmware. They should not be written to avoid compatibility problems with
future versions.
The following tables provide a description of the defined registers. All voltage related
registers are stored in units of 1/100 V, all time related registers are stored in units of 10
ms (for a maximum parameter of 650s), and all temperature related registers are stored in
units of 0.1C (32.2 F).

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Pointer 0 (16bit, ro)

ID
15

0
PMONID
PMONID: This provides the possibility to identify the PMON functionality and indicate future revisions. Check for the value 0x0802
to match this document.

Pointer 1 (16bit, ro)

CONTROL
15

0
EXB

RESET:
Restored from EEPROM
EXB: If this bit is set, the VS input (mid contact on power connector) act as an power button input. If VS is > 5 V (typ.), the COM
Express PWRBTN# signal is asserted.
If this function is activated, you should program the VS0 threshold to zero.
Reserved: Bits should be written as zero.

Pointer 3 (16bit, wo/ro)

COMMAND
15

14

13

12

11
WDR

10
BOR

9
EXR

8
POR

0
FSTATE

RESET:
Undefined
FSTATE: state of the PMON internal state machine.
POR: Set to one if last PMON MCU reset was a power-on reset.
EXR: Set to one if last PMON MCU reset was an external reset.
BOR: Set to one if last PMON MCU reset was a brown-out reset.
WDR: Set to one if last PMON MCU reset was a watchdog reset.

Pointer 3 (16bit, wo/ro)

COMMAND
15

0
CMDCODE

RESET:
0
CMDCODE: To trigger functions in the PMON firmware, write the corresponding command code into this
register. Once the command has completed, the register is cleared to zero by the PMON firmware.

Pointer 4 (16bit, rw)

DATA
15

0
DATA
DATA: Data to be supplied with the command to be executed is supplied in this register. Write to DATA before
writing to COMMAND.

VIN_ACTUAL

Pointer 6 (16bit, rw)

15

0
VIN_ACTUAL

VIN_ACTUAL: Voltage reading of the power supply voltage (+ contact on power connector). Reading is in
units of 1/100 V, so that register value of 0x800=2048 corresponds to 20.48 V.

VS_ACTUAL

Pointer 7 (16bit, rw)

15

0
VS_ACTUAL

VS_ACTUAL: Voltage reading of the sense voltage input (mid contact on power connector). Reading is in units
of 1/100 V, so that register value of 0x800=2048 corresponds to 20.48 V.

System Control
For public disclosure

GFK-2996 Hardware Reference Manual 47

Pointer 8 (16bit, rw)

VIN0
15

0
VIN0

RESET:
Restored from EEPROM
VIN0: If the power supply voltage level is below VIN1, then the system is held in reset. This state can be left if
input voltage level is above VIN0+VHYST for longer than TIN11.

Pointer 9 (16bit, rw)

VIN1
15

0
VIN1

RESET:
Restored from EEPROM
VIN1: If the power supply voltage level is below VIN1, then the system is held in reset. This state can be left if
input voltage level is above VIN1+VHYST for longer than TIN11.

Pointer 10 (16bit, rw)

VIN2
15

0
VIN2

RESET:
Restored from EEPROM
VIN2: If the power supply voltage level is below VIN2, the power supply is immediately turned off. This state
can be left if input voltage level is above VIN2+VHYST for longer than TIN21.
This parameter has a factory set low limit. You cannot program values below this limit. This limit might
depend on the system configuration. Generally it will be higher for a system with high power consumption to
prevent operation with low voltage and high current.

Pointer 11 (16bit, rw)

VS0
15

0
VS0

RESET:
Restored from EEPROM
VS0: If the sense voltage level is below VS0 for a certain time, a system shutdown is triggered. When the
voltage level is above VIN2+VHYST for a certain time, then a system startup is triggered. Refer to the various
timing parameters for more details.
Program this register to zero to disable the sense voltage function. The sense voltage level can be read from
VS_ACTUAL regardless of the VS0 setting.

Pointer 12 (16bit, rw)

VHYST
15

0
VHYST

RESET:
Restored from EEPROM
VHYST: This register sets the hysteresis for the power supply and sense input signals.

Pointer 18 (16bit, rw)

TIN11
15

0
TIN11

RESET:
Restored from EEPROM
TIN11: Reset delay (refer to VIN1).

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RXi Box IPC-XR

Pointer 19 (16bit, rw)

TIN21
15

0
TIN21

RESET:
Restored from EEPROM
TIN21: Power good delay (refer to VIN2).

Pointer 20 (16bit, rw)

TS0
15

0
TS0

RESET:
Restored from EEPROM
TS0: When VS is below the VS0 threshold for longer than TS0, then a system shutdown is triggerd. If VS
passed VS0+VHYST before TS0 expires, then no action is taken.
However, once a system shutdown has been triggered it cannot be aborted by rising VS.

Pointer 20 (16bit, rw)

TS1
15

0
TS1

RESET:
Restored from EEPROM
TS1: Shutdown timeout for the system (the COM Express module). Once a shutdown has been triggered, the
PMON firmware waits for the system to shut down (monitored by COM Express SUS_S3 signal). If a
shutdown has not been detected after TS1 expires, then a system reset is applied and power is turned off
one second later.

Pointer 21 (16bit, rw)

TS2
15

0
TS2

RESET:
Restored from EEPROM
TS2: The system is off (and a minimum off time of 2 seconds has elapsed) and VS is > VS0+VHYST for longer
than TS2, then the system is turned on.
The power supply is turned on, and if the COM Express module does not start automatically, a single power
button event is generated to force turn on.

Pointer 22 (16bit, rw)

TS3
15

0
TS3

RESET:
Restored from EEPROM
TS3: A system shutdown is inhibited until the system is running for more than the time programmed by TS3.
This can be used to prevent a shutdown during operating system bootup phase, when the time set by TS0
might not be enough to perform a proper shutdown.

System Control
For public disclosure

GFK-2996 Hardware Reference Manual 49

Pointer 23 (16bit, rw)

TS4
15

0
TS4

RESET:
Restored from EEPROM
TS4: Do not write to this register.

Pointer 32 (16bit, ro)

TEMP
15

TEMP
TEMP: System temperature sensor readout. Temperature data is read as twos complement data in units of
1/10C.

Register Reading

Temperature

0b0000001001010000

25C (77 F)

0b0000000000001010

1C (33.8 F)

0b0000000000000000

0C (32 F)

0b1111111111110110

-1C (30.2 F)

0b1000000000000000

Sensor Error

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7.3 Command Codes


This section provides the command codes that are accepted by the PMON firmware.
Undocumented command codes should not be issued.
CMD Code

Command

Description

IDLE

When read, this command code indicates idle state.

SAVE_EEP

Save all parameters that are indicated as EEPROM saved into the PMON MCUs
internal EEPROM. This makes changes permanent.
Before writing, make some simple checks, such as verify that you cannot save a
voltage threshold that is higher than the supported operating value.
No checks are needed on the timing parameters.

RESET_ERR

Reset the PMON MCU reset information in the STATUS register.


Read ADC data from the ispPAC chip. The channel is selected by the DATA register.

PACADCREAD

System Control
For public disclosure

Voltage Rail
Factor
Channel
0
Vin
7.8
1
+12 V
3

2
N/A
3
+5 V
1
4
+3.3 V
1
5
+1.2 V
1
6
Vin-A
8.8
7
Vin-B
8.8

8
N/A

9
N/A
The returned value is a correct ADC value if bit 0 of the DATA register is 1.
To convert to a voltage value use the following formula:
Voltage/mV = ((DATA>>4)&0xfff) * 2 * factor
Where factor is taken from the Factor column.
Vin-A and Vin-B channels allow to monitor both power supply inputs independently, to
allow identify broken down power supplies. Accuracy is not very high for these
channels.

GFK-2996 Hardware Reference Manual 51

Notes

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Specifications
The specifications provided in this chapter apply to a standard configuration.

8.1 Technical Data


Item

Specification

Processing Core
CPU

C-1047UE: Intel Celeron 1047UE, 2 x 1.4 GHz, 2 MB cache


i7-3517UE: Intel i7 3517UE, 2 x 1.7 / 2.8 GHz, 4 MB Cache
For more details refer to http://ark.intel.com/.

Chipset

Intel 7 Series Platform Controller Hub

COM Express Module

GE bCOM6-L1400

Memory
Main Memory
nvSRAM
Storage

4 GB DDR3 1600MT/s
128 kB nvSRAM

mSATA
Video

1 x with SATA interface

Controller

Chipset graphics

Memory

Shared with main memory

Interface
External Interfaces
Video

VGA, up to 2048 x 1536

Ethernet
USB
CAN

Digital I/O

1 x VGA
1 x 10/100/1000 Mbit/s Ethernet (LAN1: Intel 82579)
1 x 10/100/1000 Mbit/s Ethernet (LAN2: Intel i210)
2 x USB 2.0
2 x 9 pin D-Sub, ISO/DIS 11898-2, isolated from logic, switchable termination resistor,
SJA1000 controller Isolation barrier tested 800 V dc for 1 min.
4 x digital In/Out, isolated from logic, 10 to 34 V external power supply, 0.5 A output
current per output, 1 A output current for all ports in total.
Isolation barrier tested 800 V dc for 1 min.

Indicators and Switches


Remote Control

1 x Signal input on power connector for push-button or run-control function

Status LEDs

1 x Green LED for power supply status

System
Housing
Battery

Anodized aluminium
BR 2032, for Real Time Clock (RTC)

Battery Lifetime

3.5 years

System controller

Temperature sensing and power supply management (accessible with FPGA I2C bus)

Watchdog

Yes, implemented by COM Express module

FPGA
Power Requirements

Spartan 6 LX25T, PCIe interface to baseboard I/Os

Power Supply

DC power, 24 V nominal (9 to 34 V, lower limit with adjustable UVL)

Inrush Current (max)

Not controlled

Specifications
For public disclosure

GFK-2996 Hardware Reference Manual 53

Item

Specification

Power Dissipation

Without external load or expansion boards


C-1047UE: 33 W (maximum)
i7-3517UE: 35 W (maximum)

External Load Capabilities


+5 V (USB)

Maximum 0.5 A per USB port

Environmental Specifications

Ambient Operating Temperature

C-1047UE: -40 to +70C (-40 to 158 F) when installed in restricted access location, -40
to +60C (-40 to 140 F) in all other locations)
i7-3517UE: -40..+70C (-40 to 158 F) when installed in restricted access location, -40..
+60C (-40 to 140 F) in all other locations)
at sea level, derating of 1C (33.8 F) per 300 m (984.3 ft) above sea level to a maximum
of 2000 m (6561.68 ft).
This restriction limits the housing temperature in locations where it is possible that the
product surface is touched.
Storage at high temperatures will reduce battery life.

Storage Temperature

-40 to +85C (-40 to 185F)

Humidity

5 to 95% r.H., non condensing

Protection Class

IP67 (all connectors mounted)

EMC
Physical Dimensions

EN 55011 Class A, EN 50155

Size
Unit Weight

Not including connectors (WxHxD) 266 x 196 x 87.75 mm (10.47 x 7.72 x 3.46 in)

Packaged Weight

6.2 kg

54

GFK-2996

For public disclosure

5.2 kg

RXi Box IPC-XR

8.2 Enclosure Dimensions


266 mm (10.47 in)

87.75 mm
(3.45 in)

19.89 mm (0.78 in)

196 mm (7.72 in)

156.21 mm (6.15 in)

226.21 mm (8.91 in)

19.89 mm (0.78 in)

Specifications
For public disclosure

11 mm
(0.43 in)

GFK-2996 Hardware Reference Manual 55

Notes

56

GFK-2996

For public disclosure

RXi Box IPC-XR

Index
A
Adapters 27

Flash Memory 17
FPGA 37
Expansion Subsystem 35
PCIe interface 35
FPGA Registers
CAN Interface 39
Control Registers 36
Digital I/O 41
NVRAM 40
Serial Port Interface 40
SPI Flash reprogramming 42

Battery 11
Battery Replacment 32
BIOS 35
Block Diagram 12

Cable 26
Cables 27
CAN 35
CAN Interface 23
Address Space 39
Termination and LEDs 39
Coin Cell Battery 32
Command Codes 51
Connectors
CAN 23
Digital I/O 25
Ethernet Interface 22
Overview 19
Power In 21
RS232 24
RS485 24
USB 2.0 Host Interface 23
VGA 22
Control Registers
Feature Detection 36
Interrupt Programming 37

Hardware 17
Connectors 19
Ethernet Interface 17
PCIe 17

D
DDC 22
Digital I/O 11, 25, 41
Dimensions
Physical 55

E
Enclosure 29, 55
ESD 29
Ethernet
Interface 17
Ethernet Interface 22
Expansion Subsystem 35

GND 22

I
I2C 43
Address 46
Registers 46
Installation 13
Procedures 15

L
LAN1 and LAN2 17, 22
LED 19
LEDs 39
Lithium Battery 32

M
Maintenance 29
Battery Replacement 29, 32
mSATA Replacement 33
Mounting 13
Procedures 15
mSATA 11

N
NVRAM

35

O
Operation Systems 11
Operators 19

F
Features 11

GFK-2996
For public disclosure

Index

57

P
PCIe 17, 33
PCIe interface 35
Peripheral Component Interface Express (PCIe)
PMON 44, 46, 51
Power
LED 19
Power In 21
Power LED 11
Power Supply 11

17

R
RS-232 25
RS232 24, 35
RS485 24
RTC 11
RXi Box IPC-XR
Overview 11

S
Safety Instructions 13
SELV Circuits 21
Serial Port Interface 40
Serviceable parts 29
Software 11
Specifications 53
Enclosure Dimensions 55
Technical Data 53
SSD 11, 33
System Control
features 43

T
Technical Data 53
Top Cover
removal and handling

29

U
UART 40
USB 11, 23
USB 2.0 Host Interface 23
USB1 and USB2 23

V
VGA 11, 2122
VS 21

58
For public disclosure

RXi Box IPC-XR

Automation & Controls from GE


1-800-433-2682
1-434-978-5100
www.geautomation.com

GFK-2996 For public disclosure

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