MODEL OUESTION PAPER

FOUR YEAR B.TECH DEGREE END EXAMINATION

FIFTH SEMESTER EXAMINATION
COMPUTER SCIENCE AND ENGINEERING
MICBOPROCESSORS & ASSEMBLY LANGUAGE PROqRAMMING (MALP.)
(SCHEME-2013)
Time: 3 Hours
Max marks:70M
Note: Answer Question no.

l.

and any FOUR questions from the remainirtg.

a) Name any two 8 bit microprocessors.

b) What does 16 stands for in 16 bit microprocessor?

c) Define Baud rate.

d) How many address lines are required to represent

e) Explain the instruction ADI 05H.
0 Explain LOOP instruction.
g)

h)

i)
j)
2.

MB of mernory?

What is the result in A after execution MVI A. 04H

ADI O4H
RAR
HLT
What is the size of Interrupt vector table in 8086?
What is the use of Pre - fetch Queue unit in 8086?
What is the use of Trap Flag?

a) Define a Microprocessor. Explain the Architecture of 8085 pp with a neat diagram. (8M)

b) Explain the Addressing modes of 8085

3.

pp.

a) Explain about the instruction classification in 8085

(7M)

prp

(7M)

b) Explain the following 8085 instructions. with an example.

i) LHLD ii) CMA iii) STAX iv)

4.

JNC

a) Draw and Explain the Architecture of 8086

(81\4)

Microprocessor.

b) Write about the Addressing Modes of 8086 with analysis of Physical

5.

(8M)

Address.

(7M)

a) Explain the follorving Assembler Directives

i) oRG ii) OFFSET iii) EXTRN iv) EQU

(8M)

b) Explain the following instructions of 8086.

i) AAD

ii)XCHG
iii) XLAT

6.

iv) DAA
Write
a)
about Stacks, Procedures and

b) Explain in detail
u,'hen

1.

Macros .

(7M)
(8M)

the sequence of operations initiated b1, 8086 processor

it receives an Interrupt.

a) With neat sketch explain in detail the internal organization and operating
modes of 8255 PPI

b) Give control and status registers of 8253 and illustrate the different modes of

(7M)

(8M)

8253. (7M)