MODEL OUESTION PAPER

FOIJR YEAR B.TECH DEGREE END EXAMINATION

FIIII'H SEMESTER EXAMINATION
EI,ECTRONICS AND COMMUNICAI'ION ENGINEERING
COMP IJTII,R OITGANIZAI]ION (CO)
(scr{EME-2013-)
J-inre: 3

Hor.rrs

Max tnarks: 70M

Note:

1.

QuestionNo.l is compulsory

2. Answer any four questions from the remaining

1

Answer the following questious. Each question carries

I mark.

10M)

a) What are the irnportant resources available in CPU?

b) Define micro instruction?
c) What is the difference between a direct and indirect address?
d) What is the pulpose of subroutine rcgister (SBR)?
e) What is hit ratio?

f)

\Mrat is poiling?

g) Givs th. example for zero address instruction?

h) Define rnapping?

i)
j)
2.

Def-rne parallel processing?

What is the function of flag register?

a) Discuss

various types of rnemory reference instructions with

example?

(7M)

b) Design a common bus systenr with 4 registers of 4 bits each. with multiplexers? (8M)

3.

a) Draw the

flow charl for the interrupt cycle and

cxplain?

(8M)

b) Explain the diff'erence between hardwired control and micro prograntmed control (7M)

4.

a) Explain the Booth's algorithrn for multiplication of signed two's

Compleu.rent

number

(7M)

b) Define addressing mode? Explain diff-erent addressing modes available

tbrmal

(8M)

a) Draw the block diagram of DMA controller and explain in detail

About DMA controller?
b) Explain the mapping procedures with respect to cache memory and their

(8M)

In comptrter with instruction

5.

Relative merits and

6.

demerits?

a) Explain how to handle the data dependency

(7i\4)

conflicts in case of

Instruction pipeline
b) Explain Arithmetic pipeline with

7.

Briefl1, explain
I

about

) Stack organization

2)

Virlual memory organization

explain

(7M)
(81\4)