Chun giao tip SPI

Khi nim
SPI vit tt ca Serial Peripheral Interface, SPI bus Giao din ngoi vi ni tip, bus SPI.
Chun SPI c pht trin bi Motorola. y l mt chun ng b ni tip truyn d liu
ch song cng ton phn (full- duplex) tc trong cng mt thi im c th xy ra ng
thi qu trnh truyn v nhn. i khi SPI cn c gi l chun giao tip 4 dy (Four-wire).
SPI l giao din ng b, bt c qu trnh truyn no cng c ng b ha vi tn hiu
clock chung. Tn hiu ny sinh ra bi master.

Trong giao din SPI c bn tn hiu s:

MOSI hay SI cng ra ca bn Master ( Master Out Slave IN). y l chn dnh cho
vic truyn tn hiu t thit b ch ng n thit b b ng.
MISO hay SO Cng ra bn Slave (Master IN Slave Out). y l chn dnh cho vic
truyn d liu t Slave n Master.
SCLK hay SCK l tn hiu clock ng b (Serial Clock). Xung nhp ch c to bi
Master.
CS hay SS l tn hiu chn vi mch ( Chip Select hoc Slave Select). SS s mc cao
khi khng lm vic. Nu Master ko SS xung thp th s xy ra qu trnh giao tip.
Ch c mt ng SS trn mi slave nhng c th c nhiu ng iu khin SS trn
master, ty thuc vo thit k ca ngi dng.

Nguyn l hot ng
bt u hot ng th ko chn SS xung thp v kch hot clock c Maser v Slave.

Mi chip Master hay Slave c mt thanh ghi d liu 8 bits.

C mi ca xung nhp do Master to ra trn ng gi nhp SCK, mt bit trong thanh ghi d
liu ca Master c truyn qua Slave trn ng MOSI, ng thi mt bit trong thanh ghi
d liu ca chip Slave cng c truyn qua Master trn ng MISO.

Lu , c th config tn hiu ng b clock theo sn, theo mc .

Hin ti c 4 mode c bn (MODE 0. 1,2,3) ca SPI da vo config SCLK nh sau:

Cc ca xung gi nhp, phase v cc ch hot ng: cc ca xung gi nhp (Clock

Polarity) c gi tt l CPOL .y l khi nim dng ch trng thi ca chn SCK trng
thi ngh.
trng thi ngh (Idle), chn SCK c th c gi mc cao (CPOL=1) hoc thp
(CPOL=0).
Phase (CPHA) dng ch cch m d liu c ly mu (sample) theo xung gi nhp.
D liu c th c ly mu cnh ln ca SCK (CPHA=0) hoc cnh xung (CPHA=1).
S kt hp ca SPOL v CPHA lm nn 4 ch hot ng ca SPI. Nhn chung vic chn 1
trong 4 ch ny khng nh hng n cht lng truyn thng m ch ct sao cho c s
tng thch gia Master v Slave.
Do 2 gi d liu trn 2 chip c gi qua li ng thi nn qu trnh truyn d liu ny c
gi l song cng.

So snh SPI v I2C

T nhng trnh by trn, ta c th a ra cc nhn xt v so snh vi I2C nh sau:

Bus topology / Routing / Resouce

I2C ch cn 2 dy trong khi SPI cn t nht 3 4 dy (Trong trng hp dng
SPI mun thm Slave th s tng s lng dy). Vic to Bus I2C cng d dng
hn nhiu so vi SPI do ch cn 2bit l c th kt ni c s thit b ln (7bit).

Tc
V tc th SPI t ra vt tri so vi I2C. SPI l full-duplex, khng gii hn
tc ti a thng hn 10Mbps. Trong khi I2C gii hn tc thng
thng 1Mbps nu fasst mode v 3.4Mbps High speed mode.

Tnh nng

I2c c nhiu tnh nng cao cp hn nh automatic multi-master conflicts handling and buildin address management. Tuy nhin chnh iu ny li lm gim tc .
SPI th rt d thc hin v cung cp rt nhiu tnh linh hot cho tin ch m rng v
cc bin th.