R07

Code No: 07A51403

Set No. 2

III B.Tech I Semester Examinations,December 2011

SWITCHING THEORY AND LOGIC DESIGN
Mechatronics
Time: 3 hours
Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
?????
1. Find the reduced state table for the machine shown below and design the circuit
single SR flip-flop.
[[16]

PS
A
B
C
D
E
F
G

00
A,00
A,00
A,00
A,00

NS, Z
01
10
E,01
C,10 B,00
C,10
E,01 F,00
G,10 F,00
-

11
A,01
D,01
D,11
G,11
G11

2. (a) Obtain the PLA programming table for the following Boolean functions
P
i. F1 (x,y,z) = (4,5,7)
P
ii. F2 (x,y,z) = (3,5,7)
(b) Show the general block schematic of PLA

[8+8]

3. Obtain an ASM chart to implement Booths algorithm for multiplication. Discuss

the data processor subsystem and the control subsystem separately.
[16]
4. (a) Given the logic pakage A shown below in figure 4, which operates as follows:
output Yi=1 if i inputs out of x0 x1 x2 are equal to 1. Design unit B so that the
overall logic function of unit C will be to produce an output Zi=1 if i inputs
out of x0 x1 x2 x3 are equal to 1.
(b) Design a 16: MUX using only NAND gates.

[8+8]

5. (a) A safe has 5 locks v,w,x,y and z, all of which must be unlocked for the safe
to open. The keys to the locks are distributed among 5 executives in the
following manner:
Mr. A has keys for locks v and x
Mr. B has keys for locks v and y
Mr. C has keys for locks w and y
Mr. D has keys for locks x and z
Mr. E has keys for locks v and z.
Determine the minimum number of executives required to open the safe. Who
is the essential executive?
1

Code No: 07A51403

R07

Set No. 2

Figure 4:
(b) Prove the following
i. If a+b=a+c and them a
+b=a
+ c, then b=c
ii. A (B + C) = (A B) + (A C)

[8+8]

6. (a) Convert the base 5 numbers 4, 433, 215 to base 12

(b) Form the radix complement for each of the following numbers
i.
ii.
iii.
iv.

(ABC1)16
(4723)8
(5291)10
Write out the decimal weighted codes of 7, 4, 2, 1

[6+5+5]

7. (a) Write the Characteristic equations and Characteristic tables for the following
Flip-Flops.
i. JK Flip-Flop
ii. D-Flip-Flop
iii. T-Flip-Flop
(b) Design a Sequential circuit specified by the following state diagram shown in
the figure 7b using T- Flip-Flops
[8+8]
8. (a) Use the
P map method to simplify the following 5 variable function
f = (3, 6, 7, 8, 10, 12, 14, 17, 19, 20, 21, 24, 25, 27, 31)
(b) Draw the NAND logic diagram for the simplified expression of
f = (0,1,4,6,9,12)
?????

[8+8]

Figure 7b

Code No: 07A51403

R07

Set No. 4

Figure 2:
III B.Tech I Semester Examinations,December 2011
SWITCHING THEORY AND LOGIC DESIGN
Mechatronics
Time: 3 hours
Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
?????
1. Obtain an ASM chart to implement Booths algorithm for multiplication. Discuss
the data processor subsystem and the control subsystem separately.
[16]
2. (a) Obtain the PLA programming table for the following Boolean functions
P
i. F1 (x,y,z) = (4,5,7)
P
ii. F2 (x,y,z) = (3,5,7)
(b) Show the general block schematic of PLA

[8+8]

3. (a) Convert the base 5 numbers 4, 433, 215 to base 12

(b) Form the radix complement for each of the following numbers
i.
ii.
iii.
iv.

(ABC1)16
(4723)8
(5291)10
Write out the decimal weighted codes of 7, 4, 2, 1

[6+5+5]

4. Find the reduced state table for the machine shown below and design the circuit
single SR flip-flop.
[[16]

R07

Code No: 07A51403

PS
A
B
C
D
E
F
G

NS, Z
00
01
10
A,00 E,01
C,10 B,00
A,00 C,10
A,00
E,01 F,00
G,10 F,00
A,00
-

Set No. 4

11
A,01
D,01
D,11
G,11
G11

5. (a) Given the logic pakage A shown below in figure 5, which operates as follows:
output Yi=1 if i inputs out of x0 x1 x2 are equal to 1. Design unit B so that the
overall logic function of unit C will be to produce an output Zi=1 if i inputs
out of x0 x1 x2 x3 are equal to 1.
(b) Design a 16: MUX using only NAND gates.

[8+8]

Figure 5:
6. (a) Write the Characteristic equations and Characteristic tables for the following
Flip-Flops.
i. JK Flip-Flop
ii. D-Flip-Flop
iii. T-Flip-Flop
(b) Design a Sequential circuit specified by the following state diagram shown in
the figure 6b using T- Flip-Flops
[8+8]
7. (a) A safe has 5 locks v,w,x,y and z, all of which must be unlocked for the safe
to open. The keys to the locks are distributed among 5 executives in the

54

Code No: 07A51403

R07

Set No. 4

Figure 6b:
following manner:
Mr. A has keys for locks v and x
Mr. B has keys for locks v and y
Mr. C has keys for locks w and y
Mr. D has keys for locks x and z
Mr. E has keys for locks v and z.
Determine the minimum number of executives required to open the safe. Who
is the essential executive?
(b) Prove the following
i. If a+b=a+c and them a
+b=a
+ c, then b=c
ii. A (B + C) = (A B) + (A C)

[8+8]

8. (a) Use the

P map method to simplify the following 5 variable function
f = (3, 6, 7, 8, 10, 12, 14, 17, 19, 20, 21, 24, 25, 27, 31)
(b) Draw the NAND logic diagram for the simplified expression of
f = (0,1,4,6,9,12)
?????

6
5

[8+8]

Code No: 07A51403

R07

Set No. 1

III B.Tech I Semester Examinations,December 2011

SWITCHING THEORY AND LOGIC DESIGN
Mechatronics
Time: 3 hours
Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
?????
1. (a) Convert the base 5 numbers 4, 433, 215 to base 12
(b) Form the radix complement for each of the following numbers
i.
ii.
iii.
iv.

(ABC1)16
(4723)8
(5291)10
Write out the decimal weighted codes of 7, 4, 2, 1

[6+5+5]

2. Obtain an ASM chart to implement Booths algorithm for multiplication. Discuss

the data processor subsystem and the control subsystem separately.
[16]
3. (a) A safe has 5 locks v,w,x,y and z, all of which must be unlocked for the safe
to open. The keys to the locks are distributed among 5 executives in the
following manner:
Mr. A has keys for locks v and x
Mr. B has keys for locks v and y
Mr. C has keys for locks w and y
Mr. D has keys for locks x and z
Mr. E has keys for locks v and z.
Determine the minimum number of executives required to open the safe. Who
is the essential executive?
(b) Prove the following
i. If a+b=a+c and them a
+b=a
+ c, then b=c
ii. A (B + C) = (A B) + (A C)

[8+8]

4. (a) Obtain the PLA programming table for the following Boolean functions
P
i. F1 (x,y,z) = (4,5,7)
P
ii. F2 (x,y,z) = (3,5,7)
(b) Show the general block schematic of PLA

[8+8]

5. (a) Given the logic pakage A shown below in figure 5, which operates as follows:
output Yi=1 if i inputs out of x0 x1 x2 are equal to 1. Design unit B so that the
overall logic function of unit C will be to produce an output Zi=1 if i inputs
out of x0 x1 x2 x3 are equal to 1.
(b) Design a 16: MUX using only NAND gates.

[8+8]

6. (a) Write the Characteristic equations and Characteristic tables for the following
Flip-Flops.
67

Code No: 07A51403

R07

Set No. 1

Figure 5:
i. JK Flip-Flop
ii. D-Flip-Flop
iii. T-Flip-Flop
(b) Design a Sequential circuit specified by the following state diagram shown in
the figure 6b using T- Flip-Flops
[8+8]

Figure 6b:
7. Find the reduced state table for the machine shown below and design the circuit
single SR flip-flop.
[[16]

78

R07

Code No: 07A51403

PS
A
B
C
D
E
F
G

NS, Z
00
01
10
A,00 E,01
C,10 B,00
A,00 C,10
A,00
E,01 F,00
G,10 F,00
A,00
-

Set No. 1

11
A,01
D,01
D,11
G,11
G11

8. (a) Use the

P map method to simplify the following 5 variable function
f = (3, 6, 7, 8, 10, 12, 14, 17, 19, 20, 21, 24, 25, 27, 31)
(b) Draw the NAND logic diagram for the simplified expression of
f = (0,1,4,6,9,12)
?????

[8+8]

R07

Code No: 07A51403

Set No. 3

III B.Tech I Semester Examinations,December 2011

SWITCHING THEORY AND LOGIC DESIGN
Mechatronics
Time: 3 hours
Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
?????
1. (a) Given the logic pakage A shown below in figure 1, which operates as follows:
output Yi=1 if i inputs out of x0 x1 x2 are equal to 1. Design unit B so that the
overall logic function of unit C will be to produce an output Zi=1 if i inputs
out of x0 x1 x2 x3 are equal to 1.
(b) Design a 16: MUX using only NAND gates.

[8+8]

Figure 1:
2. Find the reduced state table for the machine shown below and design the circuit
single SR flip-flop.
[[16]

PS
A
B
C
D
E
F
G

00
A,00
A,00
A,00
A,00

NS, Z
01
10
E,01
C,10 B,00
C,10
E,01 F,00
G,10 F,00
-

11
A,01
D,01
D,11
G,11
G11

10
9

Code No: 07A51403

R07

Set No. 3

3. (a) Write the Characteristic equations and Characteristic tables for the following
Flip-Flops.
i. JK Flip-Flop
ii. D-Flip-Flop
iii. T-Flip-Flop
(b) Design a Sequential circuit specified by the following state diagram shown in
the figure 3b using T- Flip-Flops
[8+8]

Figure 3b:
4. (a) Obtain the PLA programming table for the following Boolean functions
P
i. F1 (x,y,z) = (4,5,7)
P
ii. F2 (x,y,z) = (3,5,7)
(b) Show the general block schematic of PLA

[8+8]

5. (a) Use the

P map method to simplify the following 5 variable function
f = (3, 6, 7, 8, 10, 12, 14, 17, 19, 20, 21, 24, 25, 27, 31)
(b) Draw the NAND logic diagram for the simplified expression of
f = (0,1,4,6,9,12)

[8+8]

6. (a) A safe has 5 locks v,w,x,y and z, all of which must be unlocked for the safe
to open. The keys to the locks are distributed among 5 executives in the
following manner:
Mr. A has keys for locks v and x
Mr. B has keys for locks v and y
Mr. C has keys for locks w and y
Mr. D has keys for locks x and z
Mr. E has keys for locks v and z.
Determine the minimum number of executives required to open the safe. Who
is the essential executive?
(b) Prove the following
10

11

Code No: 07A51403

R07

Set No. 3

i. If a+b=a+c and them a

+b=a
+ c, then b=c
ii. A (B + C) = (A B) + (A C)

[8+8]

7. Obtain an ASM chart to implement Booths algorithm for multiplication. Discuss

the data processor subsystem and the control subsystem separately.
[16]
8. (a) Convert the base 5 numbers 4, 433, 215 to base 12
(b) Form the radix complement for each of the following numbers
i.
ii.
iii.
iv.

(ABC1)16
(4723)8
(5291)10
Write out the decimal weighted codes of 7, 4, 2, 1
?????

12 11

[6+5+5]